aboutsummaryrefslogtreecommitdiffstats
path: root/atavia.c
diff options
context:
space:
mode:
authorEdward O'Callaghan <quasisec@google.com>2021-05-24 20:33:45 +1000
committerEdward O'Callaghan <quasisec@chromium.org>2021-05-27 02:36:32 +0000
commitad8eb60e5d559e113a73e13213846938fded03de (patch)
tree62ab8787767ec99a6948ad53e38aef771bab5c1c /atavia.c
parent4f537721036c73381c073c7c9a1569275fd4333a (diff)
downloadflashrom-ad8eb60e5d559e113a73e13213846938fded03de.tar.gz
flashrom-ad8eb60e5d559e113a73e13213846938fded03de.tar.bz2
flashrom-ad8eb60e5d559e113a73e13213846938fded03de.zip
par_masters: Reshuffle to remove forward declarations
Dispense with all these forward declarations by way of ordering. Just deal with all the par_masters in one go to be over and done with. BUG=none BRANCH=none TEST=builds Change-Id: I88e89992380195fee7c9de7ec57502ab980ec5df Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54873 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'atavia.c')
-rw-r--r--atavia.c76
1 files changed, 37 insertions, 39 deletions
diff --git a/atavia.c b/atavia.c
index e04950a8..8045e1bf 100644
--- a/atavia.c
+++ b/atavia.c
@@ -54,19 +54,6 @@ const struct dev_entry ata_via[] = {
{0},
};
-static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
-static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_master lpc_master_atavia = {
- .chip_readb = atavia_chip_readb,
- .chip_readw = fallback_chip_readw,
- .chip_readl = fallback_chip_readl,
- .chip_readn = fallback_chip_readn,
- .chip_writeb = atavia_chip_writeb,
- .chip_writew = fallback_chip_writew,
- .chip_writel = fallback_chip_writel,
- .chip_writen = fallback_chip_writen,
-};
-
static void *atavia_offset = NULL;
static struct pci_dev *dev = NULL;
@@ -119,6 +106,43 @@ void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len)
return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr;
}
+static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr)
+{
+ msg_pspew("%s: 0x%02x to 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr);
+ pci_write_long(dev, BROM_ADDR, (addr & ~3));
+ pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr));
+ pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr));
+
+ if (!atavia_ready(dev)) {
+ msg_perr("not ready after write\n");
+ }
+}
+
+static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr)
+{
+ pci_write_long(dev, BROM_ADDR, (addr & ~3));
+ pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr));
+
+ if (!atavia_ready(dev)) {
+ msg_perr("not ready after read\n");
+ }
+
+ uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff;
+ msg_pspew("%s: 0x%02x from 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr);
+ return val;
+}
+
+static const struct par_master lpc_master_atavia = {
+ .chip_readb = atavia_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = atavia_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+};
+
int atavia_init(void)
{
char *arg = extract_programmer_param("offset");
@@ -164,29 +188,3 @@ int atavia_init(void)
return 0;
}
-
-static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr)
-{
- msg_pspew("%s: 0x%02x to 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr);
- pci_write_long(dev, BROM_ADDR, (addr & ~3));
- pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr));
- pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr));
-
- if (!atavia_ready(dev)) {
- msg_perr("not ready after write\n");
- }
-}
-
-static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr)
-{
- pci_write_long(dev, BROM_ADDR, (addr & ~3));
- pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr));
-
- if (!atavia_ready(dev)) {
- msg_perr("not ready after read\n");
- }
-
- uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff;
- msg_pspew("%s: 0x%02x from 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr);
- return val;
-}