diff options
| author | Edward O'Callaghan <quasisec@google.com> | 2021-05-24 20:33:45 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-05-27 02:36:32 +0000 |
| commit | ad8eb60e5d559e113a73e13213846938fded03de (patch) | |
| tree | 62ab8787767ec99a6948ad53e38aef771bab5c1c /atahpt.c | |
| parent | 4f537721036c73381c073c7c9a1569275fd4333a (diff) | |
| download | flashrom-ad8eb60e5d559e113a73e13213846938fded03de.tar.gz flashrom-ad8eb60e5d559e113a73e13213846938fded03de.tar.bz2 flashrom-ad8eb60e5d559e113a73e13213846938fded03de.zip | |
par_masters: Reshuffle to remove forward declarations
Dispense with all these forward declarations by way of
ordering. Just deal with all the par_masters in one go
to be over and done with.
BUG=none
BRANCH=none
TEST=builds
Change-Id: I88e89992380195fee7c9de7ec57502ab980ec5df
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'atahpt.c')
| -rw-r--r-- | atahpt.c | 28 |
1 files changed, 12 insertions, 16 deletions
@@ -40,9 +40,19 @@ const struct dev_entry ata_hpt[] = { }; static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr); + chipaddr addr) +{ + OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); + OUTB(val, io_base_addr + BIOS_ROM_DATA); +} + static uint8_t atahpt_chip_readb(const struct flashctx *flash, - const chipaddr addr); + const chipaddr addr) +{ + OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); + return INB(io_base_addr + BIOS_ROM_DATA); +} + static const struct par_master par_master_atahpt = { .chip_readb = atahpt_chip_readb, .chip_readw = fallback_chip_readw, @@ -80,20 +90,6 @@ int atahpt_init(void) return 0; } -static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr) -{ - OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); - OUTB(val, io_base_addr + BIOS_ROM_DATA); -} - -static uint8_t atahpt_chip_readb(const struct flashctx *flash, - const chipaddr addr) -{ - OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); - return INB(io_base_addr + BIOS_ROM_DATA); -} - #else #error PCI port I/O access is not supported on this architecture yet. #endif |