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author | Thomas Heijligen <thomas.heijligen@secunet.de> | 2021-05-04 15:32:17 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2021-06-10 12:49:16 +0000 |
commit | 4f5169df5ff2b63a40d654ab133b8a3108b6a599 (patch) | |
tree | d345dd5f3068a2325298234e302988b0c82a62e3 /atahpt.c | |
parent | 085db626fbf609704136aa3cc51c70325d0b40e2 (diff) | |
download | flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.tar.gz flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.tar.bz2 flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.zip |
programmer_table: move each entry to the associated programmer source
Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'atahpt.c')
-rw-r--r-- | atahpt.c | 14 |
1 files changed, 12 insertions, 2 deletions
@@ -31,7 +31,7 @@ static uint32_t io_base_addr = 0; -const struct dev_entry ata_hpt[] = { +static const struct dev_entry ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"}, @@ -64,7 +64,7 @@ static const struct par_master par_master_atahpt = { .chip_writen = fallback_chip_writen, }; -int atahpt_init(void) +static int atahpt_init(void) { struct pci_dev *dev = NULL; uint32_t reg32; @@ -90,6 +90,16 @@ int atahpt_init(void) return 0; } +const struct programmer_entry programmer_atahpt = { + .name = "atahpt", + .type = PCI, + .devs.dev = ata_hpt, + .init = atahpt_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, +}; + #else #error PCI port I/O access is not supported on this architecture yet. #endif |