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author | Alexander Goncharov <chat@joursoir.net> | 2022-08-12 09:03:49 +0300 |
---|---|---|
committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-08-30 10:16:19 +0000 |
commit | 9307e68d688996f2d827a2a7e0e0ea4f151f0ff2 (patch) | |
tree | b72eeefceb3183398a39a18a7fa533e4bd6741dc | |
parent | 7ebb18985d747de33224c856773da421b6895448 (diff) | |
download | flashrom-9307e68d688996f2d827a2a7e0e0ea4f151f0ff2.tar.gz flashrom-9307e68d688996f2d827a2a7e0e0ea4f151f0ff2.tar.bz2 flashrom-9307e68d688996f2d827a2a7e0e0ea4f151f0ff2.zip |
nicintel_eeprom: pack pci device struct into programmer's data
Move global variable into a struct and store within the opaque_master
data field for the life-time of the driver.
This is one of the steps on the way to move opaque_master data
memory management behind the initialisation API.
TOPIC=register_master_api
TEST=builds
Change-Id: I69271bc77a6d7211e692c0b48d1853b95ffa80e9
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66691
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | nicintel_eeprom.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index 60a6370a..db89dea6 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -72,11 +72,12 @@ #define EE_PAGE_MASK 0x3f static uint8_t *nicintel_eebar; -static struct pci_dev *nicintel_pci; #define UNPROG_DEVICE 0x1509 struct nicintel_eeprom_data { + struct pci_dev *nicintel_pci; + /* Intel 82580 variable(s) */ uint32_t eec; @@ -125,7 +126,9 @@ static int nicintel_ee_probe_i210(struct flashctx *flash) static int nicintel_ee_probe_82580(struct flashctx *flash) { - if (nicintel_pci->device_id == UNPROG_DEVICE) + const struct nicintel_eeprom_data *data = flash->mst->opaque.data; + + if (data->nicintel_pci->device_id == UNPROG_DEVICE) flash->chip->total_size = 16; /* Fall back to minimum supported size. */ else { uint32_t tmp = pci_mmio_readl(nicintel_eebar + EEC); @@ -434,7 +437,7 @@ static int nicintel_ee_shutdown_82580(void *opaque_data) struct nicintel_eeprom_data *data = opaque_data; int ret = 0; - if (nicintel_pci->device_id != UNPROG_DEVICE) { + if (data->nicintel_pci->device_id != UNPROG_DEVICE) { uint32_t old_eec = data->eec; /* Request bitbanging and unselect the chip first to be safe. */ if (nicintel_ee_req() || nicintel_ee_bitset(EEC, EE_CS, 1)) { @@ -490,7 +493,6 @@ static int nicintel_ee_init(void) if (!nicintel_eebar) return 1; - nicintel_pci = dev; if (dev->device_id != UNPROG_DEVICE) { eec = pci_mmio_readl(nicintel_eebar + EEC); @@ -518,6 +520,7 @@ static int nicintel_ee_init(void) msg_perr("Unable to allocate space for OPAQUE master data\n"); return 1; } + data->nicintel_pci = dev; data->eec = eec; data->done_i20_write = false; |