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authorStefan Reinauer <stepan@coresystems.de>2009-08-12 09:27:45 +0000
committerStefan Reinauer <stefan.reinauer@coreboot.org>2009-08-12 09:27:45 +0000
commit8fa64816ae22ff9e5fdcc00b153010459edb45f4 (patch)
tree171cc242408ff1e317447f3a8f948e0720e4a767
parent630c79d494668e7c4d41a2eee1a6df578f2b2ecd (diff)
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Fix up MSR handling to support more OSes than Linux.
Corresponding to flashrom svn r677. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
-rw-r--r--chipset_enable.c82
-rw-r--r--flash.h9
-rw-r--r--physmap.c135
3 files changed, 156 insertions, 70 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index a375cd71..6ac829b7 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2,7 +2,7 @@
* This file is part of the flashrom project.
*
* Copyright (C) 2000 Silicon Integrated System Corporation
- * Copyright (C) 2005-2009 coresystems GmbH <stepan@coresystems.de>
+ * Copyright (C) 2005-2009 coresystems GmbH
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
@@ -527,91 +527,35 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
/**
* Geode systems write protect the BIOS via RCONFs (cache settings similar
- * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22. Reading and
- * writing to MSRs, however requires instructions rdmsr/wrmsr, which are
- * ring0 privileged instructions so only the kernel can do the read/write.
- * This function, therefore, requires that the msr kernel module be loaded
- * to access these instructions from user space using device /dev/cpu/0/msr.
- *
- * This hard-coded location could have potential problems on SMP machines
- * since it assumes cpu0, but it is safe on the Geode which is not SMP.
+ * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22.
*
* Geode systems also write protect the NOR flash chip itself via MSR_NORF_CTL.
* To enable write to NOR Boot flash for the benefit of systems that have such
* a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select).
- *
- * This is probably not portable beyond Linux.
*/
static int enable_flash_cs5536(struct pci_dev *dev, const char *name)
{
#define MSR_RCONF_DEFAULT 0x1808
#define MSR_NORF_CTL 0x51400018
- int fd_msr;
- unsigned char buf[8];
+ msr_t msr;
- fd_msr = open("/dev/cpu/0/msr", O_RDWR);
- if (fd_msr == -1) {
- perror("open(/dev/cpu/0/msr)");
- printf("Cannot operate on MSR. Did you run 'modprobe msr'?\n");
+ /* Geode only has a single core */
+ if (setup_cpu_msr(0))
return -1;
- }
- if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT, SEEK_SET) == -1) {
- perror("lseek64");
- close(fd_msr);
- return -1;
- }
-
- if (read(fd_msr, buf, 8) != 8) {
- perror("read msr");
- close(fd_msr);
- return -1;
- }
-
- if (buf[7] != 0x22) {
- buf[7] &= 0xfb;
- if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT,
- SEEK_SET) == -1) {
- perror("lseek64");
- close(fd_msr);
- return -1;
- }
-
- if (write(fd_msr, buf, 8) < 0) {
- perror("msr write");
- close(fd_msr);
- return -1;
- }
- }
-
- if (lseek64(fd_msr, (off64_t) MSR_NORF_CTL, SEEK_SET) == -1) {
- perror("lseek64");
- close(fd_msr);
- return -1;
- }
-
- if (read(fd_msr, buf, 8) != 8) {
- perror("read msr");
- close(fd_msr);
- return -1;
+ msr = rdmsr(MSR_RCONF_DEFAULT);
+ if ((msr.hi >> 24) != 0x22) {
+ msr.hi &= 0xfbffffff;
+ wrmsr(MSR_RCONF_DEFAULT, msr);
}
+ msr = rdmsr(MSR_NORF_CTL);
/* Raise WE_CS3 bit. */
- buf[0] |= 0x08;
-
- if (lseek64(fd_msr, (off64_t) MSR_NORF_CTL, SEEK_SET) == -1) {
- perror("lseek64");
- close(fd_msr);
- return -1;
- }
- if (write(fd_msr, buf, 8) < 0) {
- perror("msr write");
- close(fd_msr);
- return -1;
- }
+ msr.lo |= 0x08;
+ wrmsr(MSR_NORF_CTL, msr);
- close(fd_msr);
+ cleanup_cpu_msr();
#undef MSR_RCONF_DEFAULT
#undef MSR_NORF_CTL
diff --git a/flash.h b/flash.h
index 7383b5d5..b421cf96 100644
--- a/flash.h
+++ b/flash.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 Silicon Integrated System Corporation
* Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
- * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
+ * Copyright (C) 2005-2009 coresystems GmbH
* Copyright (C) 2006-2009 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
@@ -301,6 +301,13 @@ extern unsigned long flashbase;
/* physmap.c */
void *physmap(const char *descr, unsigned long phys_addr, size_t len);
void physunmap(void *virt_addr, size_t len);
+int setup_cpu_msr(int cpu);
+void cleanup_cpu_msr(void);
+#ifndef __DARWIN__
+typedef struct { uint32_t hi, lo; } msr_t;
+msr_t rdmsr(int addr);
+int wrmsr(int addr, msr_t msr);
+#endif
/* internal.c */
struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
diff --git a/physmap.c b/physmap.c
index 2246dfac..e03a23d8 100644
--- a/physmap.c
+++ b/physmap.c
@@ -2,6 +2,7 @@
* This file is part of the flashrom project.
*
* Copyright (C) 2009 Peter Stuge <peter@stuge.se>
+ * Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,6 +22,7 @@
#include <sys/stat.h>
#include <fcntl.h>
#include <stdlib.h>
+#include <string.h>
#include <errno.h>
#include "flash.h"
@@ -117,3 +119,136 @@ void *physmap(const char *descr, unsigned long phys_addr, size_t len)
return virt_addr;
}
+
+#ifdef __linux__
+/*
+ * Reading and writing to MSRs, however requires instructions rdmsr/wrmsr,
+ * which are ring0 privileged instructions so only the kernel can do the
+ * read/write. This function, therefore, requires that the msr kernel module
+ * be loaded to access these instructions from user space using device
+ * /dev/cpu/0/msr.
+ */
+
+static int fd_msr = -1;
+
+msr_t rdmsr(int addr)
+{
+ uint8_t buf[8];
+ msr_t msr = { 0xffffffff, 0xffffffff };
+
+ if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) {
+ perror("Could not lseek() to MSR");
+ close(fd_msr);
+ exit(1);
+ }
+
+ if (read(fd_msr, buf, 8) == 8) {
+ msr.lo = *(uint32_t *)buf;
+ msr.hi = *(uint32_t *)(buf + 4);
+
+ return msr;
+ }
+
+ if (errno != EIO) {
+ // A severe error.
+ perror("Could not read() MSR");
+ close(fd_msr);
+ exit(1);
+ }
+
+ return msr;
+}
+
+int wrmsr(int addr, msr_t msr)
+{
+ if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) {
+ perror("Could not lseek() to MSR");
+ close(fd_msr);
+ exit(1);
+ }
+
+ if (write(fd_msr, &msr, 8) != 8 && errno != EIO) {
+ perror("Could not write() MSR");
+ close(fd_msr);
+ exit(1);
+ }
+
+ /* some MSRs must not be written */
+ if (errno == EIO)
+ return -1;
+
+ return 0;
+}
+
+int setup_cpu_msr(int cpu)
+{
+ char msrfilename[64];
+ memset(msrfilename, 0, 64);
+ sprintf(msrfilename, "/dev/cpu/%d/msr", cpu);
+
+ if (fd_msr != -1) {
+ printf("MSR was already initialized\n");
+ return -1;
+ }
+
+ fd_msr = open(msrfilename, O_RDWR);
+
+ if (fd_msr < 0) {
+ perror("Error while opening /dev/cpu/0/msr");
+ printf("Did you run 'modprobe msr'?\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+void cleanup_cpu_msr(void)
+{
+ if (fd_msr == -1) {
+ printf("No MSR initialized.\n");
+ return;
+ }
+
+ close(fd_msr);
+
+ /* Clear MSR file descriptor */
+ fd_msr = -1;
+}
+#else
+#ifdef __DARWIN__
+int setup_cpu_msr(int cpu)
+{
+ // Always succeed for now
+ return 0;
+}
+
+void cleanup_cpu_msr(void)
+{
+ // Nothing, yet.
+}
+#else
+msr_t rdmsr(int addr)
+{
+ msr_t ret = { 0xffffffff, 0xffffffff };
+
+ return ret;
+}
+
+int wrmsr(int addr, msr_t msr)
+{
+ return -1;
+}
+
+int setup_cpu_msr(int cpu)
+{
+ printf("No MSR support for your OS yet.\n");
+ return -1;
+}
+
+void cleanup_cpu_msr(void)
+{
+ // Nothing, yet.
+}
+#endif
+#endif
+