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| author | Nicholas Chin <nic.c3.14@gmail.com> | 2022-12-01 11:51:04 -0700 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-12-06 15:44:31 +0000 |
| commit | 803173a19c998a5223a71a6ae60c9dfa60b7fd44 (patch) | |
| tree | fc904cc186fb631ec594b4328fd9cd565e5d06d3 | |
| parent | 48e058983d6a1e36cd37bacad88f1e9ea3bd6092 (diff) | |
| download | flashrom-803173a19c998a5223a71a6ae60c9dfa60b7fd44.tar.gz flashrom-803173a19c998a5223a71a6ae60c9dfa60b7fd44.tar.bz2 flashrom-803173a19c998a5223a71a6ae60c9dfa60b7fd44.zip | |
flashrom.8.tmpl: Clarify supported ft2232_spi frequencies
The manpage suggests that ft2232_spi chips are only capable of up to
6 MHz SPI clock frequencies, whereas flashrom disables the divide-by-5
prescaler on the 'H' chips allowing up to 30 MHz frequencies. This
detail was already present in the comments of ft2232_spi.c.
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Change-Id: Id7690e1d4e11a3d0495afbc650f3c67430946468
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70218
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | flashrom.8.tmpl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 4c433233..0eabee50 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -939,8 +939,8 @@ All models supported by the ft2232_spi driver can configure the SPI clock rate b expressible divisors are all .B even numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of -6 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by -specifying the optional +6 MHz down to about 92 Hz for 12 MHz inputs (non-H chips) and 30 MHz down to about 458 Hz for 60 MHz inputs ('H' chips). The default +divisor is set to 2, but you can use another one by specifying the optional .B divisor parameter with the .sp |