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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-10 20:54:41 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-10 20:54:41 +0000 |
| commit | 28ec74b22959d90d7587b09809dba5db010b39b5 (patch) | |
| tree | 497ac0588a29224d79c97dce000804e42d30b6dc | |
| parent | 23dc1df565e66bd31813c4063e75df015d630e75 (diff) | |
| download | flashrom-28ec74b22959d90d7587b09809dba5db010b39b5.tar.gz flashrom-28ec74b22959d90d7587b09809dba5db010b39b5.tar.bz2 flashrom-28ec74b22959d90d7587b09809dba5db010b39b5.zip | |
Add ICH10 support
The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash
interfaces, so this just adds the required PCI IDs.
Corresponding to flashrom svn r323 and coreboot v2 svn r3648.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
| -rw-r--r-- | chipset_enable.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 241a6983..c6aa876b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -274,6 +274,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ic spibar_offset = 0x3020; break; case 9: + case 10: default: /* Future version might behave the same */ flashbus = BUS_TYPE_ICH9_SPI; spibar_offset = 0x3800; @@ -357,6 +358,11 @@ static int enable_flash_ich9(struct pci_dev *dev, const char *name) return enable_flash_ich_dc_spi(dev, name, 9); } +static int enable_flash_ich10(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 10); +} + static int enable_flash_vt823x(struct pci_dev *dev, const char *name) { uint8_t val; @@ -723,6 +729,10 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x2917, "Intel ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, "Intel ICH9", enable_flash_ich9}, {0x8086, 0x2919, "Intel ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, "Intel ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, "Intel ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, "Intel ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, "Intel ICH10D", enable_flash_ich10}, {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, |