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-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/doc/seg_595_static.vsdxbin0 -> 160248 bytes
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qpf30
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qsf76
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qwsbin0 -> 3107 bytes
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.sft6
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.vo2444
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_slow.vo2444
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_v_slow.sdo1858
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_slow.vo2444
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_v_slow.sdo1858
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_fast.vo2444
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_v_fast.sdo1858
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_modelsim.xrf135
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_v.sdo1858
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v99
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v.bak99
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v65
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v.bak65
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v123
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v.bak111
-rw-r--r--smh-ac415-fpga/examples/03_smg595/smg595_static/sim/tb_seg_595_static.v69
-rw-r--r--smh-ac415-fpga/examples/03_smg595/实验现象.txt2
22 files changed, 18088 insertions, 0 deletions
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/doc/seg_595_static.vsdx b/smh-ac415-fpga/examples/03_smg595/smg595_static/doc/seg_595_static.vsdx
new file mode 100644
index 0000000..5815b63
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/doc/seg_595_static.vsdx
Binary files differ
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qpf b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qpf
new file mode 100644
index 0000000..7eeffdb
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qpf
@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Altera Program License
+# Subscription Agreement, Altera MegaCore Function License
+# Agreement, or other applicable license agreement, including,
+# without limitation, that your use is for the sole purpose of
+# programming logic devices manufactured by Altera and sold by
+# Altera or its authorized distributors. Please refer to the
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
+# Date created = 17:00:15 February 24, 2020
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "13.0"
+DATE = "17:00:15 February 24, 2020"
+
+# Revisions
+
+PROJECT_REVISION = "seg_595_static"
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qsf b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qsf
new file mode 100644
index 0000000..6b62eea
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qsf
@@ -0,0 +1,76 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Altera Program License
+# Subscription Agreement, Altera MegaCore Function License
+# Agreement, or other applicable license agreement, including,
+# without limitation, that your use is for the sole purpose of
+# programming logic devices manufactured by Altera and sold by
+# Altera or its authorized distributors. Please refer to the
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
+# Date created = 17:00:15 February 24, 2020
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+# seg_595_static_assignment_defaults.qdf
+# If this file doesn't exist, see file:
+# assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+# file is updated automatically by the Quartus II software
+# and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "Cyclone IV E"
+set_global_assignment -name DEVICE EP4CE15F23C8
+set_global_assignment -name TOP_LEVEL_ENTITY seg_595_static
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:00:15 FEBRUARY 24, 2020"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)"
+set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
+set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH tb_seg_595_static -section_id eda_simulation
+set_global_assignment -name EDA_TEST_BENCH_NAME tb_seg_595_static -section_id eda_simulation
+set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_seg_595_static
+set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "1 us" -section_id tb_seg_595_static
+set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_seg_595_static -section_id tb_seg_595_static
+set_global_assignment -name EDA_TEST_BENCH_FILE ../sim/tb_seg_595_static.v -section_id tb_seg_595_static
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
+set_location_assignment PIN_AA1 -to ds
+set_location_assignment PIN_Y2 -to oe
+set_location_assignment PIN_W1 -to shcp
+set_location_assignment PIN_Y1 -to stcp
+set_location_assignment PIN_T22 -to sys_clk
+set_location_assignment PIN_U20 -to sys_rst_n
+set_global_assignment -name VERILOG_FILE ../sim/tb_seg_595_static.v
+set_global_assignment -name VERILOG_FILE ../rtl/seg_static.v
+set_global_assignment -name VERILOG_FILE ../rtl/seg_595_static.v
+set_global_assignment -name VERILOG_FILE ../rtl/hc595_ctrl.v
+set_global_assignment -name CDF_FILE output_files/Chain1.cdf
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qws b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qws
new file mode 100644
index 0000000..e1ce986
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/seg_595_static.qws
Binary files differ
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.sft b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.sft
new file mode 100644
index 0000000..e1d89f4
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.sft
@@ -0,0 +1,6 @@
+set tool_name "ModelSim (Verilog)"
+set corner_file_list {
+ {{"Slow -8 1.2V 85 Model"} {seg_595_static_8_1200mv_85c_slow.vo seg_595_static_8_1200mv_85c_v_slow.sdo}}
+ {{"Slow -8 1.2V 0 Model"} {seg_595_static_8_1200mv_0c_slow.vo seg_595_static_8_1200mv_0c_v_slow.sdo}}
+ {{"Fast -M 1.2V 0 Model"} {seg_595_static_min_1200mv_0c_fast.vo seg_595_static_min_1200mv_0c_v_fast.sdo}}
+}
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.vo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.vo
new file mode 100644
index 0000000..3d4f4c9
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static.vo
@@ -0,0 +1,2444 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+// VENDOR "Altera"
+// PROGRAM "Quartus II 64-Bit"
+// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version"
+
+// DATE "06/02/2023 20:55:14"
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This Verilog file should be used for ModelSim (Verilog) only
+//
+
+`timescale 1 ps/ 1 ps
+
+module seg_595_static (
+ sys_clk,
+ sys_rst_n,
+ stcp,
+ shcp,
+ ds,
+ oe);
+input sys_clk;
+input sys_rst_n;
+output stcp;
+output shcp;
+output ds;
+output oe;
+
+// Design Ports Information
+// stcp => Location: PIN_Y1, I/O Standard: 2.5 V, Current Strength: Default
+// shcp => Location: PIN_W1, I/O Standard: 2.5 V, Current Strength: Default
+// ds => Location: PIN_AA1, I/O Standard: 2.5 V, Current Strength: Default
+// oe => Location: PIN_Y2, I/O Standard: 2.5 V, Current Strength: Default
+// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default
+// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default
+
+
+wire gnd;
+wire vcc;
+wire unknown;
+
+assign gnd = 1'b0;
+assign vcc = 1'b1;
+assign unknown = 1'bx;
+
+tri1 devclrn;
+tri1 devpor;
+tri1 devoe;
+// synopsys translate_off
+initial $sdf_annotate("seg_595_static_v.sdo");
+// synopsys translate_on
+
+wire \seg_static_inst|Add0~4_combout ;
+wire \seg_static_inst|Add0~14_combout ;
+wire \seg_static_inst|Add0~19 ;
+wire \seg_static_inst|Add0~20_combout ;
+wire \seg_static_inst|Add0~21 ;
+wire \seg_static_inst|Add0~22_combout ;
+wire \seg_static_inst|Add0~23 ;
+wire \seg_static_inst|Add0~24_combout ;
+wire \seg_static_inst|Add0~25 ;
+wire \seg_static_inst|Add0~26_combout ;
+wire \seg_static_inst|Add0~27 ;
+wire \seg_static_inst|Add0~28_combout ;
+wire \seg_static_inst|Add0~29 ;
+wire \seg_static_inst|Add0~30_combout ;
+wire \seg_static_inst|Add0~31 ;
+wire \seg_static_inst|Add0~32_combout ;
+wire \seg_static_inst|Add0~33 ;
+wire \seg_static_inst|Add0~34_combout ;
+wire \seg_static_inst|Add0~35 ;
+wire \seg_static_inst|Add0~36_combout ;
+wire \seg_static_inst|Add0~37 ;
+wire \seg_static_inst|Add0~38_combout ;
+wire \seg_static_inst|Add0~39 ;
+wire \seg_static_inst|Add0~40_combout ;
+wire \seg_static_inst|Add0~41 ;
+wire \seg_static_inst|Add0~42_combout ;
+wire \seg_static_inst|Add0~43 ;
+wire \seg_static_inst|Add0~44_combout ;
+wire \seg_static_inst|Add0~45 ;
+wire \seg_static_inst|Add0~46_combout ;
+wire \hc595_ctrl_inst|ds~0_combout ;
+wire \seg_static_inst|WideOr2~0_combout ;
+wire \seg_static_inst|Equal0~0_combout ;
+wire \seg_static_inst|Equal0~1_combout ;
+wire \seg_static_inst|Equal0~2_combout ;
+wire \seg_static_inst|Equal0~3_combout ;
+wire \seg_static_inst|Equal0~4_combout ;
+wire \seg_static_inst|cnt_wait~0_combout ;
+wire \seg_static_inst|cnt_wait~1_combout ;
+wire \seg_static_inst|cnt_wait~2_combout ;
+wire \seg_static_inst|cnt_wait~3_combout ;
+wire \seg_static_inst|cnt_wait~4_combout ;
+wire \seg_static_inst|cnt_wait~5_combout ;
+wire \seg_static_inst|cnt_wait~6_combout ;
+wire \seg_static_inst|cnt_wait~7_combout ;
+wire \seg_static_inst|cnt_wait~8_combout ;
+wire \seg_static_inst|cnt_wait~9_combout ;
+wire \seg_static_inst|cnt_wait~10_combout ;
+wire \stcp~output_o ;
+wire \shcp~output_o ;
+wire \ds~output_o ;
+wire \oe~output_o ;
+wire \sys_clk~input_o ;
+wire \sys_clk~inputclkctrl_outclk ;
+wire \hc595_ctrl_inst|cnt_4[0]~0_combout ;
+wire \sys_rst_n~input_o ;
+wire \hc595_ctrl_inst|cnt_bit[0]~1_combout ;
+wire \hc595_ctrl_inst|cnt_bit[1]~0_combout ;
+wire \hc595_ctrl_inst|always2~0_combout ;
+wire \seg_static_inst|Add0~0_combout ;
+wire \hc595_ctrl_inst|Equal1~0_combout ;
+wire \hc595_ctrl_inst|cnt_bit[3]~2_combout ;
+wire \hc595_ctrl_inst|always2~1_combout ;
+wire \hc595_ctrl_inst|stcp~feeder_combout ;
+wire \hc595_ctrl_inst|stcp~q ;
+wire \hc595_ctrl_inst|shcp~q ;
+wire \hc595_ctrl_inst|cnt_bit[2]~3_combout ;
+wire \seg_static_inst|Add0~1 ;
+wire \seg_static_inst|Add0~2_combout ;
+wire \seg_static_inst|Add0~3 ;
+wire \seg_static_inst|Add0~5 ;
+wire \seg_static_inst|Add0~6_combout ;
+wire \seg_static_inst|Add0~7 ;
+wire \seg_static_inst|Add0~8_combout ;
+wire \seg_static_inst|Add0~9 ;
+wire \seg_static_inst|Add0~10_combout ;
+wire \seg_static_inst|cnt_wait~11_combout ;
+wire \seg_static_inst|Add0~11 ;
+wire \seg_static_inst|Add0~12_combout ;
+wire \seg_static_inst|Add0~13 ;
+wire \seg_static_inst|Add0~15 ;
+wire \seg_static_inst|Add0~16_combout ;
+wire \seg_static_inst|Add0~17 ;
+wire \seg_static_inst|Add0~18_combout ;
+wire \seg_static_inst|Equal0~5_combout ;
+wire \seg_static_inst|Equal0~6_combout ;
+wire \seg_static_inst|Equal0~7_combout ;
+wire \seg_static_inst|add_flag~feeder_combout ;
+wire \seg_static_inst|add_flag~q ;
+wire \seg_static_inst|num[0]~0_combout ;
+wire \seg_static_inst|num[1]~1_combout ;
+wire \seg_static_inst|num[2]~2_combout ;
+wire \seg_static_inst|num[3]~3_combout ;
+wire \seg_static_inst|num[3]~4_combout ;
+wire \seg_static_inst|WideOr1~0_combout ;
+wire \seg_static_inst|seg[7]~feeder_combout ;
+wire \seg_static_inst|WideOr0~0_combout ;
+wire \hc595_ctrl_inst|Mux0~2_combout ;
+wire \hc595_ctrl_inst|Mux0~3_combout ;
+wire \hc595_ctrl_inst|ds~2_combout ;
+wire \seg_static_inst|WideOr4~0_combout ;
+wire \seg_static_inst|WideOr3~0_combout ;
+wire \seg_static_inst|WideOr5~0_combout ;
+wire \hc595_ctrl_inst|Mux0~0_combout ;
+wire \seg_static_inst|WideOr6~0_combout ;
+wire \hc595_ctrl_inst|Mux0~1_combout ;
+wire \hc595_ctrl_inst|ds~1_combout ;
+wire \hc595_ctrl_inst|ds~3_combout ;
+wire \hc595_ctrl_inst|ds~q ;
+wire [7:0] \seg_static_inst|seg ;
+wire [3:0] \seg_static_inst|num ;
+wire [24:0] \seg_static_inst|cnt_wait ;
+wire [3:0] \hc595_ctrl_inst|cnt_bit ;
+wire [1:0] \hc595_ctrl_inst|cnt_4 ;
+
+
+// Location: LCCOMB_X14_Y13_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~4 (
+// Equation(s):
+// \seg_static_inst|Add0~4_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|Add0~3 $ (GND))) # (!\seg_static_inst|cnt_wait [3] & (!\seg_static_inst|Add0~3 & VCC))
+// \seg_static_inst|Add0~5 = CARRY((\seg_static_inst|cnt_wait [3] & !\seg_static_inst|Add0~3 ))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~3 ),
+ .combout(\seg_static_inst|Add0~4_combout ),
+ .cout(\seg_static_inst|Add0~5 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~4 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~4 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~14 (
+// Equation(s):
+// \seg_static_inst|Add0~14_combout = (\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|Add0~13 )) # (!\seg_static_inst|cnt_wait [8] & ((\seg_static_inst|Add0~13 ) # (GND)))
+// \seg_static_inst|Add0~15 = CARRY((!\seg_static_inst|Add0~13 ) # (!\seg_static_inst|cnt_wait [8]))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~13 ),
+ .combout(\seg_static_inst|Add0~14_combout ),
+ .cout(\seg_static_inst|Add0~15 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~14 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~14 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|Add0~18 (
+// Equation(s):
+// \seg_static_inst|Add0~18_combout = (\seg_static_inst|cnt_wait [10] & (!\seg_static_inst|Add0~17 )) # (!\seg_static_inst|cnt_wait [10] & ((\seg_static_inst|Add0~17 ) # (GND)))
+// \seg_static_inst|Add0~19 = CARRY((!\seg_static_inst|Add0~17 ) # (!\seg_static_inst|cnt_wait [10]))
+
+ .dataa(\seg_static_inst|cnt_wait [10]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~17 ),
+ .combout(\seg_static_inst|Add0~18_combout ),
+ .cout(\seg_static_inst|Add0~19 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~18 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~18 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|Add0~20 (
+// Equation(s):
+// \seg_static_inst|Add0~20_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|Add0~19 $ (GND))) # (!\seg_static_inst|cnt_wait [11] & (!\seg_static_inst|Add0~19 & VCC))
+// \seg_static_inst|Add0~21 = CARRY((\seg_static_inst|cnt_wait [11] & !\seg_static_inst|Add0~19 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [11]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~19 ),
+ .combout(\seg_static_inst|Add0~20_combout ),
+ .cout(\seg_static_inst|Add0~21 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~20 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~20 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N30
+cycloneive_lcell_comb \seg_static_inst|Add0~22 (
+// Equation(s):
+// \seg_static_inst|Add0~22_combout = (\seg_static_inst|cnt_wait [12] & (!\seg_static_inst|Add0~21 )) # (!\seg_static_inst|cnt_wait [12] & ((\seg_static_inst|Add0~21 ) # (GND)))
+// \seg_static_inst|Add0~23 = CARRY((!\seg_static_inst|Add0~21 ) # (!\seg_static_inst|cnt_wait [12]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [12]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~21 ),
+ .combout(\seg_static_inst|Add0~22_combout ),
+ .cout(\seg_static_inst|Add0~23 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~22 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~22 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|Add0~24 (
+// Equation(s):
+// \seg_static_inst|Add0~24_combout = (\seg_static_inst|cnt_wait [13] & (\seg_static_inst|Add0~23 $ (GND))) # (!\seg_static_inst|cnt_wait [13] & (!\seg_static_inst|Add0~23 & VCC))
+// \seg_static_inst|Add0~25 = CARRY((\seg_static_inst|cnt_wait [13] & !\seg_static_inst|Add0~23 ))
+
+ .dataa(\seg_static_inst|cnt_wait [13]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~23 ),
+ .combout(\seg_static_inst|Add0~24_combout ),
+ .cout(\seg_static_inst|Add0~25 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~24 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~24 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|Add0~26 (
+// Equation(s):
+// \seg_static_inst|Add0~26_combout = (\seg_static_inst|cnt_wait [14] & (!\seg_static_inst|Add0~25 )) # (!\seg_static_inst|cnt_wait [14] & ((\seg_static_inst|Add0~25 ) # (GND)))
+// \seg_static_inst|Add0~27 = CARRY((!\seg_static_inst|Add0~25 ) # (!\seg_static_inst|cnt_wait [14]))
+
+ .dataa(\seg_static_inst|cnt_wait [14]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~25 ),
+ .combout(\seg_static_inst|Add0~26_combout ),
+ .cout(\seg_static_inst|Add0~27 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~26 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~26 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|Add0~28 (
+// Equation(s):
+// \seg_static_inst|Add0~28_combout = (\seg_static_inst|cnt_wait [15] & (\seg_static_inst|Add0~27 $ (GND))) # (!\seg_static_inst|cnt_wait [15] & (!\seg_static_inst|Add0~27 & VCC))
+// \seg_static_inst|Add0~29 = CARRY((\seg_static_inst|cnt_wait [15] & !\seg_static_inst|Add0~27 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [15]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~27 ),
+ .combout(\seg_static_inst|Add0~28_combout ),
+ .cout(\seg_static_inst|Add0~29 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~28 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~28 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|Add0~30 (
+// Equation(s):
+// \seg_static_inst|Add0~30_combout = (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|Add0~29 )) # (!\seg_static_inst|cnt_wait [16] & ((\seg_static_inst|Add0~29 ) # (GND)))
+// \seg_static_inst|Add0~31 = CARRY((!\seg_static_inst|Add0~29 ) # (!\seg_static_inst|cnt_wait [16]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~29 ),
+ .combout(\seg_static_inst|Add0~30_combout ),
+ .cout(\seg_static_inst|Add0~31 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~30 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~30 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~32 (
+// Equation(s):
+// \seg_static_inst|Add0~32_combout = (\seg_static_inst|cnt_wait [17] & (\seg_static_inst|Add0~31 $ (GND))) # (!\seg_static_inst|cnt_wait [17] & (!\seg_static_inst|Add0~31 & VCC))
+// \seg_static_inst|Add0~33 = CARRY((\seg_static_inst|cnt_wait [17] & !\seg_static_inst|Add0~31 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [17]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~31 ),
+ .combout(\seg_static_inst|Add0~32_combout ),
+ .cout(\seg_static_inst|Add0~33 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~32 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~32 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~34 (
+// Equation(s):
+// \seg_static_inst|Add0~34_combout = (\seg_static_inst|cnt_wait [18] & (!\seg_static_inst|Add0~33 )) # (!\seg_static_inst|cnt_wait [18] & ((\seg_static_inst|Add0~33 ) # (GND)))
+// \seg_static_inst|Add0~35 = CARRY((!\seg_static_inst|Add0~33 ) # (!\seg_static_inst|cnt_wait [18]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [18]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~33 ),
+ .combout(\seg_static_inst|Add0~34_combout ),
+ .cout(\seg_static_inst|Add0~35 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~34 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~34 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~36 (
+// Equation(s):
+// \seg_static_inst|Add0~36_combout = (\seg_static_inst|cnt_wait [19] & (\seg_static_inst|Add0~35 $ (GND))) # (!\seg_static_inst|cnt_wait [19] & (!\seg_static_inst|Add0~35 & VCC))
+// \seg_static_inst|Add0~37 = CARRY((\seg_static_inst|cnt_wait [19] & !\seg_static_inst|Add0~35 ))
+
+ .dataa(\seg_static_inst|cnt_wait [19]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~35 ),
+ .combout(\seg_static_inst|Add0~36_combout ),
+ .cout(\seg_static_inst|Add0~37 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~36 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~36 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~38 (
+// Equation(s):
+// \seg_static_inst|Add0~38_combout = (\seg_static_inst|cnt_wait [20] & (!\seg_static_inst|Add0~37 )) # (!\seg_static_inst|cnt_wait [20] & ((\seg_static_inst|Add0~37 ) # (GND)))
+// \seg_static_inst|Add0~39 = CARRY((!\seg_static_inst|Add0~37 ) # (!\seg_static_inst|cnt_wait [20]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~37 ),
+ .combout(\seg_static_inst|Add0~38_combout ),
+ .cout(\seg_static_inst|Add0~39 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~38 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~38 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~40 (
+// Equation(s):
+// \seg_static_inst|Add0~40_combout = (\seg_static_inst|cnt_wait [21] & (\seg_static_inst|Add0~39 $ (GND))) # (!\seg_static_inst|cnt_wait [21] & (!\seg_static_inst|Add0~39 & VCC))
+// \seg_static_inst|Add0~41 = CARRY((\seg_static_inst|cnt_wait [21] & !\seg_static_inst|Add0~39 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [21]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~39 ),
+ .combout(\seg_static_inst|Add0~40_combout ),
+ .cout(\seg_static_inst|Add0~41 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~40 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~40 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~42 (
+// Equation(s):
+// \seg_static_inst|Add0~42_combout = (\seg_static_inst|cnt_wait [22] & (!\seg_static_inst|Add0~41 )) # (!\seg_static_inst|cnt_wait [22] & ((\seg_static_inst|Add0~41 ) # (GND)))
+// \seg_static_inst|Add0~43 = CARRY((!\seg_static_inst|Add0~41 ) # (!\seg_static_inst|cnt_wait [22]))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~41 ),
+ .combout(\seg_static_inst|Add0~42_combout ),
+ .cout(\seg_static_inst|Add0~43 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~42 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~42 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~44 (
+// Equation(s):
+// \seg_static_inst|Add0~44_combout = (\seg_static_inst|cnt_wait [23] & (\seg_static_inst|Add0~43 $ (GND))) # (!\seg_static_inst|cnt_wait [23] & (!\seg_static_inst|Add0~43 & VCC))
+// \seg_static_inst|Add0~45 = CARRY((\seg_static_inst|cnt_wait [23] & !\seg_static_inst|Add0~43 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~43 ),
+ .combout(\seg_static_inst|Add0~44_combout ),
+ .cout(\seg_static_inst|Add0~45 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~44 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~44 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~46 (
+// Equation(s):
+// \seg_static_inst|Add0~46_combout = \seg_static_inst|Add0~45 $ (\seg_static_inst|cnt_wait [24])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(\seg_static_inst|Add0~45 ),
+ .combout(\seg_static_inst|Add0~46_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Add0~46 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|Add0~46 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N10
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~0 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~0_combout = (!\hc595_ctrl_inst|cnt_4 [1] & !\hc595_ctrl_inst|cnt_4 [0])
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~0 .lut_mask = 16'h0505;
+defparam \hc595_ctrl_inst|ds~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N27
+dffeas \seg_static_inst|seg[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr2~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|WideOr2~0 (
+// Equation(s):
+// \seg_static_inst|WideOr2~0_combout = (\seg_static_inst|num [1] & (\seg_static_inst|num [0] & (!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [1] & ((\seg_static_inst|num [2] & ((!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr2~0 .lut_mask = 16'h223A;
+defparam \seg_static_inst|WideOr2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N3
+dffeas \seg_static_inst|cnt_wait[24] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [24]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[24] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N21
+dffeas \seg_static_inst|cnt_wait[23] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~44_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [23]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[23] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[23] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|Equal0~0 (
+// Equation(s):
+// \seg_static_inst|Equal0~0_combout = (\hc595_ctrl_inst|cnt_4 [1] & (!\seg_static_inst|cnt_wait [23] & (\hc595_ctrl_inst|cnt_4 [0] & \seg_static_inst|cnt_wait [24])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~0 .lut_mask = 16'h2000;
+defparam \seg_static_inst|Equal0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N7
+dffeas \seg_static_inst|cnt_wait[22] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [22]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[22] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N25
+dffeas \seg_static_inst|cnt_wait[21] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [21]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[21] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N9
+dffeas \seg_static_inst|cnt_wait[20] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [20]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[20] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N27
+dffeas \seg_static_inst|cnt_wait[19] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [19]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[19] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[19] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Equal0~1 (
+// Equation(s):
+// \seg_static_inst|Equal0~1_combout = (\seg_static_inst|cnt_wait [22] & (\seg_static_inst|cnt_wait [20] & (\seg_static_inst|cnt_wait [19] & \seg_static_inst|cnt_wait [21])))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(\seg_static_inst|cnt_wait [19]),
+ .datad(\seg_static_inst|cnt_wait [21]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~1 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N29
+dffeas \seg_static_inst|cnt_wait[18] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~5_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[18] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N29
+dffeas \seg_static_inst|cnt_wait[16] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[16] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N9
+dffeas \seg_static_inst|cnt_wait[17] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~32_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[17] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N5
+dffeas \seg_static_inst|cnt_wait[15] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~28_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[15] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Equal0~2 (
+// Equation(s):
+// \seg_static_inst|Equal0~2_combout = (!\seg_static_inst|cnt_wait [17] & (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|cnt_wait [15] & \seg_static_inst|cnt_wait [18])))
+
+ .dataa(\seg_static_inst|cnt_wait [17]),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(\seg_static_inst|cnt_wait [15]),
+ .datad(\seg_static_inst|cnt_wait [18]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~2 .lut_mask = 16'h0400;
+defparam \seg_static_inst|Equal0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N21
+dffeas \seg_static_inst|cnt_wait[14] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~7_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[14] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N31
+dffeas \seg_static_inst|cnt_wait[13] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[13] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N23
+dffeas \seg_static_inst|cnt_wait[12] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~9_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[12] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N1
+dffeas \seg_static_inst|cnt_wait[11] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~10_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[11] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|Equal0~3 (
+// Equation(s):
+// \seg_static_inst|Equal0~3_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|cnt_wait [14] & (\seg_static_inst|cnt_wait [12] & \seg_static_inst|cnt_wait [13])))
+
+ .dataa(\seg_static_inst|cnt_wait [11]),
+ .datab(\seg_static_inst|cnt_wait [14]),
+ .datac(\seg_static_inst|cnt_wait [12]),
+ .datad(\seg_static_inst|cnt_wait [13]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Equal0~4 (
+// Equation(s):
+// \seg_static_inst|Equal0~4_combout = (\seg_static_inst|Equal0~1_combout & (\seg_static_inst|Equal0~2_combout & (\seg_static_inst|Equal0~3_combout & \seg_static_inst|Equal0~0_combout )))
+
+ .dataa(\seg_static_inst|Equal0~1_combout ),
+ .datab(\seg_static_inst|Equal0~2_combout ),
+ .datac(\seg_static_inst|Equal0~3_combout ),
+ .datad(\seg_static_inst|Equal0~0_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~4 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N23
+dffeas \seg_static_inst|cnt_wait[8] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~14_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[8] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N13
+dffeas \seg_static_inst|cnt_wait[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~0 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~0_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~46_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~46_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~0 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~1 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~1_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~42_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~42_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~1 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~2 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~2_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~40_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~40_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~2 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~3 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~3_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~38_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~38_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~3 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~4 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~4_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~36_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~36_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~4 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~5 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~5_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~34_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~34_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~5 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~6 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~6_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~30_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~30_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~6 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~7 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~7_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~26_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~26_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~7 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N30
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~8 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~8_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~24_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~24_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~8_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~8 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~8 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~9 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~9_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~22_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~22_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~9_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~9 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~9 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~10 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~10_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~20_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Equal0~7_combout ),
+ .datac(\seg_static_inst|Add0~20_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~10_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~10 .lut_mask = 16'h3030;
+defparam \seg_static_inst|cnt_wait~10 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N9
+cycloneive_io_obuf \stcp~output (
+ .i(\hc595_ctrl_inst|stcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\stcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \stcp~output .bus_hold = "false";
+defparam \stcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y7_N23
+cycloneive_io_obuf \shcp~output (
+ .i(\hc595_ctrl_inst|shcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\shcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \shcp~output .bus_hold = "false";
+defparam \shcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y5_N16
+cycloneive_io_obuf \ds~output (
+ .i(\hc595_ctrl_inst|ds~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\ds~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \ds~output .bus_hold = "false";
+defparam \ds~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N2
+cycloneive_io_obuf \oe~output (
+ .i(!\sys_rst_n~input_o ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\oe~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \oe~output .bus_hold = "false";
+defparam \oe~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y15_N22
+cycloneive_io_ibuf \sys_clk~input (
+ .i(sys_clk),
+ .ibar(gnd),
+ .o(\sys_clk~input_o ));
+// synopsys translate_off
+defparam \sys_clk~input .bus_hold = "false";
+defparam \sys_clk~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G8
+cycloneive_clkctrl \sys_clk~inputclkctrl (
+ .ena(vcc),
+ .inclk({vcc,vcc,vcc,\sys_clk~input_o }),
+ .clkselect(2'b00),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .outclk(\sys_clk~inputclkctrl_outclk ));
+// synopsys translate_off
+defparam \sys_clk~inputclkctrl .clock_type = "global clock";
+defparam \sys_clk~inputclkctrl .ena_register_mode = "none";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_4[0]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_4[0]~0_combout = !\hc595_ctrl_inst|cnt_4 [0]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .lut_mask = 16'h0F0F;
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y4_N1
+cycloneive_io_ibuf \sys_rst_n~input (
+ .i(sys_rst_n),
+ .ibar(gnd),
+ .o(\sys_rst_n~input_o ));
+// synopsys translate_off
+defparam \sys_rst_n~input .bus_hold = "false";
+defparam \sys_rst_n~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N7
+dffeas \hc595_ctrl_inst|cnt_4[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N14
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[0]~1 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[0]~1_combout = \hc595_ctrl_inst|cnt_bit [0] $ (((\hc595_ctrl_inst|cnt_4 [1] & \hc595_ctrl_inst|cnt_4 [0])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\hc595_ctrl_inst|cnt_4 [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .lut_mask = 16'h7878;
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N15
+dffeas \hc595_ctrl_inst|cnt_bit[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[1]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[1]~0_combout = (\hc595_ctrl_inst|Equal1~0_combout & (!\hc595_ctrl_inst|always2~1_combout & (\hc595_ctrl_inst|cnt_bit [0] $ (\hc595_ctrl_inst|cnt_bit [1])))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit
+// [1]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [1]),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .lut_mask = 16'h5078;
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N25
+dffeas \hc595_ctrl_inst|cnt_bit[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N0
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~0 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & \hc595_ctrl_inst|cnt_bit [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|always2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~0 (
+// Equation(s):
+// \seg_static_inst|Add0~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] $ (VCC))) # (!\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] & VCC))
+// \seg_static_inst|Add0~1 = CARRY((\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1]))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [0]),
+ .datab(\hc595_ctrl_inst|cnt_4 [1]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(gnd),
+ .combout(\seg_static_inst|Add0~0_combout ),
+ .cout(\seg_static_inst|Add0~1 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~0 .lut_mask = 16'h6688;
+defparam \seg_static_inst|Add0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N9
+dffeas \hc595_ctrl_inst|cnt_4[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N22
+cycloneive_lcell_comb \hc595_ctrl_inst|Equal1~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Equal1~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\hc595_ctrl_inst|cnt_4 [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Equal1~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|Equal1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N16
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[3]~2 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[3]~2_combout = (\hc595_ctrl_inst|always2~0_combout & ((\hc595_ctrl_inst|cnt_bit [3] & ((!\hc595_ctrl_inst|Equal1~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Equal1~0_combout
+// )))) # (!\hc595_ctrl_inst|always2~0_combout & (((\hc595_ctrl_inst|cnt_bit [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|always2~0_combout ),
+ .datac(\hc595_ctrl_inst|cnt_bit [3]),
+ .datad(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .lut_mask = 16'h38F0;
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N17
+dffeas \hc595_ctrl_inst|cnt_bit[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N28
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~1 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~1_combout = (!\hc595_ctrl_inst|cnt_bit [2] & (\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|Equal1~0_combout & \hc595_ctrl_inst|always2~0_combout )))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~1 .lut_mask = 16'h4000;
+defparam \hc595_ctrl_inst|always2~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N4
+cycloneive_lcell_comb \hc595_ctrl_inst|stcp~feeder (
+// Equation(s):
+// \hc595_ctrl_inst|stcp~feeder_combout = \hc595_ctrl_inst|always2~1_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp~feeder .lut_mask = 16'hFF00;
+defparam \hc595_ctrl_inst|stcp~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N5
+dffeas \hc595_ctrl_inst|stcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|stcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|stcp .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N19
+dffeas \hc595_ctrl_inst|shcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(gnd),
+ .asdata(\hc595_ctrl_inst|cnt_4 [1]),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|shcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|shcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|shcp .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N26
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[2]~3 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[2]~3_combout = (\hc595_ctrl_inst|Equal1~0_combout & ((\hc595_ctrl_inst|cnt_bit [2] & ((!\hc595_ctrl_inst|always2~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\hc595_ctrl_inst|cnt_bit [3] &
+// \hc595_ctrl_inst|always2~0_combout )))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit [2]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .lut_mask = 16'h52F0;
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N27
+dffeas \hc595_ctrl_inst|cnt_bit[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~2 (
+// Equation(s):
+// \seg_static_inst|Add0~2_combout = (\seg_static_inst|cnt_wait [2] & (!\seg_static_inst|Add0~1 )) # (!\seg_static_inst|cnt_wait [2] & ((\seg_static_inst|Add0~1 ) # (GND)))
+// \seg_static_inst|Add0~3 = CARRY((!\seg_static_inst|Add0~1 ) # (!\seg_static_inst|cnt_wait [2]))
+
+ .dataa(\seg_static_inst|cnt_wait [2]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~1 ),
+ .combout(\seg_static_inst|Add0~2_combout ),
+ .cout(\seg_static_inst|Add0~3 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~2 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~2 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N11
+dffeas \seg_static_inst|cnt_wait[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~6 (
+// Equation(s):
+// \seg_static_inst|Add0~6_combout = (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|Add0~5 )) # (!\seg_static_inst|cnt_wait [4] & ((\seg_static_inst|Add0~5 ) # (GND)))
+// \seg_static_inst|Add0~7 = CARRY((!\seg_static_inst|Add0~5 ) # (!\seg_static_inst|cnt_wait [4]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~5 ),
+ .combout(\seg_static_inst|Add0~6_combout ),
+ .cout(\seg_static_inst|Add0~7 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~6 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~6 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N15
+dffeas \seg_static_inst|cnt_wait[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~8 (
+// Equation(s):
+// \seg_static_inst|Add0~8_combout = (\seg_static_inst|cnt_wait [5] & (\seg_static_inst|Add0~7 $ (GND))) # (!\seg_static_inst|cnt_wait [5] & (!\seg_static_inst|Add0~7 & VCC))
+// \seg_static_inst|Add0~9 = CARRY((\seg_static_inst|cnt_wait [5] & !\seg_static_inst|Add0~7 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [5]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~7 ),
+ .combout(\seg_static_inst|Add0~8_combout ),
+ .cout(\seg_static_inst|Add0~9 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~8 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~8 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N17
+dffeas \seg_static_inst|cnt_wait[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~10 (
+// Equation(s):
+// \seg_static_inst|Add0~10_combout = (\seg_static_inst|cnt_wait [6] & (!\seg_static_inst|Add0~9 )) # (!\seg_static_inst|cnt_wait [6] & ((\seg_static_inst|Add0~9 ) # (GND)))
+// \seg_static_inst|Add0~11 = CARRY((!\seg_static_inst|Add0~9 ) # (!\seg_static_inst|cnt_wait [6]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [6]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~9 ),
+ .combout(\seg_static_inst|Add0~10_combout ),
+ .cout(\seg_static_inst|Add0~11 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~10 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~10 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~11 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~11_combout = (\seg_static_inst|Add0~10_combout & !\seg_static_inst|Equal0~7_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Add0~10_combout ),
+ .datac(gnd),
+ .datad(\seg_static_inst|Equal0~7_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~11_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~11 .lut_mask = 16'h00CC;
+defparam \seg_static_inst|cnt_wait~11 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N5
+dffeas \seg_static_inst|cnt_wait[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~11_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~12 (
+// Equation(s):
+// \seg_static_inst|Add0~12_combout = (\seg_static_inst|cnt_wait [7] & (\seg_static_inst|Add0~11 $ (GND))) # (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|Add0~11 & VCC))
+// \seg_static_inst|Add0~13 = CARRY((\seg_static_inst|cnt_wait [7] & !\seg_static_inst|Add0~11 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~11 ),
+ .combout(\seg_static_inst|Add0~12_combout ),
+ .cout(\seg_static_inst|Add0~13 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~12 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~12 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N21
+dffeas \seg_static_inst|cnt_wait[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~12_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N24
+cycloneive_lcell_comb \seg_static_inst|Add0~16 (
+// Equation(s):
+// \seg_static_inst|Add0~16_combout = (\seg_static_inst|cnt_wait [9] & (\seg_static_inst|Add0~15 $ (GND))) # (!\seg_static_inst|cnt_wait [9] & (!\seg_static_inst|Add0~15 & VCC))
+// \seg_static_inst|Add0~17 = CARRY((\seg_static_inst|cnt_wait [9] & !\seg_static_inst|Add0~15 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [9]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~15 ),
+ .combout(\seg_static_inst|Add0~16_combout ),
+ .cout(\seg_static_inst|Add0~17 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~16 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~16 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N25
+dffeas \seg_static_inst|cnt_wait[9] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~16_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[9] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N27
+dffeas \seg_static_inst|cnt_wait[10] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~18_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[10] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|Equal0~5 (
+// Equation(s):
+// \seg_static_inst|Equal0~5_combout = (!\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|cnt_wait [10] & !\seg_static_inst|cnt_wait [9])))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(\seg_static_inst|cnt_wait [10]),
+ .datad(\seg_static_inst|cnt_wait [9]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~5 .lut_mask = 16'h0001;
+defparam \seg_static_inst|Equal0~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|Equal0~6 (
+// Equation(s):
+// \seg_static_inst|Equal0~6_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|cnt_wait [6] & \seg_static_inst|cnt_wait [5])))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(\seg_static_inst|cnt_wait [6]),
+ .datad(\seg_static_inst|cnt_wait [5]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~6 .lut_mask = 16'h0800;
+defparam \seg_static_inst|Equal0~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Equal0~7 (
+// Equation(s):
+// \seg_static_inst|Equal0~7_combout = (\seg_static_inst|Equal0~4_combout & (\seg_static_inst|cnt_wait [2] & (\seg_static_inst|Equal0~5_combout & \seg_static_inst|Equal0~6_combout )))
+
+ .dataa(\seg_static_inst|Equal0~4_combout ),
+ .datab(\seg_static_inst|cnt_wait [2]),
+ .datac(\seg_static_inst|Equal0~5_combout ),
+ .datad(\seg_static_inst|Equal0~6_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~7 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|add_flag~feeder (
+// Equation(s):
+// \seg_static_inst|add_flag~feeder_combout = \seg_static_inst|Equal0~7_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|add_flag~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|add_flag~feeder .lut_mask = 16'hF0F0;
+defparam \seg_static_inst|add_flag~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N5
+dffeas \seg_static_inst|add_flag (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|add_flag~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|add_flag~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|add_flag .is_wysiwyg = "true";
+defparam \seg_static_inst|add_flag .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|num[0]~0 (
+// Equation(s):
+// \seg_static_inst|num[0]~0_combout = \seg_static_inst|add_flag~q $ (\seg_static_inst|num [0])
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[0]~0 .lut_mask = 16'h3C3C;
+defparam \seg_static_inst|num[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N11
+dffeas \seg_static_inst|num[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|num[1]~1 (
+// Equation(s):
+// \seg_static_inst|num[1]~1_combout = \seg_static_inst|num [1] $ (((\seg_static_inst|add_flag~q & \seg_static_inst|num [0])))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [1]),
+ .datad(\seg_static_inst|num [0]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[1]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[1]~1 .lut_mask = 16'h3CF0;
+defparam \seg_static_inst|num[1]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N1
+dffeas \seg_static_inst|num[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[1]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|num[2]~2 (
+// Equation(s):
+// \seg_static_inst|num[2]~2_combout = \seg_static_inst|num [2] $ (((\seg_static_inst|num [0] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[2]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[2]~2 .lut_mask = 16'h78F0;
+defparam \seg_static_inst|num[2]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N15
+dffeas \seg_static_inst|num[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[2]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|num[3]~3 (
+// Equation(s):
+// \seg_static_inst|num[3]~3_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [2] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [2]),
+ .datac(\seg_static_inst|add_flag~q ),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|num[3]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|num[3]~4 (
+// Equation(s):
+// \seg_static_inst|num[3]~4_combout = \seg_static_inst|num [3] $ (\seg_static_inst|num[3]~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|num [3]),
+ .datad(\seg_static_inst|num[3]~3_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~4 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|num[3]~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N17
+dffeas \seg_static_inst|num[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[3]~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|WideOr1~0 (
+// Equation(s):
+// \seg_static_inst|WideOr1~0_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [3] $ (((\seg_static_inst|num [1]) # (!\seg_static_inst|num [2]))))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr1~0 .lut_mask = 16'h2382;
+defparam \seg_static_inst|WideOr1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N9
+dffeas \seg_static_inst|seg[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr1~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N6
+cycloneive_lcell_comb \seg_static_inst|seg[7]~feeder (
+// Equation(s):
+// \seg_static_inst|seg[7]~feeder_combout = VCC
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|seg[7]~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|seg[7]~feeder .lut_mask = 16'hFFFF;
+defparam \seg_static_inst|seg[7]~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N7
+dffeas \seg_static_inst|seg[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|seg[7]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|WideOr0~0 (
+// Equation(s):
+// \seg_static_inst|WideOr0~0_combout = (\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] $ (!\seg_static_inst|num [1])))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [3] $
+// (!\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr0~0 .lut_mask = 16'h2043;
+defparam \seg_static_inst|WideOr0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N23
+dffeas \seg_static_inst|seg[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~2 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~2_combout = (\hc595_ctrl_inst|cnt_bit [0] & (((\hc595_ctrl_inst|cnt_bit [1]) # (!\seg_static_inst|seg [6])))) # (!\hc595_ctrl_inst|cnt_bit [0] & (!\seg_static_inst|seg [7] & ((!\hc595_ctrl_inst|cnt_bit [1]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [7]),
+ .datac(\seg_static_inst|seg [6]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~2 .lut_mask = 16'hAA1B;
+defparam \hc595_ctrl_inst|Mux0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~3 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~3_combout = (\hc595_ctrl_inst|cnt_bit [1] & ((\hc595_ctrl_inst|Mux0~2_combout & (!\seg_static_inst|seg [4])) # (!\hc595_ctrl_inst|Mux0~2_combout & ((!\seg_static_inst|seg [5]))))) # (!\hc595_ctrl_inst|cnt_bit [1] &
+// (((\hc595_ctrl_inst|Mux0~2_combout ))))
+
+ .dataa(\seg_static_inst|seg [4]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [5]),
+ .datad(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~3 .lut_mask = 16'h770C;
+defparam \hc595_ctrl_inst|Mux0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N20
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~2 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~2_combout = (!\hc595_ctrl_inst|cnt_bit [3] & ((\hc595_ctrl_inst|cnt_bit [2] & ((\hc595_ctrl_inst|Mux0~3_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\seg_static_inst|seg [7]))))
+
+ .dataa(\seg_static_inst|seg [7]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~2 .lut_mask = 16'h3101;
+defparam \hc595_ctrl_inst|ds~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|WideOr4~0 (
+// Equation(s):
+// \seg_static_inst|WideOr4~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [2] & ((\seg_static_inst|num [1]) # (!\seg_static_inst|num [0])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [0] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr4~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr4~0 .lut_mask = 16'hC140;
+defparam \seg_static_inst|WideOr4~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N21
+dffeas \seg_static_inst|seg[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr4~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|WideOr3~0 (
+// Equation(s):
+// \seg_static_inst|WideOr3~0_combout = (\seg_static_inst|num [1] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [2]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [3] & !\seg_static_inst|num [2])))) # (!\seg_static_inst|num [1] &
+// (!\seg_static_inst|num [3] & (\seg_static_inst|num [0] $ (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr3~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr3~0 .lut_mask = 16'hA412;
+defparam \seg_static_inst|WideOr3~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N5
+dffeas \seg_static_inst|seg[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr3~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|WideOr5~0 (
+// Equation(s):
+// \seg_static_inst|WideOr5~0_combout = (\seg_static_inst|num [3] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [1]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [2])))) # (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0] $ (\seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr5~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr5~0 .lut_mask = 16'hD860;
+defparam \seg_static_inst|WideOr5~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N3
+dffeas \seg_static_inst|seg[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr5~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & (\hc595_ctrl_inst|cnt_bit [1])) # (!\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|cnt_bit [1] & ((!\seg_static_inst|seg [1]))) # (!\hc595_ctrl_inst|cnt_bit [1] & (!\seg_static_inst|seg
+// [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [3]),
+ .datad(\seg_static_inst|seg [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~0 .lut_mask = 16'h89CD;
+defparam \hc595_ctrl_inst|Mux0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|WideOr6~0 (
+// Equation(s):
+// \seg_static_inst|WideOr6~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [0] & (\seg_static_inst|num [2] $ (\seg_static_inst|num [1])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [0] $
+// (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr6~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr6~0 .lut_mask = 16'h0892;
+defparam \seg_static_inst|WideOr6~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N29
+dffeas \seg_static_inst|seg[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr6~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~1 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~1_combout = (\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|Mux0~0_combout & ((!\seg_static_inst|seg [0]))) # (!\hc595_ctrl_inst|Mux0~0_combout & (!\seg_static_inst|seg [2])))) # (!\hc595_ctrl_inst|cnt_bit [0] &
+// (((\hc595_ctrl_inst|Mux0~0_combout ))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [2]),
+ .datac(\hc595_ctrl_inst|Mux0~0_combout ),
+ .datad(\seg_static_inst|seg [0]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~1 .lut_mask = 16'h52F2;
+defparam \hc595_ctrl_inst|Mux0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~1 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~1_combout = (\hc595_ctrl_inst|cnt_bit [3] & (!\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Mux0~1_combout ))
+
+ .dataa(gnd),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~1 .lut_mask = 16'h0C00;
+defparam \hc595_ctrl_inst|ds~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~3 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~3_combout = (\hc595_ctrl_inst|ds~0_combout & ((\hc595_ctrl_inst|ds~2_combout ) # ((\hc595_ctrl_inst|ds~1_combout )))) # (!\hc595_ctrl_inst|ds~0_combout & (((\hc595_ctrl_inst|ds~q ))))
+
+ .dataa(\hc595_ctrl_inst|ds~0_combout ),
+ .datab(\hc595_ctrl_inst|ds~2_combout ),
+ .datac(\hc595_ctrl_inst|ds~q ),
+ .datad(\hc595_ctrl_inst|ds~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~3 .lut_mask = 16'hFAD8;
+defparam \hc595_ctrl_inst|ds~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N31
+dffeas \hc595_ctrl_inst|ds (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|ds~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|ds~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|ds .power_up = "low";
+// synopsys translate_on
+
+assign stcp = \stcp~output_o ;
+
+assign shcp = \shcp~output_o ;
+
+assign ds = \ds~output_o ;
+
+assign oe = \oe~output_o ;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_slow.vo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_slow.vo
new file mode 100644
index 0000000..dcc58a1
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_slow.vo
@@ -0,0 +1,2444 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+// VENDOR "Altera"
+// PROGRAM "Quartus II 64-Bit"
+// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version"
+
+// DATE "06/02/2023 20:55:14"
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This Verilog file should be used for ModelSim (Verilog) only
+//
+
+`timescale 1 ps/ 1 ps
+
+module seg_595_static (
+ sys_clk,
+ sys_rst_n,
+ stcp,
+ shcp,
+ ds,
+ oe);
+input sys_clk;
+input sys_rst_n;
+output stcp;
+output shcp;
+output ds;
+output oe;
+
+// Design Ports Information
+// stcp => Location: PIN_Y1, I/O Standard: 2.5 V, Current Strength: Default
+// shcp => Location: PIN_W1, I/O Standard: 2.5 V, Current Strength: Default
+// ds => Location: PIN_AA1, I/O Standard: 2.5 V, Current Strength: Default
+// oe => Location: PIN_Y2, I/O Standard: 2.5 V, Current Strength: Default
+// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default
+// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default
+
+
+wire gnd;
+wire vcc;
+wire unknown;
+
+assign gnd = 1'b0;
+assign vcc = 1'b1;
+assign unknown = 1'bx;
+
+tri1 devclrn;
+tri1 devpor;
+tri1 devoe;
+// synopsys translate_off
+initial $sdf_annotate("seg_595_static_8_1200mv_0c_v_slow.sdo");
+// synopsys translate_on
+
+wire \seg_static_inst|Add0~4_combout ;
+wire \seg_static_inst|Add0~14_combout ;
+wire \seg_static_inst|Add0~19 ;
+wire \seg_static_inst|Add0~20_combout ;
+wire \seg_static_inst|Add0~21 ;
+wire \seg_static_inst|Add0~22_combout ;
+wire \seg_static_inst|Add0~23 ;
+wire \seg_static_inst|Add0~24_combout ;
+wire \seg_static_inst|Add0~25 ;
+wire \seg_static_inst|Add0~26_combout ;
+wire \seg_static_inst|Add0~27 ;
+wire \seg_static_inst|Add0~28_combout ;
+wire \seg_static_inst|Add0~29 ;
+wire \seg_static_inst|Add0~30_combout ;
+wire \seg_static_inst|Add0~31 ;
+wire \seg_static_inst|Add0~32_combout ;
+wire \seg_static_inst|Add0~33 ;
+wire \seg_static_inst|Add0~34_combout ;
+wire \seg_static_inst|Add0~35 ;
+wire \seg_static_inst|Add0~36_combout ;
+wire \seg_static_inst|Add0~37 ;
+wire \seg_static_inst|Add0~38_combout ;
+wire \seg_static_inst|Add0~39 ;
+wire \seg_static_inst|Add0~40_combout ;
+wire \seg_static_inst|Add0~41 ;
+wire \seg_static_inst|Add0~42_combout ;
+wire \seg_static_inst|Add0~43 ;
+wire \seg_static_inst|Add0~44_combout ;
+wire \seg_static_inst|Add0~45 ;
+wire \seg_static_inst|Add0~46_combout ;
+wire \hc595_ctrl_inst|ds~0_combout ;
+wire \seg_static_inst|WideOr2~0_combout ;
+wire \seg_static_inst|Equal0~0_combout ;
+wire \seg_static_inst|Equal0~1_combout ;
+wire \seg_static_inst|Equal0~2_combout ;
+wire \seg_static_inst|Equal0~3_combout ;
+wire \seg_static_inst|Equal0~4_combout ;
+wire \seg_static_inst|cnt_wait~0_combout ;
+wire \seg_static_inst|cnt_wait~1_combout ;
+wire \seg_static_inst|cnt_wait~2_combout ;
+wire \seg_static_inst|cnt_wait~3_combout ;
+wire \seg_static_inst|cnt_wait~4_combout ;
+wire \seg_static_inst|cnt_wait~5_combout ;
+wire \seg_static_inst|cnt_wait~6_combout ;
+wire \seg_static_inst|cnt_wait~7_combout ;
+wire \seg_static_inst|cnt_wait~8_combout ;
+wire \seg_static_inst|cnt_wait~9_combout ;
+wire \seg_static_inst|cnt_wait~10_combout ;
+wire \stcp~output_o ;
+wire \shcp~output_o ;
+wire \ds~output_o ;
+wire \oe~output_o ;
+wire \sys_clk~input_o ;
+wire \sys_clk~inputclkctrl_outclk ;
+wire \hc595_ctrl_inst|cnt_4[0]~0_combout ;
+wire \sys_rst_n~input_o ;
+wire \hc595_ctrl_inst|cnt_bit[0]~1_combout ;
+wire \hc595_ctrl_inst|cnt_bit[1]~0_combout ;
+wire \hc595_ctrl_inst|always2~0_combout ;
+wire \seg_static_inst|Add0~0_combout ;
+wire \hc595_ctrl_inst|Equal1~0_combout ;
+wire \hc595_ctrl_inst|cnt_bit[3]~2_combout ;
+wire \hc595_ctrl_inst|always2~1_combout ;
+wire \hc595_ctrl_inst|stcp~feeder_combout ;
+wire \hc595_ctrl_inst|stcp~q ;
+wire \hc595_ctrl_inst|shcp~q ;
+wire \hc595_ctrl_inst|cnt_bit[2]~3_combout ;
+wire \seg_static_inst|Add0~1 ;
+wire \seg_static_inst|Add0~2_combout ;
+wire \seg_static_inst|Add0~3 ;
+wire \seg_static_inst|Add0~5 ;
+wire \seg_static_inst|Add0~6_combout ;
+wire \seg_static_inst|Add0~7 ;
+wire \seg_static_inst|Add0~8_combout ;
+wire \seg_static_inst|Add0~9 ;
+wire \seg_static_inst|Add0~10_combout ;
+wire \seg_static_inst|cnt_wait~11_combout ;
+wire \seg_static_inst|Add0~11 ;
+wire \seg_static_inst|Add0~12_combout ;
+wire \seg_static_inst|Add0~13 ;
+wire \seg_static_inst|Add0~15 ;
+wire \seg_static_inst|Add0~16_combout ;
+wire \seg_static_inst|Add0~17 ;
+wire \seg_static_inst|Add0~18_combout ;
+wire \seg_static_inst|Equal0~5_combout ;
+wire \seg_static_inst|Equal0~6_combout ;
+wire \seg_static_inst|Equal0~7_combout ;
+wire \seg_static_inst|add_flag~feeder_combout ;
+wire \seg_static_inst|add_flag~q ;
+wire \seg_static_inst|num[0]~0_combout ;
+wire \seg_static_inst|num[1]~1_combout ;
+wire \seg_static_inst|num[2]~2_combout ;
+wire \seg_static_inst|num[3]~3_combout ;
+wire \seg_static_inst|num[3]~4_combout ;
+wire \seg_static_inst|WideOr1~0_combout ;
+wire \seg_static_inst|seg[7]~feeder_combout ;
+wire \seg_static_inst|WideOr0~0_combout ;
+wire \hc595_ctrl_inst|Mux0~2_combout ;
+wire \hc595_ctrl_inst|Mux0~3_combout ;
+wire \hc595_ctrl_inst|ds~2_combout ;
+wire \seg_static_inst|WideOr4~0_combout ;
+wire \seg_static_inst|WideOr3~0_combout ;
+wire \seg_static_inst|WideOr5~0_combout ;
+wire \hc595_ctrl_inst|Mux0~0_combout ;
+wire \seg_static_inst|WideOr6~0_combout ;
+wire \hc595_ctrl_inst|Mux0~1_combout ;
+wire \hc595_ctrl_inst|ds~1_combout ;
+wire \hc595_ctrl_inst|ds~3_combout ;
+wire \hc595_ctrl_inst|ds~q ;
+wire [7:0] \seg_static_inst|seg ;
+wire [3:0] \seg_static_inst|num ;
+wire [24:0] \seg_static_inst|cnt_wait ;
+wire [3:0] \hc595_ctrl_inst|cnt_bit ;
+wire [1:0] \hc595_ctrl_inst|cnt_4 ;
+
+
+// Location: LCCOMB_X14_Y13_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~4 (
+// Equation(s):
+// \seg_static_inst|Add0~4_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|Add0~3 $ (GND))) # (!\seg_static_inst|cnt_wait [3] & (!\seg_static_inst|Add0~3 & VCC))
+// \seg_static_inst|Add0~5 = CARRY((\seg_static_inst|cnt_wait [3] & !\seg_static_inst|Add0~3 ))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~3 ),
+ .combout(\seg_static_inst|Add0~4_combout ),
+ .cout(\seg_static_inst|Add0~5 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~4 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~4 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~14 (
+// Equation(s):
+// \seg_static_inst|Add0~14_combout = (\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|Add0~13 )) # (!\seg_static_inst|cnt_wait [8] & ((\seg_static_inst|Add0~13 ) # (GND)))
+// \seg_static_inst|Add0~15 = CARRY((!\seg_static_inst|Add0~13 ) # (!\seg_static_inst|cnt_wait [8]))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~13 ),
+ .combout(\seg_static_inst|Add0~14_combout ),
+ .cout(\seg_static_inst|Add0~15 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~14 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~14 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|Add0~18 (
+// Equation(s):
+// \seg_static_inst|Add0~18_combout = (\seg_static_inst|cnt_wait [10] & (!\seg_static_inst|Add0~17 )) # (!\seg_static_inst|cnt_wait [10] & ((\seg_static_inst|Add0~17 ) # (GND)))
+// \seg_static_inst|Add0~19 = CARRY((!\seg_static_inst|Add0~17 ) # (!\seg_static_inst|cnt_wait [10]))
+
+ .dataa(\seg_static_inst|cnt_wait [10]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~17 ),
+ .combout(\seg_static_inst|Add0~18_combout ),
+ .cout(\seg_static_inst|Add0~19 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~18 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~18 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|Add0~20 (
+// Equation(s):
+// \seg_static_inst|Add0~20_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|Add0~19 $ (GND))) # (!\seg_static_inst|cnt_wait [11] & (!\seg_static_inst|Add0~19 & VCC))
+// \seg_static_inst|Add0~21 = CARRY((\seg_static_inst|cnt_wait [11] & !\seg_static_inst|Add0~19 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [11]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~19 ),
+ .combout(\seg_static_inst|Add0~20_combout ),
+ .cout(\seg_static_inst|Add0~21 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~20 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~20 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N30
+cycloneive_lcell_comb \seg_static_inst|Add0~22 (
+// Equation(s):
+// \seg_static_inst|Add0~22_combout = (\seg_static_inst|cnt_wait [12] & (!\seg_static_inst|Add0~21 )) # (!\seg_static_inst|cnt_wait [12] & ((\seg_static_inst|Add0~21 ) # (GND)))
+// \seg_static_inst|Add0~23 = CARRY((!\seg_static_inst|Add0~21 ) # (!\seg_static_inst|cnt_wait [12]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [12]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~21 ),
+ .combout(\seg_static_inst|Add0~22_combout ),
+ .cout(\seg_static_inst|Add0~23 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~22 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~22 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|Add0~24 (
+// Equation(s):
+// \seg_static_inst|Add0~24_combout = (\seg_static_inst|cnt_wait [13] & (\seg_static_inst|Add0~23 $ (GND))) # (!\seg_static_inst|cnt_wait [13] & (!\seg_static_inst|Add0~23 & VCC))
+// \seg_static_inst|Add0~25 = CARRY((\seg_static_inst|cnt_wait [13] & !\seg_static_inst|Add0~23 ))
+
+ .dataa(\seg_static_inst|cnt_wait [13]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~23 ),
+ .combout(\seg_static_inst|Add0~24_combout ),
+ .cout(\seg_static_inst|Add0~25 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~24 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~24 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|Add0~26 (
+// Equation(s):
+// \seg_static_inst|Add0~26_combout = (\seg_static_inst|cnt_wait [14] & (!\seg_static_inst|Add0~25 )) # (!\seg_static_inst|cnt_wait [14] & ((\seg_static_inst|Add0~25 ) # (GND)))
+// \seg_static_inst|Add0~27 = CARRY((!\seg_static_inst|Add0~25 ) # (!\seg_static_inst|cnt_wait [14]))
+
+ .dataa(\seg_static_inst|cnt_wait [14]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~25 ),
+ .combout(\seg_static_inst|Add0~26_combout ),
+ .cout(\seg_static_inst|Add0~27 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~26 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~26 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|Add0~28 (
+// Equation(s):
+// \seg_static_inst|Add0~28_combout = (\seg_static_inst|cnt_wait [15] & (\seg_static_inst|Add0~27 $ (GND))) # (!\seg_static_inst|cnt_wait [15] & (!\seg_static_inst|Add0~27 & VCC))
+// \seg_static_inst|Add0~29 = CARRY((\seg_static_inst|cnt_wait [15] & !\seg_static_inst|Add0~27 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [15]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~27 ),
+ .combout(\seg_static_inst|Add0~28_combout ),
+ .cout(\seg_static_inst|Add0~29 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~28 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~28 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|Add0~30 (
+// Equation(s):
+// \seg_static_inst|Add0~30_combout = (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|Add0~29 )) # (!\seg_static_inst|cnt_wait [16] & ((\seg_static_inst|Add0~29 ) # (GND)))
+// \seg_static_inst|Add0~31 = CARRY((!\seg_static_inst|Add0~29 ) # (!\seg_static_inst|cnt_wait [16]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~29 ),
+ .combout(\seg_static_inst|Add0~30_combout ),
+ .cout(\seg_static_inst|Add0~31 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~30 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~30 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~32 (
+// Equation(s):
+// \seg_static_inst|Add0~32_combout = (\seg_static_inst|cnt_wait [17] & (\seg_static_inst|Add0~31 $ (GND))) # (!\seg_static_inst|cnt_wait [17] & (!\seg_static_inst|Add0~31 & VCC))
+// \seg_static_inst|Add0~33 = CARRY((\seg_static_inst|cnt_wait [17] & !\seg_static_inst|Add0~31 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [17]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~31 ),
+ .combout(\seg_static_inst|Add0~32_combout ),
+ .cout(\seg_static_inst|Add0~33 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~32 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~32 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~34 (
+// Equation(s):
+// \seg_static_inst|Add0~34_combout = (\seg_static_inst|cnt_wait [18] & (!\seg_static_inst|Add0~33 )) # (!\seg_static_inst|cnt_wait [18] & ((\seg_static_inst|Add0~33 ) # (GND)))
+// \seg_static_inst|Add0~35 = CARRY((!\seg_static_inst|Add0~33 ) # (!\seg_static_inst|cnt_wait [18]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [18]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~33 ),
+ .combout(\seg_static_inst|Add0~34_combout ),
+ .cout(\seg_static_inst|Add0~35 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~34 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~34 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~36 (
+// Equation(s):
+// \seg_static_inst|Add0~36_combout = (\seg_static_inst|cnt_wait [19] & (\seg_static_inst|Add0~35 $ (GND))) # (!\seg_static_inst|cnt_wait [19] & (!\seg_static_inst|Add0~35 & VCC))
+// \seg_static_inst|Add0~37 = CARRY((\seg_static_inst|cnt_wait [19] & !\seg_static_inst|Add0~35 ))
+
+ .dataa(\seg_static_inst|cnt_wait [19]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~35 ),
+ .combout(\seg_static_inst|Add0~36_combout ),
+ .cout(\seg_static_inst|Add0~37 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~36 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~36 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~38 (
+// Equation(s):
+// \seg_static_inst|Add0~38_combout = (\seg_static_inst|cnt_wait [20] & (!\seg_static_inst|Add0~37 )) # (!\seg_static_inst|cnt_wait [20] & ((\seg_static_inst|Add0~37 ) # (GND)))
+// \seg_static_inst|Add0~39 = CARRY((!\seg_static_inst|Add0~37 ) # (!\seg_static_inst|cnt_wait [20]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~37 ),
+ .combout(\seg_static_inst|Add0~38_combout ),
+ .cout(\seg_static_inst|Add0~39 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~38 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~38 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~40 (
+// Equation(s):
+// \seg_static_inst|Add0~40_combout = (\seg_static_inst|cnt_wait [21] & (\seg_static_inst|Add0~39 $ (GND))) # (!\seg_static_inst|cnt_wait [21] & (!\seg_static_inst|Add0~39 & VCC))
+// \seg_static_inst|Add0~41 = CARRY((\seg_static_inst|cnt_wait [21] & !\seg_static_inst|Add0~39 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [21]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~39 ),
+ .combout(\seg_static_inst|Add0~40_combout ),
+ .cout(\seg_static_inst|Add0~41 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~40 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~40 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~42 (
+// Equation(s):
+// \seg_static_inst|Add0~42_combout = (\seg_static_inst|cnt_wait [22] & (!\seg_static_inst|Add0~41 )) # (!\seg_static_inst|cnt_wait [22] & ((\seg_static_inst|Add0~41 ) # (GND)))
+// \seg_static_inst|Add0~43 = CARRY((!\seg_static_inst|Add0~41 ) # (!\seg_static_inst|cnt_wait [22]))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~41 ),
+ .combout(\seg_static_inst|Add0~42_combout ),
+ .cout(\seg_static_inst|Add0~43 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~42 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~42 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~44 (
+// Equation(s):
+// \seg_static_inst|Add0~44_combout = (\seg_static_inst|cnt_wait [23] & (\seg_static_inst|Add0~43 $ (GND))) # (!\seg_static_inst|cnt_wait [23] & (!\seg_static_inst|Add0~43 & VCC))
+// \seg_static_inst|Add0~45 = CARRY((\seg_static_inst|cnt_wait [23] & !\seg_static_inst|Add0~43 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~43 ),
+ .combout(\seg_static_inst|Add0~44_combout ),
+ .cout(\seg_static_inst|Add0~45 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~44 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~44 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~46 (
+// Equation(s):
+// \seg_static_inst|Add0~46_combout = \seg_static_inst|Add0~45 $ (\seg_static_inst|cnt_wait [24])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(\seg_static_inst|Add0~45 ),
+ .combout(\seg_static_inst|Add0~46_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Add0~46 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|Add0~46 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N10
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~0 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~0_combout = (!\hc595_ctrl_inst|cnt_4 [1] & !\hc595_ctrl_inst|cnt_4 [0])
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~0 .lut_mask = 16'h0505;
+defparam \hc595_ctrl_inst|ds~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N27
+dffeas \seg_static_inst|seg[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr2~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|WideOr2~0 (
+// Equation(s):
+// \seg_static_inst|WideOr2~0_combout = (\seg_static_inst|num [1] & (\seg_static_inst|num [0] & (!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [1] & ((\seg_static_inst|num [2] & ((!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr2~0 .lut_mask = 16'h223A;
+defparam \seg_static_inst|WideOr2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N3
+dffeas \seg_static_inst|cnt_wait[24] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [24]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[24] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N21
+dffeas \seg_static_inst|cnt_wait[23] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~44_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [23]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[23] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[23] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|Equal0~0 (
+// Equation(s):
+// \seg_static_inst|Equal0~0_combout = (\hc595_ctrl_inst|cnt_4 [1] & (!\seg_static_inst|cnt_wait [23] & (\hc595_ctrl_inst|cnt_4 [0] & \seg_static_inst|cnt_wait [24])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~0 .lut_mask = 16'h2000;
+defparam \seg_static_inst|Equal0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N7
+dffeas \seg_static_inst|cnt_wait[22] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [22]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[22] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N25
+dffeas \seg_static_inst|cnt_wait[21] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [21]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[21] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N9
+dffeas \seg_static_inst|cnt_wait[20] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [20]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[20] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N27
+dffeas \seg_static_inst|cnt_wait[19] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [19]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[19] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[19] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Equal0~1 (
+// Equation(s):
+// \seg_static_inst|Equal0~1_combout = (\seg_static_inst|cnt_wait [22] & (\seg_static_inst|cnt_wait [20] & (\seg_static_inst|cnt_wait [19] & \seg_static_inst|cnt_wait [21])))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(\seg_static_inst|cnt_wait [19]),
+ .datad(\seg_static_inst|cnt_wait [21]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~1 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N29
+dffeas \seg_static_inst|cnt_wait[18] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~5_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[18] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N29
+dffeas \seg_static_inst|cnt_wait[16] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[16] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N9
+dffeas \seg_static_inst|cnt_wait[17] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~32_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[17] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N5
+dffeas \seg_static_inst|cnt_wait[15] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~28_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[15] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Equal0~2 (
+// Equation(s):
+// \seg_static_inst|Equal0~2_combout = (!\seg_static_inst|cnt_wait [17] & (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|cnt_wait [15] & \seg_static_inst|cnt_wait [18])))
+
+ .dataa(\seg_static_inst|cnt_wait [17]),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(\seg_static_inst|cnt_wait [15]),
+ .datad(\seg_static_inst|cnt_wait [18]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~2 .lut_mask = 16'h0400;
+defparam \seg_static_inst|Equal0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N21
+dffeas \seg_static_inst|cnt_wait[14] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~7_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[14] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N31
+dffeas \seg_static_inst|cnt_wait[13] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[13] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N23
+dffeas \seg_static_inst|cnt_wait[12] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~9_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[12] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N1
+dffeas \seg_static_inst|cnt_wait[11] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~10_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[11] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|Equal0~3 (
+// Equation(s):
+// \seg_static_inst|Equal0~3_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|cnt_wait [14] & (\seg_static_inst|cnt_wait [12] & \seg_static_inst|cnt_wait [13])))
+
+ .dataa(\seg_static_inst|cnt_wait [11]),
+ .datab(\seg_static_inst|cnt_wait [14]),
+ .datac(\seg_static_inst|cnt_wait [12]),
+ .datad(\seg_static_inst|cnt_wait [13]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Equal0~4 (
+// Equation(s):
+// \seg_static_inst|Equal0~4_combout = (\seg_static_inst|Equal0~1_combout & (\seg_static_inst|Equal0~2_combout & (\seg_static_inst|Equal0~3_combout & \seg_static_inst|Equal0~0_combout )))
+
+ .dataa(\seg_static_inst|Equal0~1_combout ),
+ .datab(\seg_static_inst|Equal0~2_combout ),
+ .datac(\seg_static_inst|Equal0~3_combout ),
+ .datad(\seg_static_inst|Equal0~0_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~4 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N23
+dffeas \seg_static_inst|cnt_wait[8] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~14_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[8] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N13
+dffeas \seg_static_inst|cnt_wait[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~0 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~0_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~46_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~46_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~0 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~1 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~1_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~42_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~42_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~1 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~2 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~2_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~40_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~40_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~2 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~3 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~3_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~38_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~38_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~3 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~4 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~4_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~36_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~36_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~4 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~5 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~5_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~34_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~34_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~5 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~6 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~6_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~30_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~30_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~6 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~7 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~7_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~26_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~26_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~7 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N30
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~8 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~8_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~24_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~24_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~8_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~8 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~8 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~9 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~9_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~22_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~22_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~9_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~9 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~9 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~10 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~10_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~20_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Equal0~7_combout ),
+ .datac(\seg_static_inst|Add0~20_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~10_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~10 .lut_mask = 16'h3030;
+defparam \seg_static_inst|cnt_wait~10 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N9
+cycloneive_io_obuf \stcp~output (
+ .i(\hc595_ctrl_inst|stcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\stcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \stcp~output .bus_hold = "false";
+defparam \stcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y7_N23
+cycloneive_io_obuf \shcp~output (
+ .i(\hc595_ctrl_inst|shcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\shcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \shcp~output .bus_hold = "false";
+defparam \shcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y5_N16
+cycloneive_io_obuf \ds~output (
+ .i(\hc595_ctrl_inst|ds~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\ds~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \ds~output .bus_hold = "false";
+defparam \ds~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N2
+cycloneive_io_obuf \oe~output (
+ .i(!\sys_rst_n~input_o ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\oe~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \oe~output .bus_hold = "false";
+defparam \oe~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y15_N22
+cycloneive_io_ibuf \sys_clk~input (
+ .i(sys_clk),
+ .ibar(gnd),
+ .o(\sys_clk~input_o ));
+// synopsys translate_off
+defparam \sys_clk~input .bus_hold = "false";
+defparam \sys_clk~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G8
+cycloneive_clkctrl \sys_clk~inputclkctrl (
+ .ena(vcc),
+ .inclk({vcc,vcc,vcc,\sys_clk~input_o }),
+ .clkselect(2'b00),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .outclk(\sys_clk~inputclkctrl_outclk ));
+// synopsys translate_off
+defparam \sys_clk~inputclkctrl .clock_type = "global clock";
+defparam \sys_clk~inputclkctrl .ena_register_mode = "none";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_4[0]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_4[0]~0_combout = !\hc595_ctrl_inst|cnt_4 [0]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .lut_mask = 16'h0F0F;
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y4_N1
+cycloneive_io_ibuf \sys_rst_n~input (
+ .i(sys_rst_n),
+ .ibar(gnd),
+ .o(\sys_rst_n~input_o ));
+// synopsys translate_off
+defparam \sys_rst_n~input .bus_hold = "false";
+defparam \sys_rst_n~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N7
+dffeas \hc595_ctrl_inst|cnt_4[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N14
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[0]~1 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[0]~1_combout = \hc595_ctrl_inst|cnt_bit [0] $ (((\hc595_ctrl_inst|cnt_4 [1] & \hc595_ctrl_inst|cnt_4 [0])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\hc595_ctrl_inst|cnt_4 [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .lut_mask = 16'h7878;
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N15
+dffeas \hc595_ctrl_inst|cnt_bit[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[1]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[1]~0_combout = (\hc595_ctrl_inst|Equal1~0_combout & (!\hc595_ctrl_inst|always2~1_combout & (\hc595_ctrl_inst|cnt_bit [0] $ (\hc595_ctrl_inst|cnt_bit [1])))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit
+// [1]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [1]),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .lut_mask = 16'h5078;
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N25
+dffeas \hc595_ctrl_inst|cnt_bit[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N0
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~0 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & \hc595_ctrl_inst|cnt_bit [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|always2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~0 (
+// Equation(s):
+// \seg_static_inst|Add0~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] $ (VCC))) # (!\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] & VCC))
+// \seg_static_inst|Add0~1 = CARRY((\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1]))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [0]),
+ .datab(\hc595_ctrl_inst|cnt_4 [1]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(gnd),
+ .combout(\seg_static_inst|Add0~0_combout ),
+ .cout(\seg_static_inst|Add0~1 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~0 .lut_mask = 16'h6688;
+defparam \seg_static_inst|Add0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N9
+dffeas \hc595_ctrl_inst|cnt_4[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N22
+cycloneive_lcell_comb \hc595_ctrl_inst|Equal1~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Equal1~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\hc595_ctrl_inst|cnt_4 [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Equal1~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|Equal1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N16
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[3]~2 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[3]~2_combout = (\hc595_ctrl_inst|always2~0_combout & ((\hc595_ctrl_inst|cnt_bit [3] & ((!\hc595_ctrl_inst|Equal1~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Equal1~0_combout
+// )))) # (!\hc595_ctrl_inst|always2~0_combout & (((\hc595_ctrl_inst|cnt_bit [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|always2~0_combout ),
+ .datac(\hc595_ctrl_inst|cnt_bit [3]),
+ .datad(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .lut_mask = 16'h38F0;
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N17
+dffeas \hc595_ctrl_inst|cnt_bit[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N28
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~1 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~1_combout = (!\hc595_ctrl_inst|cnt_bit [2] & (\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|Equal1~0_combout & \hc595_ctrl_inst|always2~0_combout )))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~1 .lut_mask = 16'h4000;
+defparam \hc595_ctrl_inst|always2~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N4
+cycloneive_lcell_comb \hc595_ctrl_inst|stcp~feeder (
+// Equation(s):
+// \hc595_ctrl_inst|stcp~feeder_combout = \hc595_ctrl_inst|always2~1_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp~feeder .lut_mask = 16'hFF00;
+defparam \hc595_ctrl_inst|stcp~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N5
+dffeas \hc595_ctrl_inst|stcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|stcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|stcp .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N19
+dffeas \hc595_ctrl_inst|shcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(gnd),
+ .asdata(\hc595_ctrl_inst|cnt_4 [1]),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|shcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|shcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|shcp .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N26
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[2]~3 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[2]~3_combout = (\hc595_ctrl_inst|Equal1~0_combout & ((\hc595_ctrl_inst|cnt_bit [2] & ((!\hc595_ctrl_inst|always2~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\hc595_ctrl_inst|cnt_bit [3] &
+// \hc595_ctrl_inst|always2~0_combout )))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit [2]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .lut_mask = 16'h52F0;
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N27
+dffeas \hc595_ctrl_inst|cnt_bit[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~2 (
+// Equation(s):
+// \seg_static_inst|Add0~2_combout = (\seg_static_inst|cnt_wait [2] & (!\seg_static_inst|Add0~1 )) # (!\seg_static_inst|cnt_wait [2] & ((\seg_static_inst|Add0~1 ) # (GND)))
+// \seg_static_inst|Add0~3 = CARRY((!\seg_static_inst|Add0~1 ) # (!\seg_static_inst|cnt_wait [2]))
+
+ .dataa(\seg_static_inst|cnt_wait [2]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~1 ),
+ .combout(\seg_static_inst|Add0~2_combout ),
+ .cout(\seg_static_inst|Add0~3 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~2 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~2 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N11
+dffeas \seg_static_inst|cnt_wait[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~6 (
+// Equation(s):
+// \seg_static_inst|Add0~6_combout = (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|Add0~5 )) # (!\seg_static_inst|cnt_wait [4] & ((\seg_static_inst|Add0~5 ) # (GND)))
+// \seg_static_inst|Add0~7 = CARRY((!\seg_static_inst|Add0~5 ) # (!\seg_static_inst|cnt_wait [4]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~5 ),
+ .combout(\seg_static_inst|Add0~6_combout ),
+ .cout(\seg_static_inst|Add0~7 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~6 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~6 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N15
+dffeas \seg_static_inst|cnt_wait[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~8 (
+// Equation(s):
+// \seg_static_inst|Add0~8_combout = (\seg_static_inst|cnt_wait [5] & (\seg_static_inst|Add0~7 $ (GND))) # (!\seg_static_inst|cnt_wait [5] & (!\seg_static_inst|Add0~7 & VCC))
+// \seg_static_inst|Add0~9 = CARRY((\seg_static_inst|cnt_wait [5] & !\seg_static_inst|Add0~7 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [5]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~7 ),
+ .combout(\seg_static_inst|Add0~8_combout ),
+ .cout(\seg_static_inst|Add0~9 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~8 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~8 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N17
+dffeas \seg_static_inst|cnt_wait[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~10 (
+// Equation(s):
+// \seg_static_inst|Add0~10_combout = (\seg_static_inst|cnt_wait [6] & (!\seg_static_inst|Add0~9 )) # (!\seg_static_inst|cnt_wait [6] & ((\seg_static_inst|Add0~9 ) # (GND)))
+// \seg_static_inst|Add0~11 = CARRY((!\seg_static_inst|Add0~9 ) # (!\seg_static_inst|cnt_wait [6]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [6]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~9 ),
+ .combout(\seg_static_inst|Add0~10_combout ),
+ .cout(\seg_static_inst|Add0~11 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~10 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~10 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~11 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~11_combout = (\seg_static_inst|Add0~10_combout & !\seg_static_inst|Equal0~7_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Add0~10_combout ),
+ .datac(gnd),
+ .datad(\seg_static_inst|Equal0~7_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~11_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~11 .lut_mask = 16'h00CC;
+defparam \seg_static_inst|cnt_wait~11 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N5
+dffeas \seg_static_inst|cnt_wait[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~11_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~12 (
+// Equation(s):
+// \seg_static_inst|Add0~12_combout = (\seg_static_inst|cnt_wait [7] & (\seg_static_inst|Add0~11 $ (GND))) # (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|Add0~11 & VCC))
+// \seg_static_inst|Add0~13 = CARRY((\seg_static_inst|cnt_wait [7] & !\seg_static_inst|Add0~11 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~11 ),
+ .combout(\seg_static_inst|Add0~12_combout ),
+ .cout(\seg_static_inst|Add0~13 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~12 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~12 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N21
+dffeas \seg_static_inst|cnt_wait[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~12_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N24
+cycloneive_lcell_comb \seg_static_inst|Add0~16 (
+// Equation(s):
+// \seg_static_inst|Add0~16_combout = (\seg_static_inst|cnt_wait [9] & (\seg_static_inst|Add0~15 $ (GND))) # (!\seg_static_inst|cnt_wait [9] & (!\seg_static_inst|Add0~15 & VCC))
+// \seg_static_inst|Add0~17 = CARRY((\seg_static_inst|cnt_wait [9] & !\seg_static_inst|Add0~15 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [9]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~15 ),
+ .combout(\seg_static_inst|Add0~16_combout ),
+ .cout(\seg_static_inst|Add0~17 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~16 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~16 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N25
+dffeas \seg_static_inst|cnt_wait[9] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~16_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[9] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N27
+dffeas \seg_static_inst|cnt_wait[10] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~18_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[10] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|Equal0~5 (
+// Equation(s):
+// \seg_static_inst|Equal0~5_combout = (!\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|cnt_wait [10] & !\seg_static_inst|cnt_wait [9])))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(\seg_static_inst|cnt_wait [10]),
+ .datad(\seg_static_inst|cnt_wait [9]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~5 .lut_mask = 16'h0001;
+defparam \seg_static_inst|Equal0~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|Equal0~6 (
+// Equation(s):
+// \seg_static_inst|Equal0~6_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|cnt_wait [6] & \seg_static_inst|cnt_wait [5])))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(\seg_static_inst|cnt_wait [6]),
+ .datad(\seg_static_inst|cnt_wait [5]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~6 .lut_mask = 16'h0800;
+defparam \seg_static_inst|Equal0~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Equal0~7 (
+// Equation(s):
+// \seg_static_inst|Equal0~7_combout = (\seg_static_inst|Equal0~4_combout & (\seg_static_inst|cnt_wait [2] & (\seg_static_inst|Equal0~5_combout & \seg_static_inst|Equal0~6_combout )))
+
+ .dataa(\seg_static_inst|Equal0~4_combout ),
+ .datab(\seg_static_inst|cnt_wait [2]),
+ .datac(\seg_static_inst|Equal0~5_combout ),
+ .datad(\seg_static_inst|Equal0~6_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~7 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|add_flag~feeder (
+// Equation(s):
+// \seg_static_inst|add_flag~feeder_combout = \seg_static_inst|Equal0~7_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|add_flag~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|add_flag~feeder .lut_mask = 16'hF0F0;
+defparam \seg_static_inst|add_flag~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N5
+dffeas \seg_static_inst|add_flag (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|add_flag~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|add_flag~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|add_flag .is_wysiwyg = "true";
+defparam \seg_static_inst|add_flag .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|num[0]~0 (
+// Equation(s):
+// \seg_static_inst|num[0]~0_combout = \seg_static_inst|add_flag~q $ (\seg_static_inst|num [0])
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[0]~0 .lut_mask = 16'h3C3C;
+defparam \seg_static_inst|num[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N11
+dffeas \seg_static_inst|num[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|num[1]~1 (
+// Equation(s):
+// \seg_static_inst|num[1]~1_combout = \seg_static_inst|num [1] $ (((\seg_static_inst|add_flag~q & \seg_static_inst|num [0])))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [1]),
+ .datad(\seg_static_inst|num [0]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[1]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[1]~1 .lut_mask = 16'h3CF0;
+defparam \seg_static_inst|num[1]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N1
+dffeas \seg_static_inst|num[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[1]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|num[2]~2 (
+// Equation(s):
+// \seg_static_inst|num[2]~2_combout = \seg_static_inst|num [2] $ (((\seg_static_inst|num [0] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[2]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[2]~2 .lut_mask = 16'h78F0;
+defparam \seg_static_inst|num[2]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N15
+dffeas \seg_static_inst|num[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[2]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|num[3]~3 (
+// Equation(s):
+// \seg_static_inst|num[3]~3_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [2] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [2]),
+ .datac(\seg_static_inst|add_flag~q ),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|num[3]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|num[3]~4 (
+// Equation(s):
+// \seg_static_inst|num[3]~4_combout = \seg_static_inst|num [3] $ (\seg_static_inst|num[3]~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|num [3]),
+ .datad(\seg_static_inst|num[3]~3_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~4 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|num[3]~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N17
+dffeas \seg_static_inst|num[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[3]~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|WideOr1~0 (
+// Equation(s):
+// \seg_static_inst|WideOr1~0_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [3] $ (((\seg_static_inst|num [1]) # (!\seg_static_inst|num [2]))))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr1~0 .lut_mask = 16'h2382;
+defparam \seg_static_inst|WideOr1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N9
+dffeas \seg_static_inst|seg[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr1~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N6
+cycloneive_lcell_comb \seg_static_inst|seg[7]~feeder (
+// Equation(s):
+// \seg_static_inst|seg[7]~feeder_combout = VCC
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|seg[7]~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|seg[7]~feeder .lut_mask = 16'hFFFF;
+defparam \seg_static_inst|seg[7]~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N7
+dffeas \seg_static_inst|seg[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|seg[7]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|WideOr0~0 (
+// Equation(s):
+// \seg_static_inst|WideOr0~0_combout = (\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] $ (!\seg_static_inst|num [1])))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [3] $
+// (!\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr0~0 .lut_mask = 16'h2043;
+defparam \seg_static_inst|WideOr0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N23
+dffeas \seg_static_inst|seg[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~2 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~2_combout = (\hc595_ctrl_inst|cnt_bit [0] & (((\hc595_ctrl_inst|cnt_bit [1]) # (!\seg_static_inst|seg [6])))) # (!\hc595_ctrl_inst|cnt_bit [0] & (!\seg_static_inst|seg [7] & ((!\hc595_ctrl_inst|cnt_bit [1]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [7]),
+ .datac(\seg_static_inst|seg [6]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~2 .lut_mask = 16'hAA1B;
+defparam \hc595_ctrl_inst|Mux0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~3 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~3_combout = (\hc595_ctrl_inst|cnt_bit [1] & ((\hc595_ctrl_inst|Mux0~2_combout & (!\seg_static_inst|seg [4])) # (!\hc595_ctrl_inst|Mux0~2_combout & ((!\seg_static_inst|seg [5]))))) # (!\hc595_ctrl_inst|cnt_bit [1] &
+// (((\hc595_ctrl_inst|Mux0~2_combout ))))
+
+ .dataa(\seg_static_inst|seg [4]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [5]),
+ .datad(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~3 .lut_mask = 16'h770C;
+defparam \hc595_ctrl_inst|Mux0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N20
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~2 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~2_combout = (!\hc595_ctrl_inst|cnt_bit [3] & ((\hc595_ctrl_inst|cnt_bit [2] & ((\hc595_ctrl_inst|Mux0~3_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\seg_static_inst|seg [7]))))
+
+ .dataa(\seg_static_inst|seg [7]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~2 .lut_mask = 16'h3101;
+defparam \hc595_ctrl_inst|ds~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|WideOr4~0 (
+// Equation(s):
+// \seg_static_inst|WideOr4~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [2] & ((\seg_static_inst|num [1]) # (!\seg_static_inst|num [0])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [0] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr4~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr4~0 .lut_mask = 16'hC140;
+defparam \seg_static_inst|WideOr4~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N21
+dffeas \seg_static_inst|seg[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr4~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|WideOr3~0 (
+// Equation(s):
+// \seg_static_inst|WideOr3~0_combout = (\seg_static_inst|num [1] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [2]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [3] & !\seg_static_inst|num [2])))) # (!\seg_static_inst|num [1] &
+// (!\seg_static_inst|num [3] & (\seg_static_inst|num [0] $ (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr3~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr3~0 .lut_mask = 16'hA412;
+defparam \seg_static_inst|WideOr3~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N5
+dffeas \seg_static_inst|seg[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr3~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|WideOr5~0 (
+// Equation(s):
+// \seg_static_inst|WideOr5~0_combout = (\seg_static_inst|num [3] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [1]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [2])))) # (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0] $ (\seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr5~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr5~0 .lut_mask = 16'hD860;
+defparam \seg_static_inst|WideOr5~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N3
+dffeas \seg_static_inst|seg[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr5~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & (\hc595_ctrl_inst|cnt_bit [1])) # (!\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|cnt_bit [1] & ((!\seg_static_inst|seg [1]))) # (!\hc595_ctrl_inst|cnt_bit [1] & (!\seg_static_inst|seg
+// [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [3]),
+ .datad(\seg_static_inst|seg [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~0 .lut_mask = 16'h89CD;
+defparam \hc595_ctrl_inst|Mux0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|WideOr6~0 (
+// Equation(s):
+// \seg_static_inst|WideOr6~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [0] & (\seg_static_inst|num [2] $ (\seg_static_inst|num [1])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [0] $
+// (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr6~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr6~0 .lut_mask = 16'h0892;
+defparam \seg_static_inst|WideOr6~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N29
+dffeas \seg_static_inst|seg[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr6~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~1 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~1_combout = (\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|Mux0~0_combout & ((!\seg_static_inst|seg [0]))) # (!\hc595_ctrl_inst|Mux0~0_combout & (!\seg_static_inst|seg [2])))) # (!\hc595_ctrl_inst|cnt_bit [0] &
+// (((\hc595_ctrl_inst|Mux0~0_combout ))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [2]),
+ .datac(\hc595_ctrl_inst|Mux0~0_combout ),
+ .datad(\seg_static_inst|seg [0]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~1 .lut_mask = 16'h52F2;
+defparam \hc595_ctrl_inst|Mux0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~1 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~1_combout = (\hc595_ctrl_inst|cnt_bit [3] & (!\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Mux0~1_combout ))
+
+ .dataa(gnd),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~1 .lut_mask = 16'h0C00;
+defparam \hc595_ctrl_inst|ds~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~3 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~3_combout = (\hc595_ctrl_inst|ds~0_combout & ((\hc595_ctrl_inst|ds~2_combout ) # ((\hc595_ctrl_inst|ds~1_combout )))) # (!\hc595_ctrl_inst|ds~0_combout & (((\hc595_ctrl_inst|ds~q ))))
+
+ .dataa(\hc595_ctrl_inst|ds~0_combout ),
+ .datab(\hc595_ctrl_inst|ds~2_combout ),
+ .datac(\hc595_ctrl_inst|ds~q ),
+ .datad(\hc595_ctrl_inst|ds~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~3 .lut_mask = 16'hFAD8;
+defparam \hc595_ctrl_inst|ds~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N31
+dffeas \hc595_ctrl_inst|ds (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|ds~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|ds~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|ds .power_up = "low";
+// synopsys translate_on
+
+assign stcp = \stcp~output_o ;
+
+assign shcp = \shcp~output_o ;
+
+assign ds = \ds~output_o ;
+
+assign oe = \oe~output_o ;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_v_slow.sdo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_v_slow.sdo
new file mode 100644
index 0000000..9c35a85
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_0c_v_slow.sdo
@@ -0,0 +1,1858 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This file contains Slow Corner delays for the design using part EP4CE15F23C8,
+// with speed grade 8, core voltage 1.2V, and temperature 0 Celsius
+//
+
+//
+// This SDF file should be used for ModelSim (Verilog) only
+//
+
+(DELAYFILE
+ (SDFVERSION "2.1")
+ (DESIGN "seg_595_static")
+ (DATE "06/02/2023 20:55:14")
+ (VENDOR "Altera")
+ (PROGRAM "Quartus II 64-Bit")
+ (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version")
+ (DIVIDER .)
+ (TIMESCALE 1 ps)
+
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (328:328:328) (391:391:391))
+ (IOPATH dataa combout (435:435:435) (425:425:425))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~14)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (327:327:327) (390:390:390))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~18)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (326:326:326) (387:387:387))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~20)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (918:918:918) (818:818:818))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~22)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (954:954:954) (867:867:867))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~24)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (345:345:345) (406:406:406))
+ (IOPATH dataa combout (435:435:435) (425:425:425))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~26)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (556:556:556) (549:549:549))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~28)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (338:338:338) (393:393:393))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~30)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (341:341:341) (396:396:396))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~32)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (339:339:339) (394:394:394))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~34)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (554:554:554) (543:543:543))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~36)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (342:342:342) (402:402:402))
+ (IOPATH dataa combout (435:435:435) (425:425:425))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~38)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (611:611:611) (565:565:565))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~40)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (395:395:395))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~42)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (559:559:559) (548:548:548))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~44)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (395:395:395))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~46)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (518:518:518) (504:504:504))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (577:577:577) (573:573:573))
+ (PORT datac (534:534:534) (528:528:528))
+ (IOPATH dataa combout (428:428:428) (450:450:450))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (410:410:410) (508:508:508))
+ (PORT datab (373:373:373) (446:446:446))
+ (PORT datac (336:336:336) (420:420:420))
+ (PORT datad (343:343:343) (422:422:422))
+ (IOPATH dataa combout (435:435:435) (425:425:425))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datac combout (305:305:305) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[24\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2104:2104:2104) (2077:2077:2077))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[23\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (902:902:902) (835:835:835))
+ (PORT datab (599:599:599) (549:549:549))
+ (PORT datac (841:841:841) (778:778:778))
+ (PORT datad (300:300:300) (356:356:356))
+ (IOPATH dataa combout (377:377:377) (371:371:371))
+ (IOPATH datab combout (384:384:384) (398:398:398))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[22\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[21\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[20\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[19\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (341:341:341) (401:401:401))
+ (PORT datab (339:339:339) (394:394:394))
+ (PORT datac (548:548:548) (515:515:515))
+ (PORT datad (538:538:538) (507:507:507))
+ (IOPATH dataa combout (351:351:351) (371:371:371))
+ (IOPATH datab combout (357:357:357) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[18\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[16\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[17\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[15\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (544:544:544) (530:530:530))
+ (PORT datab (598:598:598) (547:547:547))
+ (PORT datac (499:499:499) (489:489:489))
+ (PORT datad (298:298:298) (353:353:353))
+ (IOPATH dataa combout (373:373:373) (380:380:380))
+ (IOPATH datab combout (377:377:377) (380:380:380))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[14\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[13\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1642:1642:1642) (1661:1661:1661))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5022:5022:5022) (4904:4904:4904))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[12\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[11\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (620:620:620) (570:570:570))
+ (PORT datab (339:339:339) (394:394:394))
+ (PORT datac (296:296:296) (360:360:360))
+ (PORT datad (498:498:498) (477:477:477))
+ (IOPATH dataa combout (351:351:351) (371:371:371))
+ (IOPATH datab combout (357:357:357) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (271:271:271) (282:282:282))
+ (PORT datab (268:268:268) (276:276:276))
+ (PORT datac (226:226:226) (241:241:241))
+ (PORT datad (227:227:227) (235:235:235))
+ (IOPATH dataa combout (351:351:351) (371:371:371))
+ (IOPATH datab combout (357:357:357) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[8\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (343:343:343))
+ (PORT datad (433:433:433) (368:368:368))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (343:343:343))
+ (PORT datad (432:432:432) (367:367:367))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (537:537:537) (486:486:486))
+ (PORT datad (227:227:227) (234:234:234))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (343:343:343))
+ (PORT datad (438:438:438) (363:363:363))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (537:537:537) (486:486:486))
+ (PORT datad (228:228:228) (236:236:236))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (342:342:342))
+ (PORT datad (465:465:465) (385:385:385))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (538:538:538) (486:486:486))
+ (PORT datad (229:229:229) (237:237:237))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (343:343:343))
+ (PORT datad (464:464:464) (383:383:383))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (538:538:538) (486:486:486))
+ (PORT datad (231:231:231) (239:239:239))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~9)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (342:342:342))
+ (PORT datad (728:728:728) (593:593:593))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (352:352:352) (378:378:378))
+ (PORT datac (812:812:812) (683:683:683))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE stcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1597:1597:1597) (1456:1456:1456))
+ (IOPATH i o (3063:3063:3063) (3011:3011:3011))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE shcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1823:1823:1823) (1602:1602:1602))
+ (IOPATH i o (3043:3043:3043) (2991:2991:2991))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE ds\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (2172:2172:2172) (1878:1878:1878))
+ (IOPATH i o (3053:3053:3053) (3001:3001:3001))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE oe\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (3948:3948:3948) (3871:3871:3871))
+ (IOPATH i o (3001:3001:3001) (3053:3053:3053))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_clk\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (788:788:788) (813:813:813))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_clkctrl")
+ (INSTANCE sys_clk\~inputclkctrl)
+ (DELAY
+ (ABSOLUTE
+ (PORT inclk[0] (175:175:175) (172:172:172))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_rst_n\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (748:748:748) (773:773:773))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (579:579:579) (576:576:576))
+ (PORT datab (579:579:579) (564:564:564))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (312:312:312) (331:331:331))
+ (PORT datab (351:351:351) (409:409:409))
+ (PORT datad (233:233:233) (243:243:243))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (373:373:373))
+ (PORT datad (302:302:302) (357:357:357))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (340:340:340) (400:400:400))
+ (PORT datab (338:338:338) (393:393:393))
+ (IOPATH dataa combout (408:408:408) (425:425:425))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datab combout (415:415:415) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Equal1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (536:536:536) (530:530:530))
+ (PORT datad (536:536:536) (531:531:531))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (349:349:349) (418:418:418))
+ (PORT datab (286:286:286) (299:299:299))
+ (PORT datad (459:459:459) (394:394:394))
+ (IOPATH dataa combout (349:349:349) (371:371:371))
+ (IOPATH datab combout (384:384:384) (398:398:398))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (346:346:346) (414:414:414))
+ (PORT datab (346:346:346) (409:409:409))
+ (PORT datac (268:268:268) (292:292:292))
+ (PORT datad (248:248:248) (263:263:263))
+ (IOPATH dataa combout (374:374:374) (392:392:392))
+ (IOPATH datab combout (380:380:380) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|stcp\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (236:236:236) (247:247:247))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|stcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|shcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT asdata (1261:1261:1261) (1192:1192:1192))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD asdata (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (312:312:312) (331:331:331))
+ (PORT datab (347:347:347) (411:411:411))
+ (PORT datad (248:248:248) (263:263:263))
+ (IOPATH dataa combout (375:375:375) (392:392:392))
+ (IOPATH datab combout (384:384:384) (386:386:386))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (341:341:341) (401:401:401))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH dataa cout (486:486:486) (375:375:375))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (325:325:325) (383:383:383))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (324:324:324) (381:381:381))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (326:326:326) (383:383:383))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~11)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (269:269:269) (276:276:276))
+ (PORT datad (806:806:806) (705:705:705))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~12)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (325:325:325) (382:382:382))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~16)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (323:323:323) (379:379:379))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datab cout (497:497:497) (381:381:381))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ (IOPATH cin combout (549:549:549) (519:519:519))
+ (IOPATH cin cout (63:63:63) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[9\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[10\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (4981:4981:4981) (4864:4864:4864))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (331:331:331) (394:394:394))
+ (PORT datab (327:327:327) (384:384:384))
+ (PORT datac (287:287:287) (354:354:354))
+ (PORT datad (287:287:287) (345:345:345))
+ (IOPATH dataa combout (404:404:404) (450:450:450))
+ (IOPATH datab combout (406:406:406) (453:453:453))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (329:329:329) (392:392:392))
+ (PORT datab (326:326:326) (383:383:383))
+ (PORT datac (281:281:281) (347:347:347))
+ (PORT datad (285:285:285) (344:344:344))
+ (IOPATH dataa combout (349:349:349) (371:371:371))
+ (IOPATH datab combout (354:354:354) (380:380:380))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (271:271:271) (282:282:282))
+ (PORT datab (1249:1249:1249) (1087:1087:1087))
+ (PORT datac (1080:1080:1080) (893:893:893))
+ (PORT datad (1065:1065:1065) (877:877:877))
+ (IOPATH dataa combout (351:351:351) (371:371:371))
+ (IOPATH datab combout (357:357:357) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|add_flag\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (306:306:306) (343:343:343))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|add_flag)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2104:2104:2104) (2077:2077:2077))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5527:5527:5527) (5538:5538:5538))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (945:945:945) (865:865:865))
+ (IOPATH datab combout (437:437:437) (451:451:451))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[1\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (944:944:944) (864:864:864))
+ (PORT datad (361:361:361) (454:454:454))
+ (IOPATH datab combout (384:384:384) (398:398:398))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[2\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (408:408:408) (505:505:505))
+ (PORT datab (945:945:945) (865:865:865))
+ (PORT datad (337:337:337) (415:415:415))
+ (IOPATH dataa combout (374:374:374) (392:392:392))
+ (IOPATH datab combout (384:384:384) (398:398:398))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (408:408:408) (505:505:505))
+ (PORT datab (381:381:381) (454:454:454))
+ (PORT datac (901:901:901) (831:831:831))
+ (PORT datad (339:339:339) (418:418:418))
+ (IOPATH dataa combout (351:351:351) (371:371:371))
+ (IOPATH datab combout (357:357:357) (380:380:380))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (228:228:228) (235:235:235))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (406:406:406) (503:503:503))
+ (PORT datab (374:374:374) (447:447:447))
+ (PORT datac (334:334:334) (419:419:419))
+ (PORT datad (334:334:334) (413:413:413))
+ (IOPATH dataa combout (435:435:435) (407:407:407))
+ (IOPATH datab combout (438:438:438) (455:455:455))
+ (IOPATH datac combout (305:305:305) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (409:409:409) (507:507:507))
+ (PORT datab (373:373:373) (446:446:446))
+ (PORT datac (336:336:336) (420:420:420))
+ (PORT datad (341:341:341) (420:420:420))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH datab combout (438:438:438) (455:455:455))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (575:575:575) (562:562:562))
+ (PORT datab (551:551:551) (528:528:528))
+ (PORT datac (275:275:275) (338:338:338))
+ (PORT datad (556:556:556) (531:531:531))
+ (IOPATH dataa combout (408:408:408) (425:425:425))
+ (IOPATH datab combout (406:406:406) (453:453:453))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (320:320:320) (378:378:378))
+ (PORT datab (616:616:616) (570:570:570))
+ (PORT datac (277:277:277) (340:340:340))
+ (PORT datad (228:228:228) (235:235:235))
+ (IOPATH dataa combout (374:374:374) (392:392:392))
+ (IOPATH datab combout (437:437:437) (425:425:425))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (344:344:344) (404:404:404))
+ (PORT datab (345:345:345) (408:408:408))
+ (PORT datac (302:302:302) (376:376:376))
+ (PORT datad (475:475:475) (400:400:400))
+ (IOPATH dataa combout (404:404:404) (450:450:450))
+ (IOPATH datab combout (406:406:406) (453:453:453))
+ (IOPATH datac combout (301:301:301) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr4\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (409:409:409) (507:507:507))
+ (PORT datab (374:374:374) (447:447:447))
+ (PORT datac (335:335:335) (420:420:420))
+ (PORT datad (340:340:340) (419:419:419))
+ (IOPATH dataa combout (414:414:414) (444:444:444))
+ (IOPATH datab combout (423:423:423) (380:380:380))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr3\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (406:406:406) (503:503:503))
+ (PORT datab (374:374:374) (447:447:447))
+ (PORT datac (334:334:334) (418:418:418))
+ (PORT datad (332:332:332) (411:411:411))
+ (IOPATH dataa combout (435:435:435) (419:419:419))
+ (IOPATH datab combout (438:438:438) (455:455:455))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr5\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (405:405:405) (502:502:502))
+ (PORT datab (374:374:374) (447:447:447))
+ (PORT datac (334:334:334) (418:418:418))
+ (PORT datad (332:332:332) (410:410:410))
+ (IOPATH dataa combout (420:420:420) (444:444:444))
+ (IOPATH datab combout (423:423:423) (451:451:451))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (576:576:576) (563:563:563))
+ (PORT datab (615:615:615) (570:570:570))
+ (PORT datac (278:278:278) (341:341:341))
+ (PORT datad (280:280:280) (335:335:335))
+ (IOPATH dataa combout (404:404:404) (450:450:450))
+ (IOPATH datab combout (423:423:423) (425:425:425))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr6\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (411:411:411) (508:508:508))
+ (PORT datab (373:373:373) (446:446:446))
+ (PORT datac (336:336:336) (420:420:420))
+ (PORT datad (343:343:343) (423:423:423))
+ (IOPATH dataa combout (435:435:435) (419:419:419))
+ (IOPATH datab combout (438:438:438) (455:455:455))
+ (IOPATH datac combout (305:305:305) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1644:1644:1644) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5211:5211:5211) (5146:5146:5146))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (575:575:575) (562:562:562))
+ (PORT datab (319:319:319) (374:374:374))
+ (PORT datac (228:228:228) (243:243:243))
+ (PORT datad (278:278:278) (334:334:334))
+ (IOPATH dataa combout (435:435:435) (407:407:407))
+ (IOPATH datab combout (438:438:438) (455:455:455))
+ (IOPATH datac combout (305:305:305) (285:285:285))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (346:346:346) (409:409:409))
+ (PORT datac (305:305:305) (379:379:379))
+ (PORT datad (443:443:443) (383:383:383))
+ (IOPATH datab combout (377:377:377) (380:380:380))
+ (IOPATH datac combout (301:301:301) (283:283:283))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (274:274:274) (286:286:286))
+ (PORT datab (268:268:268) (275:275:275))
+ (PORT datad (229:229:229) (236:236:236))
+ (IOPATH dataa combout (408:408:408) (425:425:425))
+ (IOPATH datab combout (415:415:415) (425:425:425))
+ (IOPATH datac combout (415:415:415) (429:429:429))
+ (IOPATH datad combout (167:167:167) (143:143:143))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|ds)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1643:1643:1643) (1662:1662:1662))
+ (PORT d (90:90:90) (101:101:101))
+ (PORT clrn (5241:5241:5241) (5183:5183:5183))
+ (IOPATH (posedge clk) q (240:240:240) (240:240:240))
+ (IOPATH (negedge clrn) q (222:222:222) (222:222:222))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (195:195:195))
+ )
+ )
+)
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_slow.vo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_slow.vo
new file mode 100644
index 0000000..eba81e2
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_slow.vo
@@ -0,0 +1,2444 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+// VENDOR "Altera"
+// PROGRAM "Quartus II 64-Bit"
+// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version"
+
+// DATE "06/02/2023 20:55:14"
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This Verilog file should be used for ModelSim (Verilog) only
+//
+
+`timescale 1 ps/ 1 ps
+
+module seg_595_static (
+ sys_clk,
+ sys_rst_n,
+ stcp,
+ shcp,
+ ds,
+ oe);
+input sys_clk;
+input sys_rst_n;
+output stcp;
+output shcp;
+output ds;
+output oe;
+
+// Design Ports Information
+// stcp => Location: PIN_Y1, I/O Standard: 2.5 V, Current Strength: Default
+// shcp => Location: PIN_W1, I/O Standard: 2.5 V, Current Strength: Default
+// ds => Location: PIN_AA1, I/O Standard: 2.5 V, Current Strength: Default
+// oe => Location: PIN_Y2, I/O Standard: 2.5 V, Current Strength: Default
+// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default
+// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default
+
+
+wire gnd;
+wire vcc;
+wire unknown;
+
+assign gnd = 1'b0;
+assign vcc = 1'b1;
+assign unknown = 1'bx;
+
+tri1 devclrn;
+tri1 devpor;
+tri1 devoe;
+// synopsys translate_off
+initial $sdf_annotate("seg_595_static_8_1200mv_85c_v_slow.sdo");
+// synopsys translate_on
+
+wire \seg_static_inst|Add0~4_combout ;
+wire \seg_static_inst|Add0~14_combout ;
+wire \seg_static_inst|Add0~19 ;
+wire \seg_static_inst|Add0~20_combout ;
+wire \seg_static_inst|Add0~21 ;
+wire \seg_static_inst|Add0~22_combout ;
+wire \seg_static_inst|Add0~23 ;
+wire \seg_static_inst|Add0~24_combout ;
+wire \seg_static_inst|Add0~25 ;
+wire \seg_static_inst|Add0~26_combout ;
+wire \seg_static_inst|Add0~27 ;
+wire \seg_static_inst|Add0~28_combout ;
+wire \seg_static_inst|Add0~29 ;
+wire \seg_static_inst|Add0~30_combout ;
+wire \seg_static_inst|Add0~31 ;
+wire \seg_static_inst|Add0~32_combout ;
+wire \seg_static_inst|Add0~33 ;
+wire \seg_static_inst|Add0~34_combout ;
+wire \seg_static_inst|Add0~35 ;
+wire \seg_static_inst|Add0~36_combout ;
+wire \seg_static_inst|Add0~37 ;
+wire \seg_static_inst|Add0~38_combout ;
+wire \seg_static_inst|Add0~39 ;
+wire \seg_static_inst|Add0~40_combout ;
+wire \seg_static_inst|Add0~41 ;
+wire \seg_static_inst|Add0~42_combout ;
+wire \seg_static_inst|Add0~43 ;
+wire \seg_static_inst|Add0~44_combout ;
+wire \seg_static_inst|Add0~45 ;
+wire \seg_static_inst|Add0~46_combout ;
+wire \hc595_ctrl_inst|ds~0_combout ;
+wire \seg_static_inst|WideOr2~0_combout ;
+wire \seg_static_inst|Equal0~0_combout ;
+wire \seg_static_inst|Equal0~1_combout ;
+wire \seg_static_inst|Equal0~2_combout ;
+wire \seg_static_inst|Equal0~3_combout ;
+wire \seg_static_inst|Equal0~4_combout ;
+wire \seg_static_inst|cnt_wait~0_combout ;
+wire \seg_static_inst|cnt_wait~1_combout ;
+wire \seg_static_inst|cnt_wait~2_combout ;
+wire \seg_static_inst|cnt_wait~3_combout ;
+wire \seg_static_inst|cnt_wait~4_combout ;
+wire \seg_static_inst|cnt_wait~5_combout ;
+wire \seg_static_inst|cnt_wait~6_combout ;
+wire \seg_static_inst|cnt_wait~7_combout ;
+wire \seg_static_inst|cnt_wait~8_combout ;
+wire \seg_static_inst|cnt_wait~9_combout ;
+wire \seg_static_inst|cnt_wait~10_combout ;
+wire \stcp~output_o ;
+wire \shcp~output_o ;
+wire \ds~output_o ;
+wire \oe~output_o ;
+wire \sys_clk~input_o ;
+wire \sys_clk~inputclkctrl_outclk ;
+wire \hc595_ctrl_inst|cnt_4[0]~0_combout ;
+wire \sys_rst_n~input_o ;
+wire \hc595_ctrl_inst|cnt_bit[0]~1_combout ;
+wire \hc595_ctrl_inst|cnt_bit[1]~0_combout ;
+wire \hc595_ctrl_inst|always2~0_combout ;
+wire \seg_static_inst|Add0~0_combout ;
+wire \hc595_ctrl_inst|Equal1~0_combout ;
+wire \hc595_ctrl_inst|cnt_bit[3]~2_combout ;
+wire \hc595_ctrl_inst|always2~1_combout ;
+wire \hc595_ctrl_inst|stcp~feeder_combout ;
+wire \hc595_ctrl_inst|stcp~q ;
+wire \hc595_ctrl_inst|shcp~q ;
+wire \hc595_ctrl_inst|cnt_bit[2]~3_combout ;
+wire \seg_static_inst|Add0~1 ;
+wire \seg_static_inst|Add0~2_combout ;
+wire \seg_static_inst|Add0~3 ;
+wire \seg_static_inst|Add0~5 ;
+wire \seg_static_inst|Add0~6_combout ;
+wire \seg_static_inst|Add0~7 ;
+wire \seg_static_inst|Add0~8_combout ;
+wire \seg_static_inst|Add0~9 ;
+wire \seg_static_inst|Add0~10_combout ;
+wire \seg_static_inst|cnt_wait~11_combout ;
+wire \seg_static_inst|Add0~11 ;
+wire \seg_static_inst|Add0~12_combout ;
+wire \seg_static_inst|Add0~13 ;
+wire \seg_static_inst|Add0~15 ;
+wire \seg_static_inst|Add0~16_combout ;
+wire \seg_static_inst|Add0~17 ;
+wire \seg_static_inst|Add0~18_combout ;
+wire \seg_static_inst|Equal0~5_combout ;
+wire \seg_static_inst|Equal0~6_combout ;
+wire \seg_static_inst|Equal0~7_combout ;
+wire \seg_static_inst|add_flag~feeder_combout ;
+wire \seg_static_inst|add_flag~q ;
+wire \seg_static_inst|num[0]~0_combout ;
+wire \seg_static_inst|num[1]~1_combout ;
+wire \seg_static_inst|num[2]~2_combout ;
+wire \seg_static_inst|num[3]~3_combout ;
+wire \seg_static_inst|num[3]~4_combout ;
+wire \seg_static_inst|WideOr1~0_combout ;
+wire \seg_static_inst|seg[7]~feeder_combout ;
+wire \seg_static_inst|WideOr0~0_combout ;
+wire \hc595_ctrl_inst|Mux0~2_combout ;
+wire \hc595_ctrl_inst|Mux0~3_combout ;
+wire \hc595_ctrl_inst|ds~2_combout ;
+wire \seg_static_inst|WideOr4~0_combout ;
+wire \seg_static_inst|WideOr3~0_combout ;
+wire \seg_static_inst|WideOr5~0_combout ;
+wire \hc595_ctrl_inst|Mux0~0_combout ;
+wire \seg_static_inst|WideOr6~0_combout ;
+wire \hc595_ctrl_inst|Mux0~1_combout ;
+wire \hc595_ctrl_inst|ds~1_combout ;
+wire \hc595_ctrl_inst|ds~3_combout ;
+wire \hc595_ctrl_inst|ds~q ;
+wire [7:0] \seg_static_inst|seg ;
+wire [3:0] \seg_static_inst|num ;
+wire [24:0] \seg_static_inst|cnt_wait ;
+wire [3:0] \hc595_ctrl_inst|cnt_bit ;
+wire [1:0] \hc595_ctrl_inst|cnt_4 ;
+
+
+// Location: LCCOMB_X14_Y13_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~4 (
+// Equation(s):
+// \seg_static_inst|Add0~4_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|Add0~3 $ (GND))) # (!\seg_static_inst|cnt_wait [3] & (!\seg_static_inst|Add0~3 & VCC))
+// \seg_static_inst|Add0~5 = CARRY((\seg_static_inst|cnt_wait [3] & !\seg_static_inst|Add0~3 ))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~3 ),
+ .combout(\seg_static_inst|Add0~4_combout ),
+ .cout(\seg_static_inst|Add0~5 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~4 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~4 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~14 (
+// Equation(s):
+// \seg_static_inst|Add0~14_combout = (\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|Add0~13 )) # (!\seg_static_inst|cnt_wait [8] & ((\seg_static_inst|Add0~13 ) # (GND)))
+// \seg_static_inst|Add0~15 = CARRY((!\seg_static_inst|Add0~13 ) # (!\seg_static_inst|cnt_wait [8]))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~13 ),
+ .combout(\seg_static_inst|Add0~14_combout ),
+ .cout(\seg_static_inst|Add0~15 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~14 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~14 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|Add0~18 (
+// Equation(s):
+// \seg_static_inst|Add0~18_combout = (\seg_static_inst|cnt_wait [10] & (!\seg_static_inst|Add0~17 )) # (!\seg_static_inst|cnt_wait [10] & ((\seg_static_inst|Add0~17 ) # (GND)))
+// \seg_static_inst|Add0~19 = CARRY((!\seg_static_inst|Add0~17 ) # (!\seg_static_inst|cnt_wait [10]))
+
+ .dataa(\seg_static_inst|cnt_wait [10]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~17 ),
+ .combout(\seg_static_inst|Add0~18_combout ),
+ .cout(\seg_static_inst|Add0~19 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~18 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~18 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|Add0~20 (
+// Equation(s):
+// \seg_static_inst|Add0~20_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|Add0~19 $ (GND))) # (!\seg_static_inst|cnt_wait [11] & (!\seg_static_inst|Add0~19 & VCC))
+// \seg_static_inst|Add0~21 = CARRY((\seg_static_inst|cnt_wait [11] & !\seg_static_inst|Add0~19 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [11]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~19 ),
+ .combout(\seg_static_inst|Add0~20_combout ),
+ .cout(\seg_static_inst|Add0~21 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~20 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~20 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N30
+cycloneive_lcell_comb \seg_static_inst|Add0~22 (
+// Equation(s):
+// \seg_static_inst|Add0~22_combout = (\seg_static_inst|cnt_wait [12] & (!\seg_static_inst|Add0~21 )) # (!\seg_static_inst|cnt_wait [12] & ((\seg_static_inst|Add0~21 ) # (GND)))
+// \seg_static_inst|Add0~23 = CARRY((!\seg_static_inst|Add0~21 ) # (!\seg_static_inst|cnt_wait [12]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [12]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~21 ),
+ .combout(\seg_static_inst|Add0~22_combout ),
+ .cout(\seg_static_inst|Add0~23 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~22 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~22 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|Add0~24 (
+// Equation(s):
+// \seg_static_inst|Add0~24_combout = (\seg_static_inst|cnt_wait [13] & (\seg_static_inst|Add0~23 $ (GND))) # (!\seg_static_inst|cnt_wait [13] & (!\seg_static_inst|Add0~23 & VCC))
+// \seg_static_inst|Add0~25 = CARRY((\seg_static_inst|cnt_wait [13] & !\seg_static_inst|Add0~23 ))
+
+ .dataa(\seg_static_inst|cnt_wait [13]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~23 ),
+ .combout(\seg_static_inst|Add0~24_combout ),
+ .cout(\seg_static_inst|Add0~25 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~24 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~24 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|Add0~26 (
+// Equation(s):
+// \seg_static_inst|Add0~26_combout = (\seg_static_inst|cnt_wait [14] & (!\seg_static_inst|Add0~25 )) # (!\seg_static_inst|cnt_wait [14] & ((\seg_static_inst|Add0~25 ) # (GND)))
+// \seg_static_inst|Add0~27 = CARRY((!\seg_static_inst|Add0~25 ) # (!\seg_static_inst|cnt_wait [14]))
+
+ .dataa(\seg_static_inst|cnt_wait [14]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~25 ),
+ .combout(\seg_static_inst|Add0~26_combout ),
+ .cout(\seg_static_inst|Add0~27 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~26 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~26 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|Add0~28 (
+// Equation(s):
+// \seg_static_inst|Add0~28_combout = (\seg_static_inst|cnt_wait [15] & (\seg_static_inst|Add0~27 $ (GND))) # (!\seg_static_inst|cnt_wait [15] & (!\seg_static_inst|Add0~27 & VCC))
+// \seg_static_inst|Add0~29 = CARRY((\seg_static_inst|cnt_wait [15] & !\seg_static_inst|Add0~27 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [15]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~27 ),
+ .combout(\seg_static_inst|Add0~28_combout ),
+ .cout(\seg_static_inst|Add0~29 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~28 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~28 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|Add0~30 (
+// Equation(s):
+// \seg_static_inst|Add0~30_combout = (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|Add0~29 )) # (!\seg_static_inst|cnt_wait [16] & ((\seg_static_inst|Add0~29 ) # (GND)))
+// \seg_static_inst|Add0~31 = CARRY((!\seg_static_inst|Add0~29 ) # (!\seg_static_inst|cnt_wait [16]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~29 ),
+ .combout(\seg_static_inst|Add0~30_combout ),
+ .cout(\seg_static_inst|Add0~31 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~30 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~30 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~32 (
+// Equation(s):
+// \seg_static_inst|Add0~32_combout = (\seg_static_inst|cnt_wait [17] & (\seg_static_inst|Add0~31 $ (GND))) # (!\seg_static_inst|cnt_wait [17] & (!\seg_static_inst|Add0~31 & VCC))
+// \seg_static_inst|Add0~33 = CARRY((\seg_static_inst|cnt_wait [17] & !\seg_static_inst|Add0~31 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [17]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~31 ),
+ .combout(\seg_static_inst|Add0~32_combout ),
+ .cout(\seg_static_inst|Add0~33 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~32 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~32 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~34 (
+// Equation(s):
+// \seg_static_inst|Add0~34_combout = (\seg_static_inst|cnt_wait [18] & (!\seg_static_inst|Add0~33 )) # (!\seg_static_inst|cnt_wait [18] & ((\seg_static_inst|Add0~33 ) # (GND)))
+// \seg_static_inst|Add0~35 = CARRY((!\seg_static_inst|Add0~33 ) # (!\seg_static_inst|cnt_wait [18]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [18]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~33 ),
+ .combout(\seg_static_inst|Add0~34_combout ),
+ .cout(\seg_static_inst|Add0~35 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~34 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~34 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~36 (
+// Equation(s):
+// \seg_static_inst|Add0~36_combout = (\seg_static_inst|cnt_wait [19] & (\seg_static_inst|Add0~35 $ (GND))) # (!\seg_static_inst|cnt_wait [19] & (!\seg_static_inst|Add0~35 & VCC))
+// \seg_static_inst|Add0~37 = CARRY((\seg_static_inst|cnt_wait [19] & !\seg_static_inst|Add0~35 ))
+
+ .dataa(\seg_static_inst|cnt_wait [19]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~35 ),
+ .combout(\seg_static_inst|Add0~36_combout ),
+ .cout(\seg_static_inst|Add0~37 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~36 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~36 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~38 (
+// Equation(s):
+// \seg_static_inst|Add0~38_combout = (\seg_static_inst|cnt_wait [20] & (!\seg_static_inst|Add0~37 )) # (!\seg_static_inst|cnt_wait [20] & ((\seg_static_inst|Add0~37 ) # (GND)))
+// \seg_static_inst|Add0~39 = CARRY((!\seg_static_inst|Add0~37 ) # (!\seg_static_inst|cnt_wait [20]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~37 ),
+ .combout(\seg_static_inst|Add0~38_combout ),
+ .cout(\seg_static_inst|Add0~39 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~38 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~38 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~40 (
+// Equation(s):
+// \seg_static_inst|Add0~40_combout = (\seg_static_inst|cnt_wait [21] & (\seg_static_inst|Add0~39 $ (GND))) # (!\seg_static_inst|cnt_wait [21] & (!\seg_static_inst|Add0~39 & VCC))
+// \seg_static_inst|Add0~41 = CARRY((\seg_static_inst|cnt_wait [21] & !\seg_static_inst|Add0~39 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [21]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~39 ),
+ .combout(\seg_static_inst|Add0~40_combout ),
+ .cout(\seg_static_inst|Add0~41 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~40 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~40 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~42 (
+// Equation(s):
+// \seg_static_inst|Add0~42_combout = (\seg_static_inst|cnt_wait [22] & (!\seg_static_inst|Add0~41 )) # (!\seg_static_inst|cnt_wait [22] & ((\seg_static_inst|Add0~41 ) # (GND)))
+// \seg_static_inst|Add0~43 = CARRY((!\seg_static_inst|Add0~41 ) # (!\seg_static_inst|cnt_wait [22]))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~41 ),
+ .combout(\seg_static_inst|Add0~42_combout ),
+ .cout(\seg_static_inst|Add0~43 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~42 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~42 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~44 (
+// Equation(s):
+// \seg_static_inst|Add0~44_combout = (\seg_static_inst|cnt_wait [23] & (\seg_static_inst|Add0~43 $ (GND))) # (!\seg_static_inst|cnt_wait [23] & (!\seg_static_inst|Add0~43 & VCC))
+// \seg_static_inst|Add0~45 = CARRY((\seg_static_inst|cnt_wait [23] & !\seg_static_inst|Add0~43 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~43 ),
+ .combout(\seg_static_inst|Add0~44_combout ),
+ .cout(\seg_static_inst|Add0~45 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~44 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~44 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~46 (
+// Equation(s):
+// \seg_static_inst|Add0~46_combout = \seg_static_inst|Add0~45 $ (\seg_static_inst|cnt_wait [24])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(\seg_static_inst|Add0~45 ),
+ .combout(\seg_static_inst|Add0~46_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Add0~46 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|Add0~46 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N10
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~0 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~0_combout = (!\hc595_ctrl_inst|cnt_4 [1] & !\hc595_ctrl_inst|cnt_4 [0])
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~0 .lut_mask = 16'h0505;
+defparam \hc595_ctrl_inst|ds~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N27
+dffeas \seg_static_inst|seg[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr2~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|WideOr2~0 (
+// Equation(s):
+// \seg_static_inst|WideOr2~0_combout = (\seg_static_inst|num [1] & (\seg_static_inst|num [0] & (!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [1] & ((\seg_static_inst|num [2] & ((!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr2~0 .lut_mask = 16'h223A;
+defparam \seg_static_inst|WideOr2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N3
+dffeas \seg_static_inst|cnt_wait[24] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [24]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[24] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N21
+dffeas \seg_static_inst|cnt_wait[23] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~44_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [23]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[23] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[23] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|Equal0~0 (
+// Equation(s):
+// \seg_static_inst|Equal0~0_combout = (\hc595_ctrl_inst|cnt_4 [1] & (!\seg_static_inst|cnt_wait [23] & (\hc595_ctrl_inst|cnt_4 [0] & \seg_static_inst|cnt_wait [24])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~0 .lut_mask = 16'h2000;
+defparam \seg_static_inst|Equal0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N7
+dffeas \seg_static_inst|cnt_wait[22] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [22]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[22] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N25
+dffeas \seg_static_inst|cnt_wait[21] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [21]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[21] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N9
+dffeas \seg_static_inst|cnt_wait[20] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [20]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[20] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N27
+dffeas \seg_static_inst|cnt_wait[19] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [19]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[19] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[19] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Equal0~1 (
+// Equation(s):
+// \seg_static_inst|Equal0~1_combout = (\seg_static_inst|cnt_wait [22] & (\seg_static_inst|cnt_wait [20] & (\seg_static_inst|cnt_wait [19] & \seg_static_inst|cnt_wait [21])))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(\seg_static_inst|cnt_wait [19]),
+ .datad(\seg_static_inst|cnt_wait [21]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~1 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N29
+dffeas \seg_static_inst|cnt_wait[18] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~5_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[18] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N29
+dffeas \seg_static_inst|cnt_wait[16] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[16] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N9
+dffeas \seg_static_inst|cnt_wait[17] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~32_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[17] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N5
+dffeas \seg_static_inst|cnt_wait[15] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~28_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[15] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Equal0~2 (
+// Equation(s):
+// \seg_static_inst|Equal0~2_combout = (!\seg_static_inst|cnt_wait [17] & (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|cnt_wait [15] & \seg_static_inst|cnt_wait [18])))
+
+ .dataa(\seg_static_inst|cnt_wait [17]),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(\seg_static_inst|cnt_wait [15]),
+ .datad(\seg_static_inst|cnt_wait [18]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~2 .lut_mask = 16'h0400;
+defparam \seg_static_inst|Equal0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N21
+dffeas \seg_static_inst|cnt_wait[14] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~7_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[14] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N31
+dffeas \seg_static_inst|cnt_wait[13] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[13] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N23
+dffeas \seg_static_inst|cnt_wait[12] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~9_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[12] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N1
+dffeas \seg_static_inst|cnt_wait[11] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~10_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[11] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|Equal0~3 (
+// Equation(s):
+// \seg_static_inst|Equal0~3_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|cnt_wait [14] & (\seg_static_inst|cnt_wait [12] & \seg_static_inst|cnt_wait [13])))
+
+ .dataa(\seg_static_inst|cnt_wait [11]),
+ .datab(\seg_static_inst|cnt_wait [14]),
+ .datac(\seg_static_inst|cnt_wait [12]),
+ .datad(\seg_static_inst|cnt_wait [13]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Equal0~4 (
+// Equation(s):
+// \seg_static_inst|Equal0~4_combout = (\seg_static_inst|Equal0~1_combout & (\seg_static_inst|Equal0~2_combout & (\seg_static_inst|Equal0~3_combout & \seg_static_inst|Equal0~0_combout )))
+
+ .dataa(\seg_static_inst|Equal0~1_combout ),
+ .datab(\seg_static_inst|Equal0~2_combout ),
+ .datac(\seg_static_inst|Equal0~3_combout ),
+ .datad(\seg_static_inst|Equal0~0_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~4 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N23
+dffeas \seg_static_inst|cnt_wait[8] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~14_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[8] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N13
+dffeas \seg_static_inst|cnt_wait[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~0 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~0_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~46_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~46_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~0 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~1 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~1_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~42_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~42_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~1 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~2 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~2_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~40_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~40_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~2 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~3 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~3_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~38_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~38_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~3 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~4 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~4_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~36_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~36_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~4 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~5 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~5_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~34_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~34_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~5 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~6 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~6_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~30_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~30_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~6 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~7 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~7_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~26_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~26_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~7 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N30
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~8 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~8_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~24_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~24_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~8_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~8 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~8 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~9 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~9_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~22_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~22_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~9_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~9 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~9 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~10 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~10_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~20_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Equal0~7_combout ),
+ .datac(\seg_static_inst|Add0~20_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~10_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~10 .lut_mask = 16'h3030;
+defparam \seg_static_inst|cnt_wait~10 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N9
+cycloneive_io_obuf \stcp~output (
+ .i(\hc595_ctrl_inst|stcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\stcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \stcp~output .bus_hold = "false";
+defparam \stcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y7_N23
+cycloneive_io_obuf \shcp~output (
+ .i(\hc595_ctrl_inst|shcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\shcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \shcp~output .bus_hold = "false";
+defparam \shcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y5_N16
+cycloneive_io_obuf \ds~output (
+ .i(\hc595_ctrl_inst|ds~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\ds~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \ds~output .bus_hold = "false";
+defparam \ds~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N2
+cycloneive_io_obuf \oe~output (
+ .i(!\sys_rst_n~input_o ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\oe~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \oe~output .bus_hold = "false";
+defparam \oe~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y15_N22
+cycloneive_io_ibuf \sys_clk~input (
+ .i(sys_clk),
+ .ibar(gnd),
+ .o(\sys_clk~input_o ));
+// synopsys translate_off
+defparam \sys_clk~input .bus_hold = "false";
+defparam \sys_clk~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G8
+cycloneive_clkctrl \sys_clk~inputclkctrl (
+ .ena(vcc),
+ .inclk({vcc,vcc,vcc,\sys_clk~input_o }),
+ .clkselect(2'b00),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .outclk(\sys_clk~inputclkctrl_outclk ));
+// synopsys translate_off
+defparam \sys_clk~inputclkctrl .clock_type = "global clock";
+defparam \sys_clk~inputclkctrl .ena_register_mode = "none";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_4[0]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_4[0]~0_combout = !\hc595_ctrl_inst|cnt_4 [0]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .lut_mask = 16'h0F0F;
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y4_N1
+cycloneive_io_ibuf \sys_rst_n~input (
+ .i(sys_rst_n),
+ .ibar(gnd),
+ .o(\sys_rst_n~input_o ));
+// synopsys translate_off
+defparam \sys_rst_n~input .bus_hold = "false";
+defparam \sys_rst_n~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N7
+dffeas \hc595_ctrl_inst|cnt_4[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N14
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[0]~1 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[0]~1_combout = \hc595_ctrl_inst|cnt_bit [0] $ (((\hc595_ctrl_inst|cnt_4 [1] & \hc595_ctrl_inst|cnt_4 [0])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\hc595_ctrl_inst|cnt_4 [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .lut_mask = 16'h7878;
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N15
+dffeas \hc595_ctrl_inst|cnt_bit[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[1]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[1]~0_combout = (\hc595_ctrl_inst|Equal1~0_combout & (!\hc595_ctrl_inst|always2~1_combout & (\hc595_ctrl_inst|cnt_bit [0] $ (\hc595_ctrl_inst|cnt_bit [1])))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit
+// [1]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [1]),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .lut_mask = 16'h5078;
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N25
+dffeas \hc595_ctrl_inst|cnt_bit[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N0
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~0 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & \hc595_ctrl_inst|cnt_bit [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|always2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~0 (
+// Equation(s):
+// \seg_static_inst|Add0~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] $ (VCC))) # (!\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] & VCC))
+// \seg_static_inst|Add0~1 = CARRY((\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1]))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [0]),
+ .datab(\hc595_ctrl_inst|cnt_4 [1]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(gnd),
+ .combout(\seg_static_inst|Add0~0_combout ),
+ .cout(\seg_static_inst|Add0~1 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~0 .lut_mask = 16'h6688;
+defparam \seg_static_inst|Add0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N9
+dffeas \hc595_ctrl_inst|cnt_4[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N22
+cycloneive_lcell_comb \hc595_ctrl_inst|Equal1~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Equal1~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\hc595_ctrl_inst|cnt_4 [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Equal1~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|Equal1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N16
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[3]~2 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[3]~2_combout = (\hc595_ctrl_inst|always2~0_combout & ((\hc595_ctrl_inst|cnt_bit [3] & ((!\hc595_ctrl_inst|Equal1~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Equal1~0_combout
+// )))) # (!\hc595_ctrl_inst|always2~0_combout & (((\hc595_ctrl_inst|cnt_bit [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|always2~0_combout ),
+ .datac(\hc595_ctrl_inst|cnt_bit [3]),
+ .datad(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .lut_mask = 16'h38F0;
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N17
+dffeas \hc595_ctrl_inst|cnt_bit[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N28
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~1 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~1_combout = (!\hc595_ctrl_inst|cnt_bit [2] & (\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|Equal1~0_combout & \hc595_ctrl_inst|always2~0_combout )))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~1 .lut_mask = 16'h4000;
+defparam \hc595_ctrl_inst|always2~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N4
+cycloneive_lcell_comb \hc595_ctrl_inst|stcp~feeder (
+// Equation(s):
+// \hc595_ctrl_inst|stcp~feeder_combout = \hc595_ctrl_inst|always2~1_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp~feeder .lut_mask = 16'hFF00;
+defparam \hc595_ctrl_inst|stcp~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N5
+dffeas \hc595_ctrl_inst|stcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|stcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|stcp .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N19
+dffeas \hc595_ctrl_inst|shcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(gnd),
+ .asdata(\hc595_ctrl_inst|cnt_4 [1]),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|shcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|shcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|shcp .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N26
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[2]~3 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[2]~3_combout = (\hc595_ctrl_inst|Equal1~0_combout & ((\hc595_ctrl_inst|cnt_bit [2] & ((!\hc595_ctrl_inst|always2~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\hc595_ctrl_inst|cnt_bit [3] &
+// \hc595_ctrl_inst|always2~0_combout )))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit [2]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .lut_mask = 16'h52F0;
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N27
+dffeas \hc595_ctrl_inst|cnt_bit[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~2 (
+// Equation(s):
+// \seg_static_inst|Add0~2_combout = (\seg_static_inst|cnt_wait [2] & (!\seg_static_inst|Add0~1 )) # (!\seg_static_inst|cnt_wait [2] & ((\seg_static_inst|Add0~1 ) # (GND)))
+// \seg_static_inst|Add0~3 = CARRY((!\seg_static_inst|Add0~1 ) # (!\seg_static_inst|cnt_wait [2]))
+
+ .dataa(\seg_static_inst|cnt_wait [2]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~1 ),
+ .combout(\seg_static_inst|Add0~2_combout ),
+ .cout(\seg_static_inst|Add0~3 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~2 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~2 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N11
+dffeas \seg_static_inst|cnt_wait[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~6 (
+// Equation(s):
+// \seg_static_inst|Add0~6_combout = (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|Add0~5 )) # (!\seg_static_inst|cnt_wait [4] & ((\seg_static_inst|Add0~5 ) # (GND)))
+// \seg_static_inst|Add0~7 = CARRY((!\seg_static_inst|Add0~5 ) # (!\seg_static_inst|cnt_wait [4]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~5 ),
+ .combout(\seg_static_inst|Add0~6_combout ),
+ .cout(\seg_static_inst|Add0~7 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~6 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~6 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N15
+dffeas \seg_static_inst|cnt_wait[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~8 (
+// Equation(s):
+// \seg_static_inst|Add0~8_combout = (\seg_static_inst|cnt_wait [5] & (\seg_static_inst|Add0~7 $ (GND))) # (!\seg_static_inst|cnt_wait [5] & (!\seg_static_inst|Add0~7 & VCC))
+// \seg_static_inst|Add0~9 = CARRY((\seg_static_inst|cnt_wait [5] & !\seg_static_inst|Add0~7 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [5]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~7 ),
+ .combout(\seg_static_inst|Add0~8_combout ),
+ .cout(\seg_static_inst|Add0~9 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~8 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~8 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N17
+dffeas \seg_static_inst|cnt_wait[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~10 (
+// Equation(s):
+// \seg_static_inst|Add0~10_combout = (\seg_static_inst|cnt_wait [6] & (!\seg_static_inst|Add0~9 )) # (!\seg_static_inst|cnt_wait [6] & ((\seg_static_inst|Add0~9 ) # (GND)))
+// \seg_static_inst|Add0~11 = CARRY((!\seg_static_inst|Add0~9 ) # (!\seg_static_inst|cnt_wait [6]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [6]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~9 ),
+ .combout(\seg_static_inst|Add0~10_combout ),
+ .cout(\seg_static_inst|Add0~11 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~10 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~10 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~11 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~11_combout = (\seg_static_inst|Add0~10_combout & !\seg_static_inst|Equal0~7_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Add0~10_combout ),
+ .datac(gnd),
+ .datad(\seg_static_inst|Equal0~7_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~11_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~11 .lut_mask = 16'h00CC;
+defparam \seg_static_inst|cnt_wait~11 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N5
+dffeas \seg_static_inst|cnt_wait[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~11_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~12 (
+// Equation(s):
+// \seg_static_inst|Add0~12_combout = (\seg_static_inst|cnt_wait [7] & (\seg_static_inst|Add0~11 $ (GND))) # (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|Add0~11 & VCC))
+// \seg_static_inst|Add0~13 = CARRY((\seg_static_inst|cnt_wait [7] & !\seg_static_inst|Add0~11 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~11 ),
+ .combout(\seg_static_inst|Add0~12_combout ),
+ .cout(\seg_static_inst|Add0~13 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~12 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~12 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N21
+dffeas \seg_static_inst|cnt_wait[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~12_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N24
+cycloneive_lcell_comb \seg_static_inst|Add0~16 (
+// Equation(s):
+// \seg_static_inst|Add0~16_combout = (\seg_static_inst|cnt_wait [9] & (\seg_static_inst|Add0~15 $ (GND))) # (!\seg_static_inst|cnt_wait [9] & (!\seg_static_inst|Add0~15 & VCC))
+// \seg_static_inst|Add0~17 = CARRY((\seg_static_inst|cnt_wait [9] & !\seg_static_inst|Add0~15 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [9]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~15 ),
+ .combout(\seg_static_inst|Add0~16_combout ),
+ .cout(\seg_static_inst|Add0~17 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~16 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~16 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N25
+dffeas \seg_static_inst|cnt_wait[9] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~16_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[9] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N27
+dffeas \seg_static_inst|cnt_wait[10] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~18_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[10] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|Equal0~5 (
+// Equation(s):
+// \seg_static_inst|Equal0~5_combout = (!\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|cnt_wait [10] & !\seg_static_inst|cnt_wait [9])))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(\seg_static_inst|cnt_wait [10]),
+ .datad(\seg_static_inst|cnt_wait [9]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~5 .lut_mask = 16'h0001;
+defparam \seg_static_inst|Equal0~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|Equal0~6 (
+// Equation(s):
+// \seg_static_inst|Equal0~6_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|cnt_wait [6] & \seg_static_inst|cnt_wait [5])))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(\seg_static_inst|cnt_wait [6]),
+ .datad(\seg_static_inst|cnt_wait [5]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~6 .lut_mask = 16'h0800;
+defparam \seg_static_inst|Equal0~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Equal0~7 (
+// Equation(s):
+// \seg_static_inst|Equal0~7_combout = (\seg_static_inst|Equal0~4_combout & (\seg_static_inst|cnt_wait [2] & (\seg_static_inst|Equal0~5_combout & \seg_static_inst|Equal0~6_combout )))
+
+ .dataa(\seg_static_inst|Equal0~4_combout ),
+ .datab(\seg_static_inst|cnt_wait [2]),
+ .datac(\seg_static_inst|Equal0~5_combout ),
+ .datad(\seg_static_inst|Equal0~6_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~7 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|add_flag~feeder (
+// Equation(s):
+// \seg_static_inst|add_flag~feeder_combout = \seg_static_inst|Equal0~7_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|add_flag~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|add_flag~feeder .lut_mask = 16'hF0F0;
+defparam \seg_static_inst|add_flag~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N5
+dffeas \seg_static_inst|add_flag (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|add_flag~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|add_flag~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|add_flag .is_wysiwyg = "true";
+defparam \seg_static_inst|add_flag .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|num[0]~0 (
+// Equation(s):
+// \seg_static_inst|num[0]~0_combout = \seg_static_inst|add_flag~q $ (\seg_static_inst|num [0])
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[0]~0 .lut_mask = 16'h3C3C;
+defparam \seg_static_inst|num[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N11
+dffeas \seg_static_inst|num[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|num[1]~1 (
+// Equation(s):
+// \seg_static_inst|num[1]~1_combout = \seg_static_inst|num [1] $ (((\seg_static_inst|add_flag~q & \seg_static_inst|num [0])))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [1]),
+ .datad(\seg_static_inst|num [0]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[1]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[1]~1 .lut_mask = 16'h3CF0;
+defparam \seg_static_inst|num[1]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N1
+dffeas \seg_static_inst|num[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[1]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|num[2]~2 (
+// Equation(s):
+// \seg_static_inst|num[2]~2_combout = \seg_static_inst|num [2] $ (((\seg_static_inst|num [0] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[2]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[2]~2 .lut_mask = 16'h78F0;
+defparam \seg_static_inst|num[2]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N15
+dffeas \seg_static_inst|num[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[2]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|num[3]~3 (
+// Equation(s):
+// \seg_static_inst|num[3]~3_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [2] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [2]),
+ .datac(\seg_static_inst|add_flag~q ),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|num[3]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|num[3]~4 (
+// Equation(s):
+// \seg_static_inst|num[3]~4_combout = \seg_static_inst|num [3] $ (\seg_static_inst|num[3]~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|num [3]),
+ .datad(\seg_static_inst|num[3]~3_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~4 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|num[3]~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N17
+dffeas \seg_static_inst|num[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[3]~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|WideOr1~0 (
+// Equation(s):
+// \seg_static_inst|WideOr1~0_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [3] $ (((\seg_static_inst|num [1]) # (!\seg_static_inst|num [2]))))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr1~0 .lut_mask = 16'h2382;
+defparam \seg_static_inst|WideOr1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N9
+dffeas \seg_static_inst|seg[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr1~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N6
+cycloneive_lcell_comb \seg_static_inst|seg[7]~feeder (
+// Equation(s):
+// \seg_static_inst|seg[7]~feeder_combout = VCC
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|seg[7]~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|seg[7]~feeder .lut_mask = 16'hFFFF;
+defparam \seg_static_inst|seg[7]~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N7
+dffeas \seg_static_inst|seg[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|seg[7]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|WideOr0~0 (
+// Equation(s):
+// \seg_static_inst|WideOr0~0_combout = (\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] $ (!\seg_static_inst|num [1])))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [3] $
+// (!\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr0~0 .lut_mask = 16'h2043;
+defparam \seg_static_inst|WideOr0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N23
+dffeas \seg_static_inst|seg[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~2 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~2_combout = (\hc595_ctrl_inst|cnt_bit [0] & (((\hc595_ctrl_inst|cnt_bit [1]) # (!\seg_static_inst|seg [6])))) # (!\hc595_ctrl_inst|cnt_bit [0] & (!\seg_static_inst|seg [7] & ((!\hc595_ctrl_inst|cnt_bit [1]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [7]),
+ .datac(\seg_static_inst|seg [6]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~2 .lut_mask = 16'hAA1B;
+defparam \hc595_ctrl_inst|Mux0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~3 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~3_combout = (\hc595_ctrl_inst|cnt_bit [1] & ((\hc595_ctrl_inst|Mux0~2_combout & (!\seg_static_inst|seg [4])) # (!\hc595_ctrl_inst|Mux0~2_combout & ((!\seg_static_inst|seg [5]))))) # (!\hc595_ctrl_inst|cnt_bit [1] &
+// (((\hc595_ctrl_inst|Mux0~2_combout ))))
+
+ .dataa(\seg_static_inst|seg [4]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [5]),
+ .datad(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~3 .lut_mask = 16'h770C;
+defparam \hc595_ctrl_inst|Mux0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N20
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~2 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~2_combout = (!\hc595_ctrl_inst|cnt_bit [3] & ((\hc595_ctrl_inst|cnt_bit [2] & ((\hc595_ctrl_inst|Mux0~3_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\seg_static_inst|seg [7]))))
+
+ .dataa(\seg_static_inst|seg [7]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~2 .lut_mask = 16'h3101;
+defparam \hc595_ctrl_inst|ds~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|WideOr4~0 (
+// Equation(s):
+// \seg_static_inst|WideOr4~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [2] & ((\seg_static_inst|num [1]) # (!\seg_static_inst|num [0])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [0] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr4~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr4~0 .lut_mask = 16'hC140;
+defparam \seg_static_inst|WideOr4~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N21
+dffeas \seg_static_inst|seg[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr4~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|WideOr3~0 (
+// Equation(s):
+// \seg_static_inst|WideOr3~0_combout = (\seg_static_inst|num [1] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [2]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [3] & !\seg_static_inst|num [2])))) # (!\seg_static_inst|num [1] &
+// (!\seg_static_inst|num [3] & (\seg_static_inst|num [0] $ (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr3~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr3~0 .lut_mask = 16'hA412;
+defparam \seg_static_inst|WideOr3~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N5
+dffeas \seg_static_inst|seg[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr3~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|WideOr5~0 (
+// Equation(s):
+// \seg_static_inst|WideOr5~0_combout = (\seg_static_inst|num [3] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [1]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [2])))) # (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0] $ (\seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr5~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr5~0 .lut_mask = 16'hD860;
+defparam \seg_static_inst|WideOr5~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N3
+dffeas \seg_static_inst|seg[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr5~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & (\hc595_ctrl_inst|cnt_bit [1])) # (!\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|cnt_bit [1] & ((!\seg_static_inst|seg [1]))) # (!\hc595_ctrl_inst|cnt_bit [1] & (!\seg_static_inst|seg
+// [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [3]),
+ .datad(\seg_static_inst|seg [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~0 .lut_mask = 16'h89CD;
+defparam \hc595_ctrl_inst|Mux0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|WideOr6~0 (
+// Equation(s):
+// \seg_static_inst|WideOr6~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [0] & (\seg_static_inst|num [2] $ (\seg_static_inst|num [1])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [0] $
+// (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr6~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr6~0 .lut_mask = 16'h0892;
+defparam \seg_static_inst|WideOr6~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N29
+dffeas \seg_static_inst|seg[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr6~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~1 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~1_combout = (\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|Mux0~0_combout & ((!\seg_static_inst|seg [0]))) # (!\hc595_ctrl_inst|Mux0~0_combout & (!\seg_static_inst|seg [2])))) # (!\hc595_ctrl_inst|cnt_bit [0] &
+// (((\hc595_ctrl_inst|Mux0~0_combout ))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [2]),
+ .datac(\hc595_ctrl_inst|Mux0~0_combout ),
+ .datad(\seg_static_inst|seg [0]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~1 .lut_mask = 16'h52F2;
+defparam \hc595_ctrl_inst|Mux0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~1 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~1_combout = (\hc595_ctrl_inst|cnt_bit [3] & (!\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Mux0~1_combout ))
+
+ .dataa(gnd),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~1 .lut_mask = 16'h0C00;
+defparam \hc595_ctrl_inst|ds~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~3 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~3_combout = (\hc595_ctrl_inst|ds~0_combout & ((\hc595_ctrl_inst|ds~2_combout ) # ((\hc595_ctrl_inst|ds~1_combout )))) # (!\hc595_ctrl_inst|ds~0_combout & (((\hc595_ctrl_inst|ds~q ))))
+
+ .dataa(\hc595_ctrl_inst|ds~0_combout ),
+ .datab(\hc595_ctrl_inst|ds~2_combout ),
+ .datac(\hc595_ctrl_inst|ds~q ),
+ .datad(\hc595_ctrl_inst|ds~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~3 .lut_mask = 16'hFAD8;
+defparam \hc595_ctrl_inst|ds~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N31
+dffeas \hc595_ctrl_inst|ds (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|ds~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|ds~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|ds .power_up = "low";
+// synopsys translate_on
+
+assign stcp = \stcp~output_o ;
+
+assign shcp = \shcp~output_o ;
+
+assign ds = \ds~output_o ;
+
+assign oe = \oe~output_o ;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_v_slow.sdo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_v_slow.sdo
new file mode 100644
index 0000000..7f4cf64
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_8_1200mv_85c_v_slow.sdo
@@ -0,0 +1,1858 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This file contains Slow Corner delays for the design using part EP4CE15F23C8,
+// with speed grade 8, core voltage 1.2V, and temperature 85 Celsius
+//
+
+//
+// This SDF file should be used for ModelSim (Verilog) only
+//
+
+(DELAYFILE
+ (SDFVERSION "2.1")
+ (DESIGN "seg_595_static")
+ (DATE "06/02/2023 20:55:14")
+ (VENDOR "Altera")
+ (PROGRAM "Quartus II 64-Bit")
+ (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version")
+ (DIVIDER .)
+ (TIMESCALE 1 ps)
+
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (344:344:344) (433:433:433))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~14)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (343:343:343) (432:432:432))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~18)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (342:342:342) (429:429:429))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~20)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (940:940:940) (921:921:921))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~22)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (984:984:984) (971:971:971))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~24)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (365:365:365) (450:450:450))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~26)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (573:573:573) (611:611:611))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~28)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (358:358:358) (434:434:434))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~30)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (361:361:361) (438:438:438))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~32)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (359:359:359) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~34)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (572:572:572) (603:603:603))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~36)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (363:363:363) (446:446:446))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~38)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (628:628:628) (632:632:632))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~40)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (360:360:360) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~42)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (577:577:577) (611:611:611))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~44)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (360:360:360) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~46)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (539:539:539) (559:559:559))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (597:597:597) (647:647:647))
+ (PORT datac (558:558:558) (595:595:595))
+ (IOPATH dataa combout (481:481:481) (491:491:491))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (418:418:418) (560:560:560))
+ (PORT datab (386:386:386) (503:503:503))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (369:369:369) (466:466:466))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[24\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2328:2328:2328) (2322:2322:2322))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[23\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (936:936:936) (939:939:939))
+ (PORT datab (615:615:615) (619:619:619))
+ (PORT datac (876:876:876) (872:872:872))
+ (PORT datad (322:322:322) (392:392:392))
+ (IOPATH dataa combout (405:405:405) (398:398:398))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[22\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[21\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[20\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[19\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (362:362:362) (445:445:445))
+ (PORT datab (359:359:359) (436:436:436))
+ (PORT datac (564:564:564) (579:579:579))
+ (PORT datad (556:556:556) (569:569:569))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[18\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[16\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[17\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[15\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (558:558:558) (595:595:595))
+ (PORT datab (613:613:613) (617:617:617))
+ (PORT datac (516:516:516) (547:547:547))
+ (PORT datad (319:319:319) (389:389:389))
+ (IOPATH dataa combout (421:421:421) (418:418:418))
+ (IOPATH datab combout (407:407:407) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[14\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[13\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[12\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[11\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (634:634:634) (642:642:642))
+ (PORT datab (360:360:360) (436:436:436))
+ (PORT datac (319:319:319) (396:396:396))
+ (PORT datad (516:516:516) (534:534:534))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (280:280:280) (312:312:312))
+ (PORT datab (278:278:278) (303:303:303))
+ (PORT datac (237:237:237) (263:263:263))
+ (PORT datad (238:238:238) (257:257:257))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[8\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (438:438:438) (415:415:415))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (437:437:437) (414:414:414))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (540:540:540))
+ (PORT datad (238:238:238) (256:256:256))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (447:447:447) (410:410:410))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (541:541:541))
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (383:383:383))
+ (PORT datad (469:469:469) (437:437:437))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (541:541:541))
+ (PORT datad (240:240:240) (259:259:259))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (468:468:468) (435:435:435))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (555:555:555) (541:541:541))
+ (PORT datad (241:241:241) (260:260:260))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~9)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (739:739:739) (665:665:665))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (365:365:365) (423:423:423))
+ (PORT datac (829:829:829) (765:765:765))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE stcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1656:1656:1656) (1618:1618:1618))
+ (IOPATH i o (3449:3449:3449) (3386:3386:3386))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE shcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1872:1872:1872) (1788:1788:1788))
+ (IOPATH i o (3429:3429:3429) (3366:3366:3366))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE ds\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (2238:2238:2238) (2101:2101:2101))
+ (IOPATH i o (3439:3439:3439) (3376:3376:3376))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE oe\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (4546:4546:4546) (4318:4318:4318))
+ (IOPATH i o (3376:3376:3376) (3439:3439:3439))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_clk\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (806:806:806) (852:852:852))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_clkctrl")
+ (INSTANCE sys_clk\~inputclkctrl)
+ (DELAY
+ (ABSOLUTE
+ (PORT inclk[0] (200:200:200) (189:189:189))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_rst_n\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (766:766:766) (812:812:812))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (599:599:599) (649:649:649))
+ (PORT datab (602:602:602) (636:636:636))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (325:325:325) (367:367:367))
+ (PORT datab (371:371:371) (453:453:453))
+ (PORT datad (245:245:245) (266:266:266))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (328:328:328) (413:413:413))
+ (PORT datad (323:323:323) (394:394:394))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (444:444:444))
+ (PORT datab (358:358:358) (435:435:435))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datab combout (454:454:454) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Equal1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (560:560:560) (597:597:597))
+ (PORT datad (556:556:556) (596:596:596))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (364:364:364) (464:464:464))
+ (PORT datab (298:298:298) (330:330:330))
+ (PORT datad (467:467:467) (441:441:441))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (460:460:460))
+ (PORT datab (361:361:361) (457:457:457))
+ (PORT datac (281:281:281) (320:320:320))
+ (PORT datad (259:259:259) (289:289:289))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (410:410:410) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|stcp\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (248:248:248) (270:270:270))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|stcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|shcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT asdata (1335:1335:1335) (1325:1325:1325))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD asdata (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (325:325:325) (367:367:367))
+ (PORT datab (362:362:362) (458:458:458))
+ (PORT datad (259:259:259) (289:289:289))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (435:435:435) (424:424:424))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (444:444:444))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (341:341:341) (423:423:423))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (341:341:341) (420:420:420))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (342:342:342) (422:422:422))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~11)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (279:279:279) (304:304:304))
+ (PORT datad (833:833:833) (788:788:788))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~12)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (422:422:422))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~16)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (419:419:419))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[9\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[10\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (346:346:346) (436:436:436))
+ (PORT datab (343:343:343) (425:425:425))
+ (PORT datac (304:304:304) (388:388:388))
+ (PORT datad (304:304:304) (381:381:381))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (344:344:344) (434:434:434))
+ (PORT datab (342:342:342) (424:424:424))
+ (PORT datac (299:299:299) (383:383:383))
+ (PORT datad (303:303:303) (379:379:379))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (280:280:280) (312:312:312))
+ (PORT datab (1288:1288:1288) (1220:1220:1220))
+ (PORT datac (1102:1102:1102) (999:999:999))
+ (PORT datad (1098:1098:1098) (983:983:983))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|add_flag\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|add_flag)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2328:2328:2328) (2322:2322:2322))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (968:968:968) (969:969:969))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[1\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (968:968:968) (969:969:969))
+ (PORT datad (368:368:368) (496:496:496))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[2\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (416:416:416) (558:558:558))
+ (PORT datab (969:969:969) (970:970:970))
+ (PORT datad (363:363:363) (460:460:460))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (416:416:416) (558:558:558))
+ (PORT datab (396:396:396) (508:508:508))
+ (PORT datac (926:926:926) (932:932:932))
+ (PORT datad (365:365:365) (462:462:462))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (415:415:415) (556:556:556))
+ (PORT datab (387:387:387) (504:504:504))
+ (PORT datac (351:351:351) (465:465:465))
+ (PORT datad (361:361:361) (457:457:457))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (418:418:418) (559:559:559))
+ (PORT datab (386:386:386) (504:504:504))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (368:368:368) (464:464:464))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (594:594:594) (631:631:631))
+ (PORT datab (571:571:571) (592:592:592))
+ (PORT datac (294:294:294) (371:371:371))
+ (PORT datad (574:574:574) (597:597:597))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (336:336:336) (419:419:419))
+ (PORT datab (633:633:633) (644:644:644))
+ (PORT datac (295:295:295) (373:373:373))
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH dataa combout (421:421:421) (428:428:428))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (364:364:364) (449:449:449))
+ (PORT datab (360:360:360) (456:456:456))
+ (PORT datac (318:318:318) (414:414:414))
+ (PORT datad (481:481:481) (449:449:449))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr4\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (417:417:417) (559:559:559))
+ (PORT datab (386:386:386) (504:504:504))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (367:367:367) (463:463:463))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (455:455:455) (412:412:412))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr3\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (415:415:415) (555:555:555))
+ (PORT datab (387:387:387) (505:505:505))
+ (PORT datac (351:351:351) (465:465:465))
+ (PORT datad (359:359:359) (455:455:455))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr5\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (414:414:414) (555:555:555))
+ (PORT datab (387:387:387) (505:505:505))
+ (PORT datac (350:350:350) (465:465:465))
+ (PORT datad (358:358:358) (454:454:454))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (595:595:595) (632:632:632))
+ (PORT datab (632:632:632) (643:643:643))
+ (PORT datac (296:296:296) (374:374:374))
+ (PORT datad (297:297:297) (368:368:368))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (455:455:455) (473:473:473))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr6\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (419:419:419) (561:561:561))
+ (PORT datab (386:386:386) (503:503:503))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (370:370:370) (467:467:467))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (594:594:594) (631:631:631))
+ (PORT datab (335:335:335) (412:412:412))
+ (PORT datac (239:239:239) (265:265:265))
+ (PORT datad (296:296:296) (366:366:366))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (361:361:361) (456:456:456))
+ (PORT datac (320:320:320) (417:417:417))
+ (PORT datad (450:450:450) (428:428:428))
+ (IOPATH datab combout (407:407:407) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (283:283:283) (315:315:315))
+ (PORT datab (277:277:277) (302:302:302))
+ (PORT datad (240:240:240) (258:258:258))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH datab combout (454:454:454) (473:473:473))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|ds)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+)
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_fast.vo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_fast.vo
new file mode 100644
index 0000000..2a5affc
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_fast.vo
@@ -0,0 +1,2444 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+// VENDOR "Altera"
+// PROGRAM "Quartus II 64-Bit"
+// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version"
+
+// DATE "06/02/2023 20:55:14"
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This Verilog file should be used for ModelSim (Verilog) only
+//
+
+`timescale 1 ps/ 1 ps
+
+module seg_595_static (
+ sys_clk,
+ sys_rst_n,
+ stcp,
+ shcp,
+ ds,
+ oe);
+input sys_clk;
+input sys_rst_n;
+output stcp;
+output shcp;
+output ds;
+output oe;
+
+// Design Ports Information
+// stcp => Location: PIN_Y1, I/O Standard: 2.5 V, Current Strength: Default
+// shcp => Location: PIN_W1, I/O Standard: 2.5 V, Current Strength: Default
+// ds => Location: PIN_AA1, I/O Standard: 2.5 V, Current Strength: Default
+// oe => Location: PIN_Y2, I/O Standard: 2.5 V, Current Strength: Default
+// sys_rst_n => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default
+// sys_clk => Location: PIN_T22, I/O Standard: 2.5 V, Current Strength: Default
+
+
+wire gnd;
+wire vcc;
+wire unknown;
+
+assign gnd = 1'b0;
+assign vcc = 1'b1;
+assign unknown = 1'bx;
+
+tri1 devclrn;
+tri1 devpor;
+tri1 devoe;
+// synopsys translate_off
+initial $sdf_annotate("seg_595_static_min_1200mv_0c_v_fast.sdo");
+// synopsys translate_on
+
+wire \seg_static_inst|Add0~4_combout ;
+wire \seg_static_inst|Add0~14_combout ;
+wire \seg_static_inst|Add0~19 ;
+wire \seg_static_inst|Add0~20_combout ;
+wire \seg_static_inst|Add0~21 ;
+wire \seg_static_inst|Add0~22_combout ;
+wire \seg_static_inst|Add0~23 ;
+wire \seg_static_inst|Add0~24_combout ;
+wire \seg_static_inst|Add0~25 ;
+wire \seg_static_inst|Add0~26_combout ;
+wire \seg_static_inst|Add0~27 ;
+wire \seg_static_inst|Add0~28_combout ;
+wire \seg_static_inst|Add0~29 ;
+wire \seg_static_inst|Add0~30_combout ;
+wire \seg_static_inst|Add0~31 ;
+wire \seg_static_inst|Add0~32_combout ;
+wire \seg_static_inst|Add0~33 ;
+wire \seg_static_inst|Add0~34_combout ;
+wire \seg_static_inst|Add0~35 ;
+wire \seg_static_inst|Add0~36_combout ;
+wire \seg_static_inst|Add0~37 ;
+wire \seg_static_inst|Add0~38_combout ;
+wire \seg_static_inst|Add0~39 ;
+wire \seg_static_inst|Add0~40_combout ;
+wire \seg_static_inst|Add0~41 ;
+wire \seg_static_inst|Add0~42_combout ;
+wire \seg_static_inst|Add0~43 ;
+wire \seg_static_inst|Add0~44_combout ;
+wire \seg_static_inst|Add0~45 ;
+wire \seg_static_inst|Add0~46_combout ;
+wire \hc595_ctrl_inst|ds~0_combout ;
+wire \seg_static_inst|WideOr2~0_combout ;
+wire \seg_static_inst|Equal0~0_combout ;
+wire \seg_static_inst|Equal0~1_combout ;
+wire \seg_static_inst|Equal0~2_combout ;
+wire \seg_static_inst|Equal0~3_combout ;
+wire \seg_static_inst|Equal0~4_combout ;
+wire \seg_static_inst|cnt_wait~0_combout ;
+wire \seg_static_inst|cnt_wait~1_combout ;
+wire \seg_static_inst|cnt_wait~2_combout ;
+wire \seg_static_inst|cnt_wait~3_combout ;
+wire \seg_static_inst|cnt_wait~4_combout ;
+wire \seg_static_inst|cnt_wait~5_combout ;
+wire \seg_static_inst|cnt_wait~6_combout ;
+wire \seg_static_inst|cnt_wait~7_combout ;
+wire \seg_static_inst|cnt_wait~8_combout ;
+wire \seg_static_inst|cnt_wait~9_combout ;
+wire \seg_static_inst|cnt_wait~10_combout ;
+wire \stcp~output_o ;
+wire \shcp~output_o ;
+wire \ds~output_o ;
+wire \oe~output_o ;
+wire \sys_clk~input_o ;
+wire \sys_clk~inputclkctrl_outclk ;
+wire \hc595_ctrl_inst|cnt_4[0]~0_combout ;
+wire \sys_rst_n~input_o ;
+wire \hc595_ctrl_inst|cnt_bit[0]~1_combout ;
+wire \hc595_ctrl_inst|cnt_bit[1]~0_combout ;
+wire \hc595_ctrl_inst|always2~0_combout ;
+wire \seg_static_inst|Add0~0_combout ;
+wire \hc595_ctrl_inst|Equal1~0_combout ;
+wire \hc595_ctrl_inst|cnt_bit[3]~2_combout ;
+wire \hc595_ctrl_inst|always2~1_combout ;
+wire \hc595_ctrl_inst|stcp~feeder_combout ;
+wire \hc595_ctrl_inst|stcp~q ;
+wire \hc595_ctrl_inst|shcp~q ;
+wire \hc595_ctrl_inst|cnt_bit[2]~3_combout ;
+wire \seg_static_inst|Add0~1 ;
+wire \seg_static_inst|Add0~2_combout ;
+wire \seg_static_inst|Add0~3 ;
+wire \seg_static_inst|Add0~5 ;
+wire \seg_static_inst|Add0~6_combout ;
+wire \seg_static_inst|Add0~7 ;
+wire \seg_static_inst|Add0~8_combout ;
+wire \seg_static_inst|Add0~9 ;
+wire \seg_static_inst|Add0~10_combout ;
+wire \seg_static_inst|cnt_wait~11_combout ;
+wire \seg_static_inst|Add0~11 ;
+wire \seg_static_inst|Add0~12_combout ;
+wire \seg_static_inst|Add0~13 ;
+wire \seg_static_inst|Add0~15 ;
+wire \seg_static_inst|Add0~16_combout ;
+wire \seg_static_inst|Add0~17 ;
+wire \seg_static_inst|Add0~18_combout ;
+wire \seg_static_inst|Equal0~5_combout ;
+wire \seg_static_inst|Equal0~6_combout ;
+wire \seg_static_inst|Equal0~7_combout ;
+wire \seg_static_inst|add_flag~feeder_combout ;
+wire \seg_static_inst|add_flag~q ;
+wire \seg_static_inst|num[0]~0_combout ;
+wire \seg_static_inst|num[1]~1_combout ;
+wire \seg_static_inst|num[2]~2_combout ;
+wire \seg_static_inst|num[3]~3_combout ;
+wire \seg_static_inst|num[3]~4_combout ;
+wire \seg_static_inst|WideOr1~0_combout ;
+wire \seg_static_inst|seg[7]~feeder_combout ;
+wire \seg_static_inst|WideOr0~0_combout ;
+wire \hc595_ctrl_inst|Mux0~2_combout ;
+wire \hc595_ctrl_inst|Mux0~3_combout ;
+wire \hc595_ctrl_inst|ds~2_combout ;
+wire \seg_static_inst|WideOr4~0_combout ;
+wire \seg_static_inst|WideOr3~0_combout ;
+wire \seg_static_inst|WideOr5~0_combout ;
+wire \hc595_ctrl_inst|Mux0~0_combout ;
+wire \seg_static_inst|WideOr6~0_combout ;
+wire \hc595_ctrl_inst|Mux0~1_combout ;
+wire \hc595_ctrl_inst|ds~1_combout ;
+wire \hc595_ctrl_inst|ds~3_combout ;
+wire \hc595_ctrl_inst|ds~q ;
+wire [7:0] \seg_static_inst|seg ;
+wire [3:0] \seg_static_inst|num ;
+wire [24:0] \seg_static_inst|cnt_wait ;
+wire [3:0] \hc595_ctrl_inst|cnt_bit ;
+wire [1:0] \hc595_ctrl_inst|cnt_4 ;
+
+
+// Location: LCCOMB_X14_Y13_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~4 (
+// Equation(s):
+// \seg_static_inst|Add0~4_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|Add0~3 $ (GND))) # (!\seg_static_inst|cnt_wait [3] & (!\seg_static_inst|Add0~3 & VCC))
+// \seg_static_inst|Add0~5 = CARRY((\seg_static_inst|cnt_wait [3] & !\seg_static_inst|Add0~3 ))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~3 ),
+ .combout(\seg_static_inst|Add0~4_combout ),
+ .cout(\seg_static_inst|Add0~5 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~4 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~4 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~14 (
+// Equation(s):
+// \seg_static_inst|Add0~14_combout = (\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|Add0~13 )) # (!\seg_static_inst|cnt_wait [8] & ((\seg_static_inst|Add0~13 ) # (GND)))
+// \seg_static_inst|Add0~15 = CARRY((!\seg_static_inst|Add0~13 ) # (!\seg_static_inst|cnt_wait [8]))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~13 ),
+ .combout(\seg_static_inst|Add0~14_combout ),
+ .cout(\seg_static_inst|Add0~15 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~14 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~14 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|Add0~18 (
+// Equation(s):
+// \seg_static_inst|Add0~18_combout = (\seg_static_inst|cnt_wait [10] & (!\seg_static_inst|Add0~17 )) # (!\seg_static_inst|cnt_wait [10] & ((\seg_static_inst|Add0~17 ) # (GND)))
+// \seg_static_inst|Add0~19 = CARRY((!\seg_static_inst|Add0~17 ) # (!\seg_static_inst|cnt_wait [10]))
+
+ .dataa(\seg_static_inst|cnt_wait [10]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~17 ),
+ .combout(\seg_static_inst|Add0~18_combout ),
+ .cout(\seg_static_inst|Add0~19 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~18 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~18 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|Add0~20 (
+// Equation(s):
+// \seg_static_inst|Add0~20_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|Add0~19 $ (GND))) # (!\seg_static_inst|cnt_wait [11] & (!\seg_static_inst|Add0~19 & VCC))
+// \seg_static_inst|Add0~21 = CARRY((\seg_static_inst|cnt_wait [11] & !\seg_static_inst|Add0~19 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [11]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~19 ),
+ .combout(\seg_static_inst|Add0~20_combout ),
+ .cout(\seg_static_inst|Add0~21 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~20 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~20 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N30
+cycloneive_lcell_comb \seg_static_inst|Add0~22 (
+// Equation(s):
+// \seg_static_inst|Add0~22_combout = (\seg_static_inst|cnt_wait [12] & (!\seg_static_inst|Add0~21 )) # (!\seg_static_inst|cnt_wait [12] & ((\seg_static_inst|Add0~21 ) # (GND)))
+// \seg_static_inst|Add0~23 = CARRY((!\seg_static_inst|Add0~21 ) # (!\seg_static_inst|cnt_wait [12]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [12]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~21 ),
+ .combout(\seg_static_inst|Add0~22_combout ),
+ .cout(\seg_static_inst|Add0~23 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~22 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~22 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|Add0~24 (
+// Equation(s):
+// \seg_static_inst|Add0~24_combout = (\seg_static_inst|cnt_wait [13] & (\seg_static_inst|Add0~23 $ (GND))) # (!\seg_static_inst|cnt_wait [13] & (!\seg_static_inst|Add0~23 & VCC))
+// \seg_static_inst|Add0~25 = CARRY((\seg_static_inst|cnt_wait [13] & !\seg_static_inst|Add0~23 ))
+
+ .dataa(\seg_static_inst|cnt_wait [13]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~23 ),
+ .combout(\seg_static_inst|Add0~24_combout ),
+ .cout(\seg_static_inst|Add0~25 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~24 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~24 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|Add0~26 (
+// Equation(s):
+// \seg_static_inst|Add0~26_combout = (\seg_static_inst|cnt_wait [14] & (!\seg_static_inst|Add0~25 )) # (!\seg_static_inst|cnt_wait [14] & ((\seg_static_inst|Add0~25 ) # (GND)))
+// \seg_static_inst|Add0~27 = CARRY((!\seg_static_inst|Add0~25 ) # (!\seg_static_inst|cnt_wait [14]))
+
+ .dataa(\seg_static_inst|cnt_wait [14]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~25 ),
+ .combout(\seg_static_inst|Add0~26_combout ),
+ .cout(\seg_static_inst|Add0~27 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~26 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~26 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|Add0~28 (
+// Equation(s):
+// \seg_static_inst|Add0~28_combout = (\seg_static_inst|cnt_wait [15] & (\seg_static_inst|Add0~27 $ (GND))) # (!\seg_static_inst|cnt_wait [15] & (!\seg_static_inst|Add0~27 & VCC))
+// \seg_static_inst|Add0~29 = CARRY((\seg_static_inst|cnt_wait [15] & !\seg_static_inst|Add0~27 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [15]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~27 ),
+ .combout(\seg_static_inst|Add0~28_combout ),
+ .cout(\seg_static_inst|Add0~29 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~28 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~28 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|Add0~30 (
+// Equation(s):
+// \seg_static_inst|Add0~30_combout = (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|Add0~29 )) # (!\seg_static_inst|cnt_wait [16] & ((\seg_static_inst|Add0~29 ) # (GND)))
+// \seg_static_inst|Add0~31 = CARRY((!\seg_static_inst|Add0~29 ) # (!\seg_static_inst|cnt_wait [16]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~29 ),
+ .combout(\seg_static_inst|Add0~30_combout ),
+ .cout(\seg_static_inst|Add0~31 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~30 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~30 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~32 (
+// Equation(s):
+// \seg_static_inst|Add0~32_combout = (\seg_static_inst|cnt_wait [17] & (\seg_static_inst|Add0~31 $ (GND))) # (!\seg_static_inst|cnt_wait [17] & (!\seg_static_inst|Add0~31 & VCC))
+// \seg_static_inst|Add0~33 = CARRY((\seg_static_inst|cnt_wait [17] & !\seg_static_inst|Add0~31 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [17]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~31 ),
+ .combout(\seg_static_inst|Add0~32_combout ),
+ .cout(\seg_static_inst|Add0~33 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~32 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~32 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~34 (
+// Equation(s):
+// \seg_static_inst|Add0~34_combout = (\seg_static_inst|cnt_wait [18] & (!\seg_static_inst|Add0~33 )) # (!\seg_static_inst|cnt_wait [18] & ((\seg_static_inst|Add0~33 ) # (GND)))
+// \seg_static_inst|Add0~35 = CARRY((!\seg_static_inst|Add0~33 ) # (!\seg_static_inst|cnt_wait [18]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [18]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~33 ),
+ .combout(\seg_static_inst|Add0~34_combout ),
+ .cout(\seg_static_inst|Add0~35 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~34 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~34 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Add0~36 (
+// Equation(s):
+// \seg_static_inst|Add0~36_combout = (\seg_static_inst|cnt_wait [19] & (\seg_static_inst|Add0~35 $ (GND))) # (!\seg_static_inst|cnt_wait [19] & (!\seg_static_inst|Add0~35 & VCC))
+// \seg_static_inst|Add0~37 = CARRY((\seg_static_inst|cnt_wait [19] & !\seg_static_inst|Add0~35 ))
+
+ .dataa(\seg_static_inst|cnt_wait [19]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~35 ),
+ .combout(\seg_static_inst|Add0~36_combout ),
+ .cout(\seg_static_inst|Add0~37 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~36 .lut_mask = 16'hA50A;
+defparam \seg_static_inst|Add0~36 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~38 (
+// Equation(s):
+// \seg_static_inst|Add0~38_combout = (\seg_static_inst|cnt_wait [20] & (!\seg_static_inst|Add0~37 )) # (!\seg_static_inst|cnt_wait [20] & ((\seg_static_inst|Add0~37 ) # (GND)))
+// \seg_static_inst|Add0~39 = CARRY((!\seg_static_inst|Add0~37 ) # (!\seg_static_inst|cnt_wait [20]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~37 ),
+ .combout(\seg_static_inst|Add0~38_combout ),
+ .cout(\seg_static_inst|Add0~39 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~38 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~38 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~40 (
+// Equation(s):
+// \seg_static_inst|Add0~40_combout = (\seg_static_inst|cnt_wait [21] & (\seg_static_inst|Add0~39 $ (GND))) # (!\seg_static_inst|cnt_wait [21] & (!\seg_static_inst|Add0~39 & VCC))
+// \seg_static_inst|Add0~41 = CARRY((\seg_static_inst|cnt_wait [21] & !\seg_static_inst|Add0~39 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [21]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~39 ),
+ .combout(\seg_static_inst|Add0~40_combout ),
+ .cout(\seg_static_inst|Add0~41 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~40 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~40 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~42 (
+// Equation(s):
+// \seg_static_inst|Add0~42_combout = (\seg_static_inst|cnt_wait [22] & (!\seg_static_inst|Add0~41 )) # (!\seg_static_inst|cnt_wait [22] & ((\seg_static_inst|Add0~41 ) # (GND)))
+// \seg_static_inst|Add0~43 = CARRY((!\seg_static_inst|Add0~41 ) # (!\seg_static_inst|cnt_wait [22]))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~41 ),
+ .combout(\seg_static_inst|Add0~42_combout ),
+ .cout(\seg_static_inst|Add0~43 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~42 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~42 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~44 (
+// Equation(s):
+// \seg_static_inst|Add0~44_combout = (\seg_static_inst|cnt_wait [23] & (\seg_static_inst|Add0~43 $ (GND))) # (!\seg_static_inst|cnt_wait [23] & (!\seg_static_inst|Add0~43 & VCC))
+// \seg_static_inst|Add0~45 = CARRY((\seg_static_inst|cnt_wait [23] & !\seg_static_inst|Add0~43 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~43 ),
+ .combout(\seg_static_inst|Add0~44_combout ),
+ .cout(\seg_static_inst|Add0~45 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~44 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~44 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|Add0~46 (
+// Equation(s):
+// \seg_static_inst|Add0~46_combout = \seg_static_inst|Add0~45 $ (\seg_static_inst|cnt_wait [24])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(\seg_static_inst|Add0~45 ),
+ .combout(\seg_static_inst|Add0~46_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Add0~46 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|Add0~46 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N10
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~0 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~0_combout = (!\hc595_ctrl_inst|cnt_4 [1] & !\hc595_ctrl_inst|cnt_4 [0])
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~0 .lut_mask = 16'h0505;
+defparam \hc595_ctrl_inst|ds~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N27
+dffeas \seg_static_inst|seg[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr2~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N26
+cycloneive_lcell_comb \seg_static_inst|WideOr2~0 (
+// Equation(s):
+// \seg_static_inst|WideOr2~0_combout = (\seg_static_inst|num [1] & (\seg_static_inst|num [0] & (!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [1] & ((\seg_static_inst|num [2] & ((!\seg_static_inst|num [3]))) # (!\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr2~0 .lut_mask = 16'h223A;
+defparam \seg_static_inst|WideOr2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N3
+dffeas \seg_static_inst|cnt_wait[24] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [24]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[24] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N21
+dffeas \seg_static_inst|cnt_wait[23] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~44_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [23]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[23] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[23] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|Equal0~0 (
+// Equation(s):
+// \seg_static_inst|Equal0~0_combout = (\hc595_ctrl_inst|cnt_4 [1] & (!\seg_static_inst|cnt_wait [23] & (\hc595_ctrl_inst|cnt_4 [0] & \seg_static_inst|cnt_wait [24])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\seg_static_inst|cnt_wait [23]),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\seg_static_inst|cnt_wait [24]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~0 .lut_mask = 16'h2000;
+defparam \seg_static_inst|Equal0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N7
+dffeas \seg_static_inst|cnt_wait[22] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [22]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[22] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N25
+dffeas \seg_static_inst|cnt_wait[21] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [21]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[21] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N9
+dffeas \seg_static_inst|cnt_wait[20] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [20]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[20] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N27
+dffeas \seg_static_inst|cnt_wait[19] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [19]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[19] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[19] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N10
+cycloneive_lcell_comb \seg_static_inst|Equal0~1 (
+// Equation(s):
+// \seg_static_inst|Equal0~1_combout = (\seg_static_inst|cnt_wait [22] & (\seg_static_inst|cnt_wait [20] & (\seg_static_inst|cnt_wait [19] & \seg_static_inst|cnt_wait [21])))
+
+ .dataa(\seg_static_inst|cnt_wait [22]),
+ .datab(\seg_static_inst|cnt_wait [20]),
+ .datac(\seg_static_inst|cnt_wait [19]),
+ .datad(\seg_static_inst|cnt_wait [21]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~1 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N29
+dffeas \seg_static_inst|cnt_wait[18] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~5_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[18] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N29
+dffeas \seg_static_inst|cnt_wait[16] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[16] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N9
+dffeas \seg_static_inst|cnt_wait[17] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~32_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[17] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N5
+dffeas \seg_static_inst|cnt_wait[15] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~28_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[15] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N18
+cycloneive_lcell_comb \seg_static_inst|Equal0~2 (
+// Equation(s):
+// \seg_static_inst|Equal0~2_combout = (!\seg_static_inst|cnt_wait [17] & (\seg_static_inst|cnt_wait [16] & (!\seg_static_inst|cnt_wait [15] & \seg_static_inst|cnt_wait [18])))
+
+ .dataa(\seg_static_inst|cnt_wait [17]),
+ .datab(\seg_static_inst|cnt_wait [16]),
+ .datac(\seg_static_inst|cnt_wait [15]),
+ .datad(\seg_static_inst|cnt_wait [18]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~2 .lut_mask = 16'h0400;
+defparam \seg_static_inst|Equal0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N21
+dffeas \seg_static_inst|cnt_wait[14] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~7_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[14] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y12_N31
+dffeas \seg_static_inst|cnt_wait[13] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[13] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N23
+dffeas \seg_static_inst|cnt_wait[12] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~9_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[12] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N1
+dffeas \seg_static_inst|cnt_wait[11] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~10_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[11] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|Equal0~3 (
+// Equation(s):
+// \seg_static_inst|Equal0~3_combout = (\seg_static_inst|cnt_wait [11] & (\seg_static_inst|cnt_wait [14] & (\seg_static_inst|cnt_wait [12] & \seg_static_inst|cnt_wait [13])))
+
+ .dataa(\seg_static_inst|cnt_wait [11]),
+ .datab(\seg_static_inst|cnt_wait [14]),
+ .datac(\seg_static_inst|cnt_wait [12]),
+ .datad(\seg_static_inst|cnt_wait [13]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N12
+cycloneive_lcell_comb \seg_static_inst|Equal0~4 (
+// Equation(s):
+// \seg_static_inst|Equal0~4_combout = (\seg_static_inst|Equal0~1_combout & (\seg_static_inst|Equal0~2_combout & (\seg_static_inst|Equal0~3_combout & \seg_static_inst|Equal0~0_combout )))
+
+ .dataa(\seg_static_inst|Equal0~1_combout ),
+ .datab(\seg_static_inst|Equal0~2_combout ),
+ .datac(\seg_static_inst|Equal0~3_combout ),
+ .datad(\seg_static_inst|Equal0~0_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~4 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N23
+dffeas \seg_static_inst|cnt_wait[8] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~14_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[8] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N13
+dffeas \seg_static_inst|cnt_wait[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N2
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~0 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~0_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~46_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~46_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~0 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N6
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~1 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~1_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~42_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~42_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~1 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N24
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~2 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~2_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~40_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~40_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~2 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N8
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~3 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~3_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~38_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~38_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~3 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N26
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~4 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~4_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~36_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~36_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~4 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~5 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~5_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~34_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~34_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~5 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N28
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~6 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~6_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~30_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~30_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~6 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N20
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~7 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~7_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~26_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~26_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~7 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y12_N30
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~8 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~8_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~24_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~24_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~8_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~8 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~8 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N22
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~9 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~9_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~22_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(\seg_static_inst|Add0~22_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~9_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~9 .lut_mask = 16'h0F00;
+defparam \seg_static_inst|cnt_wait~9 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N0
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~10 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~10_combout = (!\seg_static_inst|Equal0~7_combout & \seg_static_inst|Add0~20_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Equal0~7_combout ),
+ .datac(\seg_static_inst|Add0~20_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~10_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~10 .lut_mask = 16'h3030;
+defparam \seg_static_inst|cnt_wait~10 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N9
+cycloneive_io_obuf \stcp~output (
+ .i(\hc595_ctrl_inst|stcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\stcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \stcp~output .bus_hold = "false";
+defparam \stcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y7_N23
+cycloneive_io_obuf \shcp~output (
+ .i(\hc595_ctrl_inst|shcp~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\shcp~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \shcp~output .bus_hold = "false";
+defparam \shcp~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y5_N16
+cycloneive_io_obuf \ds~output (
+ .i(\hc595_ctrl_inst|ds~q ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\ds~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \ds~output .bus_hold = "false";
+defparam \ds~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X0_Y6_N2
+cycloneive_io_obuf \oe~output (
+ .i(!\sys_rst_n~input_o ),
+ .oe(vcc),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(\oe~output_o ),
+ .obar());
+// synopsys translate_off
+defparam \oe~output .bus_hold = "false";
+defparam \oe~output .open_drain_output = "false";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y15_N22
+cycloneive_io_ibuf \sys_clk~input (
+ .i(sys_clk),
+ .ibar(gnd),
+ .o(\sys_clk~input_o ));
+// synopsys translate_off
+defparam \sys_clk~input .bus_hold = "false";
+defparam \sys_clk~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G8
+cycloneive_clkctrl \sys_clk~inputclkctrl (
+ .ena(vcc),
+ .inclk({vcc,vcc,vcc,\sys_clk~input_o }),
+ .clkselect(2'b00),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .outclk(\sys_clk~inputclkctrl_outclk ));
+// synopsys translate_off
+defparam \sys_clk~inputclkctrl .clock_type = "global clock";
+defparam \sys_clk~inputclkctrl .ena_register_mode = "none";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_4[0]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_4[0]~0_combout = !\hc595_ctrl_inst|cnt_4 [0]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .lut_mask = 16'h0F0F;
+defparam \hc595_ctrl_inst|cnt_4[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: IOIBUF_X41_Y4_N1
+cycloneive_io_ibuf \sys_rst_n~input (
+ .i(sys_rst_n),
+ .ibar(gnd),
+ .o(\sys_rst_n~input_o ));
+// synopsys translate_off
+defparam \sys_rst_n~input .bus_hold = "false";
+defparam \sys_rst_n~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N7
+dffeas \hc595_ctrl_inst|cnt_4[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_4[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N14
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[0]~1 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[0]~1_combout = \hc595_ctrl_inst|cnt_bit [0] $ (((\hc595_ctrl_inst|cnt_4 [1] & \hc595_ctrl_inst|cnt_4 [0])))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [1]),
+ .datab(\hc595_ctrl_inst|cnt_4 [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .lut_mask = 16'h7878;
+defparam \hc595_ctrl_inst|cnt_bit[0]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N15
+dffeas \hc595_ctrl_inst|cnt_bit[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[0]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[0] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[1]~0 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[1]~0_combout = (\hc595_ctrl_inst|Equal1~0_combout & (!\hc595_ctrl_inst|always2~1_combout & (\hc595_ctrl_inst|cnt_bit [0] $ (\hc595_ctrl_inst|cnt_bit [1])))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit
+// [1]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [0]),
+ .datac(\hc595_ctrl_inst|cnt_bit [1]),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .lut_mask = 16'h5078;
+defparam \hc595_ctrl_inst|cnt_bit[1]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N25
+dffeas \hc595_ctrl_inst|cnt_bit[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[1]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N0
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~0 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & \hc595_ctrl_inst|cnt_bit [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_bit [0]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|always2~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|Add0~0 (
+// Equation(s):
+// \seg_static_inst|Add0~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] $ (VCC))) # (!\hc595_ctrl_inst|cnt_4 [0] & (\hc595_ctrl_inst|cnt_4 [1] & VCC))
+// \seg_static_inst|Add0~1 = CARRY((\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1]))
+
+ .dataa(\hc595_ctrl_inst|cnt_4 [0]),
+ .datab(\hc595_ctrl_inst|cnt_4 [1]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(gnd),
+ .combout(\seg_static_inst|Add0~0_combout ),
+ .cout(\seg_static_inst|Add0~1 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~0 .lut_mask = 16'h6688;
+defparam \seg_static_inst|Add0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N9
+dffeas \hc595_ctrl_inst|cnt_4[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_4 [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_4[1] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_4[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N22
+cycloneive_lcell_comb \hc595_ctrl_inst|Equal1~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Equal1~0_combout = (\hc595_ctrl_inst|cnt_4 [0] & \hc595_ctrl_inst|cnt_4 [1])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\hc595_ctrl_inst|cnt_4 [0]),
+ .datad(\hc595_ctrl_inst|cnt_4 [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Equal1~0 .lut_mask = 16'hF000;
+defparam \hc595_ctrl_inst|Equal1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N16
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[3]~2 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[3]~2_combout = (\hc595_ctrl_inst|always2~0_combout & ((\hc595_ctrl_inst|cnt_bit [3] & ((!\hc595_ctrl_inst|Equal1~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Equal1~0_combout
+// )))) # (!\hc595_ctrl_inst|always2~0_combout & (((\hc595_ctrl_inst|cnt_bit [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|always2~0_combout ),
+ .datac(\hc595_ctrl_inst|cnt_bit [3]),
+ .datad(\hc595_ctrl_inst|Equal1~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .lut_mask = 16'h38F0;
+defparam \hc595_ctrl_inst|cnt_bit[3]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N17
+dffeas \hc595_ctrl_inst|cnt_bit[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[3]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[3] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N28
+cycloneive_lcell_comb \hc595_ctrl_inst|always2~1 (
+// Equation(s):
+// \hc595_ctrl_inst|always2~1_combout = (!\hc595_ctrl_inst|cnt_bit [2] & (\hc595_ctrl_inst|cnt_bit [3] & (\hc595_ctrl_inst|Equal1~0_combout & \hc595_ctrl_inst|always2~0_combout )))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [2]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|always2~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|always2~1 .lut_mask = 16'h4000;
+defparam \hc595_ctrl_inst|always2~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N4
+cycloneive_lcell_comb \hc595_ctrl_inst|stcp~feeder (
+// Equation(s):
+// \hc595_ctrl_inst|stcp~feeder_combout = \hc595_ctrl_inst|always2~1_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(\hc595_ctrl_inst|always2~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp~feeder .lut_mask = 16'hFF00;
+defparam \hc595_ctrl_inst|stcp~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N5
+dffeas \hc595_ctrl_inst|stcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|stcp~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|stcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|stcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|stcp .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N19
+dffeas \hc595_ctrl_inst|shcp (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(gnd),
+ .asdata(\hc595_ctrl_inst|cnt_4 [1]),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|shcp~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|shcp .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|shcp .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N26
+cycloneive_lcell_comb \hc595_ctrl_inst|cnt_bit[2]~3 (
+// Equation(s):
+// \hc595_ctrl_inst|cnt_bit[2]~3_combout = (\hc595_ctrl_inst|Equal1~0_combout & ((\hc595_ctrl_inst|cnt_bit [2] & ((!\hc595_ctrl_inst|always2~0_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\hc595_ctrl_inst|cnt_bit [3] &
+// \hc595_ctrl_inst|always2~0_combout )))) # (!\hc595_ctrl_inst|Equal1~0_combout & (((\hc595_ctrl_inst|cnt_bit [2]))))
+
+ .dataa(\hc595_ctrl_inst|Equal1~0_combout ),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|always2~0_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .lut_mask = 16'h52F0;
+defparam \hc595_ctrl_inst|cnt_bit[2]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N27
+dffeas \hc595_ctrl_inst|cnt_bit[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|cnt_bit[2]~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|cnt_bit [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|cnt_bit[2] .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|cnt_bit[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|Add0~2 (
+// Equation(s):
+// \seg_static_inst|Add0~2_combout = (\seg_static_inst|cnt_wait [2] & (!\seg_static_inst|Add0~1 )) # (!\seg_static_inst|cnt_wait [2] & ((\seg_static_inst|Add0~1 ) # (GND)))
+// \seg_static_inst|Add0~3 = CARRY((!\seg_static_inst|Add0~1 ) # (!\seg_static_inst|cnt_wait [2]))
+
+ .dataa(\seg_static_inst|cnt_wait [2]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~1 ),
+ .combout(\seg_static_inst|Add0~2_combout ),
+ .cout(\seg_static_inst|Add0~3 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~2 .lut_mask = 16'h5A5F;
+defparam \seg_static_inst|Add0~2 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N11
+dffeas \seg_static_inst|cnt_wait[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|Add0~6 (
+// Equation(s):
+// \seg_static_inst|Add0~6_combout = (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|Add0~5 )) # (!\seg_static_inst|cnt_wait [4] & ((\seg_static_inst|Add0~5 ) # (GND)))
+// \seg_static_inst|Add0~7 = CARRY((!\seg_static_inst|Add0~5 ) # (!\seg_static_inst|cnt_wait [4]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~5 ),
+ .combout(\seg_static_inst|Add0~6_combout ),
+ .cout(\seg_static_inst|Add0~7 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~6 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~6 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N15
+dffeas \seg_static_inst|cnt_wait[4] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~6_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[4] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|Add0~8 (
+// Equation(s):
+// \seg_static_inst|Add0~8_combout = (\seg_static_inst|cnt_wait [5] & (\seg_static_inst|Add0~7 $ (GND))) # (!\seg_static_inst|cnt_wait [5] & (!\seg_static_inst|Add0~7 & VCC))
+// \seg_static_inst|Add0~9 = CARRY((\seg_static_inst|cnt_wait [5] & !\seg_static_inst|Add0~7 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [5]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~7 ),
+ .combout(\seg_static_inst|Add0~8_combout ),
+ .cout(\seg_static_inst|Add0~9 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~8 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~8 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N17
+dffeas \seg_static_inst|cnt_wait[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~8_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|Add0~10 (
+// Equation(s):
+// \seg_static_inst|Add0~10_combout = (\seg_static_inst|cnt_wait [6] & (!\seg_static_inst|Add0~9 )) # (!\seg_static_inst|cnt_wait [6] & ((\seg_static_inst|Add0~9 ) # (GND)))
+// \seg_static_inst|Add0~11 = CARRY((!\seg_static_inst|Add0~9 ) # (!\seg_static_inst|cnt_wait [6]))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [6]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~9 ),
+ .combout(\seg_static_inst|Add0~10_combout ),
+ .cout(\seg_static_inst|Add0~11 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~10 .lut_mask = 16'h3C3F;
+defparam \seg_static_inst|Add0~10 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|cnt_wait~11 (
+// Equation(s):
+// \seg_static_inst|cnt_wait~11_combout = (\seg_static_inst|Add0~10_combout & !\seg_static_inst|Equal0~7_combout )
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|Add0~10_combout ),
+ .datac(gnd),
+ .datad(\seg_static_inst|Equal0~7_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|cnt_wait~11_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait~11 .lut_mask = 16'h00CC;
+defparam \seg_static_inst|cnt_wait~11 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N5
+dffeas \seg_static_inst|cnt_wait[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|cnt_wait~11_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|Add0~12 (
+// Equation(s):
+// \seg_static_inst|Add0~12_combout = (\seg_static_inst|cnt_wait [7] & (\seg_static_inst|Add0~11 $ (GND))) # (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|Add0~11 & VCC))
+// \seg_static_inst|Add0~13 = CARRY((\seg_static_inst|cnt_wait [7] & !\seg_static_inst|Add0~11 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~11 ),
+ .combout(\seg_static_inst|Add0~12_combout ),
+ .cout(\seg_static_inst|Add0~13 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~12 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~12 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N21
+dffeas \seg_static_inst|cnt_wait[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~12_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N24
+cycloneive_lcell_comb \seg_static_inst|Add0~16 (
+// Equation(s):
+// \seg_static_inst|Add0~16_combout = (\seg_static_inst|cnt_wait [9] & (\seg_static_inst|Add0~15 $ (GND))) # (!\seg_static_inst|cnt_wait [9] & (!\seg_static_inst|Add0~15 & VCC))
+// \seg_static_inst|Add0~17 = CARRY((\seg_static_inst|cnt_wait [9] & !\seg_static_inst|Add0~15 ))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|cnt_wait [9]),
+ .datac(gnd),
+ .datad(vcc),
+ .cin(\seg_static_inst|Add0~15 ),
+ .combout(\seg_static_inst|Add0~16_combout ),
+ .cout(\seg_static_inst|Add0~17 ));
+// synopsys translate_off
+defparam \seg_static_inst|Add0~16 .lut_mask = 16'hC30C;
+defparam \seg_static_inst|Add0~16 .sum_lutc_input = "cin";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N25
+dffeas \seg_static_inst|cnt_wait[9] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~16_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[9] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X14_Y13_N27
+dffeas \seg_static_inst|cnt_wait[10] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|Add0~18_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|cnt_wait [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|cnt_wait[10] .is_wysiwyg = "true";
+defparam \seg_static_inst|cnt_wait[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|Equal0~5 (
+// Equation(s):
+// \seg_static_inst|Equal0~5_combout = (!\seg_static_inst|cnt_wait [8] & (!\seg_static_inst|cnt_wait [7] & (!\seg_static_inst|cnt_wait [10] & !\seg_static_inst|cnt_wait [9])))
+
+ .dataa(\seg_static_inst|cnt_wait [8]),
+ .datab(\seg_static_inst|cnt_wait [7]),
+ .datac(\seg_static_inst|cnt_wait [10]),
+ .datad(\seg_static_inst|cnt_wait [9]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~5_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~5 .lut_mask = 16'h0001;
+defparam \seg_static_inst|Equal0~5 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X14_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|Equal0~6 (
+// Equation(s):
+// \seg_static_inst|Equal0~6_combout = (\seg_static_inst|cnt_wait [3] & (\seg_static_inst|cnt_wait [4] & (!\seg_static_inst|cnt_wait [6] & \seg_static_inst|cnt_wait [5])))
+
+ .dataa(\seg_static_inst|cnt_wait [3]),
+ .datab(\seg_static_inst|cnt_wait [4]),
+ .datac(\seg_static_inst|cnt_wait [6]),
+ .datad(\seg_static_inst|cnt_wait [5]),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~6_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~6 .lut_mask = 16'h0800;
+defparam \seg_static_inst|Equal0~6 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N14
+cycloneive_lcell_comb \seg_static_inst|Equal0~7 (
+// Equation(s):
+// \seg_static_inst|Equal0~7_combout = (\seg_static_inst|Equal0~4_combout & (\seg_static_inst|cnt_wait [2] & (\seg_static_inst|Equal0~5_combout & \seg_static_inst|Equal0~6_combout )))
+
+ .dataa(\seg_static_inst|Equal0~4_combout ),
+ .datab(\seg_static_inst|cnt_wait [2]),
+ .datac(\seg_static_inst|Equal0~5_combout ),
+ .datad(\seg_static_inst|Equal0~6_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|Equal0~7_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|Equal0~7 .lut_mask = 16'h8000;
+defparam \seg_static_inst|Equal0~7 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y12_N4
+cycloneive_lcell_comb \seg_static_inst|add_flag~feeder (
+// Equation(s):
+// \seg_static_inst|add_flag~feeder_combout = \seg_static_inst|Equal0~7_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|Equal0~7_combout ),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|add_flag~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|add_flag~feeder .lut_mask = 16'hF0F0;
+defparam \seg_static_inst|add_flag~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y12_N5
+dffeas \seg_static_inst|add_flag (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|add_flag~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|add_flag~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|add_flag .is_wysiwyg = "true";
+defparam \seg_static_inst|add_flag .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N10
+cycloneive_lcell_comb \seg_static_inst|num[0]~0 (
+// Equation(s):
+// \seg_static_inst|num[0]~0_combout = \seg_static_inst|add_flag~q $ (\seg_static_inst|num [0])
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [0]),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[0]~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[0]~0 .lut_mask = 16'h3C3C;
+defparam \seg_static_inst|num[0]~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N11
+dffeas \seg_static_inst|num[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N0
+cycloneive_lcell_comb \seg_static_inst|num[1]~1 (
+// Equation(s):
+// \seg_static_inst|num[1]~1_combout = \seg_static_inst|num [1] $ (((\seg_static_inst|add_flag~q & \seg_static_inst|num [0])))
+
+ .dataa(gnd),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [1]),
+ .datad(\seg_static_inst|num [0]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[1]~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[1]~1 .lut_mask = 16'h3CF0;
+defparam \seg_static_inst|num[1]~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N1
+dffeas \seg_static_inst|num[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[1]~1_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N14
+cycloneive_lcell_comb \seg_static_inst|num[2]~2 (
+// Equation(s):
+// \seg_static_inst|num[2]~2_combout = \seg_static_inst|num [2] $ (((\seg_static_inst|num [0] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|add_flag~q ),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[2]~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[2]~2 .lut_mask = 16'h78F0;
+defparam \seg_static_inst|num[2]~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N15
+dffeas \seg_static_inst|num[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[2]~2_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N18
+cycloneive_lcell_comb \seg_static_inst|num[3]~3 (
+// Equation(s):
+// \seg_static_inst|num[3]~3_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [2] & (\seg_static_inst|add_flag~q & \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [2]),
+ .datac(\seg_static_inst|add_flag~q ),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~3 .lut_mask = 16'h8000;
+defparam \seg_static_inst|num[3]~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N16
+cycloneive_lcell_comb \seg_static_inst|num[3]~4 (
+// Equation(s):
+// \seg_static_inst|num[3]~4_combout = \seg_static_inst|num [3] $ (\seg_static_inst|num[3]~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(\seg_static_inst|num [3]),
+ .datad(\seg_static_inst|num[3]~3_combout ),
+ .cin(gnd),
+ .combout(\seg_static_inst|num[3]~4_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|num[3]~4 .lut_mask = 16'h0FF0;
+defparam \seg_static_inst|num[3]~4 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N17
+dffeas \seg_static_inst|num[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|num[3]~4_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|num [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|num[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|num[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N8
+cycloneive_lcell_comb \seg_static_inst|WideOr1~0 (
+// Equation(s):
+// \seg_static_inst|WideOr1~0_combout = (\seg_static_inst|num [0] & (\seg_static_inst|num [3] $ (((\seg_static_inst|num [1]) # (!\seg_static_inst|num [2]))))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr1~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr1~0 .lut_mask = 16'h2382;
+defparam \seg_static_inst|WideOr1~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N9
+dffeas \seg_static_inst|seg[5] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr1~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[5] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N6
+cycloneive_lcell_comb \seg_static_inst|seg[7]~feeder (
+// Equation(s):
+// \seg_static_inst|seg[7]~feeder_combout = VCC
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .cin(gnd),
+ .combout(\seg_static_inst|seg[7]~feeder_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|seg[7]~feeder .lut_mask = 16'hFFFF;
+defparam \seg_static_inst|seg[7]~feeder .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N7
+dffeas \seg_static_inst|seg[7] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|seg[7]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[7] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N22
+cycloneive_lcell_comb \seg_static_inst|WideOr0~0 (
+// Equation(s):
+// \seg_static_inst|WideOr0~0_combout = (\seg_static_inst|num [0] & (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] $ (!\seg_static_inst|num [1])))) # (!\seg_static_inst|num [0] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [3] $
+// (!\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr0~0 .lut_mask = 16'h2043;
+defparam \seg_static_inst|WideOr0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N23
+dffeas \seg_static_inst|seg[6] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr0~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[6] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~2 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~2_combout = (\hc595_ctrl_inst|cnt_bit [0] & (((\hc595_ctrl_inst|cnt_bit [1]) # (!\seg_static_inst|seg [6])))) # (!\hc595_ctrl_inst|cnt_bit [0] & (!\seg_static_inst|seg [7] & ((!\hc595_ctrl_inst|cnt_bit [1]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [7]),
+ .datac(\seg_static_inst|seg [6]),
+ .datad(\hc595_ctrl_inst|cnt_bit [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~2 .lut_mask = 16'hAA1B;
+defparam \hc595_ctrl_inst|Mux0~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N24
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~3 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~3_combout = (\hc595_ctrl_inst|cnt_bit [1] & ((\hc595_ctrl_inst|Mux0~2_combout & (!\seg_static_inst|seg [4])) # (!\hc595_ctrl_inst|Mux0~2_combout & ((!\seg_static_inst|seg [5]))))) # (!\hc595_ctrl_inst|cnt_bit [1] &
+// (((\hc595_ctrl_inst|Mux0~2_combout ))))
+
+ .dataa(\seg_static_inst|seg [4]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [5]),
+ .datad(\hc595_ctrl_inst|Mux0~2_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~3 .lut_mask = 16'h770C;
+defparam \hc595_ctrl_inst|Mux0~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N20
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~2 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~2_combout = (!\hc595_ctrl_inst|cnt_bit [3] & ((\hc595_ctrl_inst|cnt_bit [2] & ((\hc595_ctrl_inst|Mux0~3_combout ))) # (!\hc595_ctrl_inst|cnt_bit [2] & (!\seg_static_inst|seg [7]))))
+
+ .dataa(\seg_static_inst|seg [7]),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~3_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~2_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~2 .lut_mask = 16'h3101;
+defparam \hc595_ctrl_inst|ds~2 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N20
+cycloneive_lcell_comb \seg_static_inst|WideOr4~0 (
+// Equation(s):
+// \seg_static_inst|WideOr4~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [2] & ((\seg_static_inst|num [1]) # (!\seg_static_inst|num [0])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [0] & (!\seg_static_inst|num [2] &
+// \seg_static_inst|num [1])))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr4~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr4~0 .lut_mask = 16'hC140;
+defparam \seg_static_inst|WideOr4~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N21
+dffeas \seg_static_inst|seg[2] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr4~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[2] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N4
+cycloneive_lcell_comb \seg_static_inst|WideOr3~0 (
+// Equation(s):
+// \seg_static_inst|WideOr3~0_combout = (\seg_static_inst|num [1] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [2]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [3] & !\seg_static_inst|num [2])))) # (!\seg_static_inst|num [1] &
+// (!\seg_static_inst|num [3] & (\seg_static_inst|num [0] $ (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr3~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr3~0 .lut_mask = 16'hA412;
+defparam \seg_static_inst|WideOr3~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N5
+dffeas \seg_static_inst|seg[3] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr3~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[3] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N2
+cycloneive_lcell_comb \seg_static_inst|WideOr5~0 (
+// Equation(s):
+// \seg_static_inst|WideOr5~0_combout = (\seg_static_inst|num [3] & ((\seg_static_inst|num [0] & ((\seg_static_inst|num [1]))) # (!\seg_static_inst|num [0] & (\seg_static_inst|num [2])))) # (!\seg_static_inst|num [3] & (\seg_static_inst|num [2] &
+// (\seg_static_inst|num [0] $ (\seg_static_inst|num [1]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr5~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr5~0 .lut_mask = 16'hD860;
+defparam \seg_static_inst|WideOr5~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N3
+dffeas \seg_static_inst|seg[1] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr5~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[1] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~0 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~0_combout = (\hc595_ctrl_inst|cnt_bit [0] & (\hc595_ctrl_inst|cnt_bit [1])) # (!\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|cnt_bit [1] & ((!\seg_static_inst|seg [1]))) # (!\hc595_ctrl_inst|cnt_bit [1] & (!\seg_static_inst|seg
+// [3]))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\hc595_ctrl_inst|cnt_bit [1]),
+ .datac(\seg_static_inst|seg [3]),
+ .datad(\seg_static_inst|seg [1]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~0 .lut_mask = 16'h89CD;
+defparam \hc595_ctrl_inst|Mux0~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N28
+cycloneive_lcell_comb \seg_static_inst|WideOr6~0 (
+// Equation(s):
+// \seg_static_inst|WideOr6~0_combout = (\seg_static_inst|num [3] & (\seg_static_inst|num [0] & (\seg_static_inst|num [2] $ (\seg_static_inst|num [1])))) # (!\seg_static_inst|num [3] & (!\seg_static_inst|num [1] & (\seg_static_inst|num [0] $
+// (\seg_static_inst|num [2]))))
+
+ .dataa(\seg_static_inst|num [0]),
+ .datab(\seg_static_inst|num [3]),
+ .datac(\seg_static_inst|num [2]),
+ .datad(\seg_static_inst|num [1]),
+ .cin(gnd),
+ .combout(\seg_static_inst|WideOr6~0_combout ),
+ .cout());
+// synopsys translate_off
+defparam \seg_static_inst|WideOr6~0 .lut_mask = 16'h0892;
+defparam \seg_static_inst|WideOr6~0 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X16_Y13_N29
+dffeas \seg_static_inst|seg[0] (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\seg_static_inst|WideOr6~0_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\seg_static_inst|seg [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \seg_static_inst|seg[0] .is_wysiwyg = "true";
+defparam \seg_static_inst|seg[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LCCOMB_X16_Y13_N6
+cycloneive_lcell_comb \hc595_ctrl_inst|Mux0~1 (
+// Equation(s):
+// \hc595_ctrl_inst|Mux0~1_combout = (\hc595_ctrl_inst|cnt_bit [0] & ((\hc595_ctrl_inst|Mux0~0_combout & ((!\seg_static_inst|seg [0]))) # (!\hc595_ctrl_inst|Mux0~0_combout & (!\seg_static_inst|seg [2])))) # (!\hc595_ctrl_inst|cnt_bit [0] &
+// (((\hc595_ctrl_inst|Mux0~0_combout ))))
+
+ .dataa(\hc595_ctrl_inst|cnt_bit [0]),
+ .datab(\seg_static_inst|seg [2]),
+ .datac(\hc595_ctrl_inst|Mux0~0_combout ),
+ .datad(\seg_static_inst|seg [0]),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|Mux0~1 .lut_mask = 16'h52F2;
+defparam \hc595_ctrl_inst|Mux0~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N12
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~1 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~1_combout = (\hc595_ctrl_inst|cnt_bit [3] & (!\hc595_ctrl_inst|cnt_bit [2] & \hc595_ctrl_inst|Mux0~1_combout ))
+
+ .dataa(gnd),
+ .datab(\hc595_ctrl_inst|cnt_bit [3]),
+ .datac(\hc595_ctrl_inst|cnt_bit [2]),
+ .datad(\hc595_ctrl_inst|Mux0~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~1_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~1 .lut_mask = 16'h0C00;
+defparam \hc595_ctrl_inst|ds~1 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: LCCOMB_X15_Y13_N30
+cycloneive_lcell_comb \hc595_ctrl_inst|ds~3 (
+// Equation(s):
+// \hc595_ctrl_inst|ds~3_combout = (\hc595_ctrl_inst|ds~0_combout & ((\hc595_ctrl_inst|ds~2_combout ) # ((\hc595_ctrl_inst|ds~1_combout )))) # (!\hc595_ctrl_inst|ds~0_combout & (((\hc595_ctrl_inst|ds~q ))))
+
+ .dataa(\hc595_ctrl_inst|ds~0_combout ),
+ .datab(\hc595_ctrl_inst|ds~2_combout ),
+ .datac(\hc595_ctrl_inst|ds~q ),
+ .datad(\hc595_ctrl_inst|ds~1_combout ),
+ .cin(gnd),
+ .combout(\hc595_ctrl_inst|ds~3_combout ),
+ .cout());
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds~3 .lut_mask = 16'hFAD8;
+defparam \hc595_ctrl_inst|ds~3 .sum_lutc_input = "datac";
+// synopsys translate_on
+
+// Location: FF_X15_Y13_N31
+dffeas \hc595_ctrl_inst|ds (
+ .clk(\sys_clk~inputclkctrl_outclk ),
+ .d(\hc595_ctrl_inst|ds~3_combout ),
+ .asdata(vcc),
+ .clrn(\sys_rst_n~input_o ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\hc595_ctrl_inst|ds~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \hc595_ctrl_inst|ds .is_wysiwyg = "true";
+defparam \hc595_ctrl_inst|ds .power_up = "low";
+// synopsys translate_on
+
+assign stcp = \stcp~output_o ;
+
+assign shcp = \shcp~output_o ;
+
+assign ds = \ds~output_o ;
+
+assign oe = \oe~output_o ;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_v_fast.sdo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_v_fast.sdo
new file mode 100644
index 0000000..831b7f2
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_min_1200mv_0c_v_fast.sdo
@@ -0,0 +1,1858 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This file contains Fast Corner delays for the design using part EP4CE15F23C8,
+// with speed grade M, core voltage 1.2V, and temperature 0 Celsius
+//
+
+//
+// This SDF file should be used for ModelSim (Verilog) only
+//
+
+(DELAYFILE
+ (SDFVERSION "2.1")
+ (DESIGN "seg_595_static")
+ (DATE "06/02/2023 20:55:14")
+ (VENDOR "Altera")
+ (PROGRAM "Quartus II 64-Bit")
+ (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version")
+ (DIVIDER .)
+ (TIMESCALE 1 ps)
+
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (136:136:136) (187:187:187))
+ (IOPATH dataa combout (186:186:186) (175:175:175))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~14)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (135:135:135) (187:187:187))
+ (IOPATH dataa combout (165:165:165) (173:173:173))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~18)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (134:134:134) (187:187:187))
+ (IOPATH dataa combout (165:165:165) (173:173:173))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~20)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (351:351:351) (421:421:421))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~22)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (379:379:379) (457:457:457))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~24)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (146:146:146) (198:198:198))
+ (IOPATH dataa combout (186:186:186) (175:175:175))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~26)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (215:215:215) (275:275:275))
+ (IOPATH dataa combout (165:165:165) (173:173:173))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~28)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (141:141:141) (189:189:189))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~30)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (144:144:144) (193:193:193))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~32)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (142:142:142) (190:190:190))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~34)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (215:215:215) (273:273:273))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~36)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (144:144:144) (196:196:196))
+ (IOPATH dataa combout (186:186:186) (175:175:175))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~38)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (228:228:228) (284:284:284))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~40)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (142:142:142) (190:190:190))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~42)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (216:216:216) (275:275:275))
+ (IOPATH dataa combout (165:165:165) (173:173:173))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~44)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (142:142:142) (190:190:190))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~46)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (204:204:204) (250:250:250))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (230:230:230) (294:294:294))
+ (PORT datac (213:213:213) (266:266:266))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datac combout (120:120:120) (125:125:125))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (181:181:181) (253:253:253))
+ (PORT datab (161:161:161) (219:219:219))
+ (PORT datac (150:150:150) (207:207:207))
+ (PORT datad (156:156:156) (207:207:207))
+ (IOPATH dataa combout (170:170:170) (163:163:163))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[24\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1068:1068:1068) (1098:1098:1098))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[23\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (365:365:365) (442:442:442))
+ (PORT datab (224:224:224) (277:277:277))
+ (PORT datac (341:341:341) (407:407:407))
+ (PORT datad (131:131:131) (169:169:169))
+ (IOPATH dataa combout (166:166:166) (157:157:157))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[22\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[21\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[20\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[19\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (142:142:142) (193:193:193))
+ (PORT datab (142:142:142) (189:189:189))
+ (PORT datac (209:209:209) (259:259:259))
+ (PORT datad (207:207:207) (253:253:253))
+ (IOPATH dataa combout (159:159:159) (163:163:163))
+ (IOPATH datab combout (161:161:161) (167:167:167))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[18\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[16\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[17\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[15\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (210:210:210) (267:267:267))
+ (PORT datab (223:223:223) (276:276:276))
+ (PORT datac (196:196:196) (243:243:243))
+ (PORT datad (129:129:129) (167:167:167))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (166:166:166) (158:158:158))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[14\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[13\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2807:2807:2807) (2498:2498:2498))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[12\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[11\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (871:871:871) (876:876:876))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (234:234:234) (289:289:289))
+ (PORT datab (142:142:142) (190:190:190))
+ (PORT datac (128:128:128) (168:168:168))
+ (PORT datad (193:193:193) (236:236:236))
+ (IOPATH dataa combout (159:159:159) (163:163:163))
+ (IOPATH datab combout (161:161:161) (167:167:167))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (104:104:104) (135:135:135))
+ (PORT datab (103:103:103) (132:132:132))
+ (PORT datac (91:91:91) (113:113:113))
+ (PORT datad (91:91:91) (110:110:110))
+ (IOPATH dataa combout (159:159:159) (163:163:163))
+ (IOPATH datab combout (161:161:161) (167:167:167))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[8\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (135:135:135) (172:172:172))
+ (PORT datad (160:160:160) (187:187:187))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (134:134:134) (171:171:171))
+ (PORT datad (159:159:159) (185:185:185))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (209:209:209) (254:254:254))
+ (PORT datad (91:91:91) (108:108:108))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (134:134:134) (170:170:170))
+ (PORT datad (161:161:161) (184:184:184))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (209:209:209) (254:254:254))
+ (PORT datad (92:92:92) (109:109:109))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (135:135:135) (172:172:172))
+ (PORT datad (169:169:169) (198:198:198))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (209:209:209) (254:254:254))
+ (PORT datad (93:93:93) (111:111:111))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (134:134:134) (172:172:172))
+ (PORT datad (168:168:168) (196:196:196))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (210:210:210) (255:255:255))
+ (PORT datad (94:94:94) (112:112:112))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~9)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (134:134:134) (172:172:172))
+ (PORT datad (273:273:273) (310:310:310))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (153:153:153) (195:195:195))
+ (PORT datac (313:313:313) (361:361:361))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE stcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (687:687:687) (805:805:805))
+ (IOPATH i o (1832:1832:1832) (1805:1805:1805))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE shcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (756:756:756) (878:878:878))
+ (IOPATH i o (1812:1812:1812) (1785:1785:1785))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE ds\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (914:914:914) (1043:1043:1043))
+ (IOPATH i o (1822:1822:1822) (1795:1795:1795))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE oe\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (2303:2303:2303) (2047:2047:2047))
+ (IOPATH i o (1795:1795:1795) (1822:1822:1822))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_clk\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (358:358:358) (738:738:738))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_clkctrl")
+ (INSTANCE sys_clk\~inputclkctrl)
+ (DELAY
+ (ABSOLUTE
+ (PORT inclk[0] (97:97:97) (82:82:82))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_rst_n\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (318:318:318) (698:698:698))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (230:230:230) (294:294:294))
+ (PORT datab (228:228:228) (288:288:288))
+ (IOPATH dataa combout (188:188:188) (203:203:203))
+ (IOPATH datab combout (190:190:190) (205:205:205))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (128:128:128) (162:162:162))
+ (PORT datab (148:148:148) (198:198:198))
+ (PORT datad (94:94:94) (113:113:113))
+ (IOPATH dataa combout (188:188:188) (203:203:203))
+ (IOPATH datab combout (190:190:190) (205:205:205))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (134:134:134) (177:177:177))
+ (PORT datad (132:132:132) (170:170:170))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (142:142:142) (192:192:192))
+ (PORT datab (141:141:141) (189:189:189))
+ (IOPATH dataa combout (186:186:186) (180:180:180))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datab combout (190:190:190) (181:181:181))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Equal1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (215:215:215) (268:268:268))
+ (PORT datad (218:218:218) (269:269:269))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (148:148:148) (205:205:205))
+ (PORT datab (115:115:115) (148:148:148))
+ (PORT datad (174:174:174) (198:198:198))
+ (IOPATH dataa combout (158:158:158) (163:163:163))
+ (IOPATH datab combout (160:160:160) (176:176:176))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (145:145:145) (203:203:203))
+ (PORT datab (146:146:146) (200:200:200))
+ (PORT datac (113:113:113) (139:139:139))
+ (PORT datad (104:104:104) (127:127:127))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (167:167:167) (156:156:156))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|stcp\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (97:97:97) (117:117:117))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|stcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|shcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT asdata (504:504:504) (567:567:567))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD asdata (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (128:128:128) (163:163:163))
+ (PORT datab (146:146:146) (200:200:200))
+ (PORT datad (103:103:103) (126:126:126))
+ (IOPATH dataa combout (165:165:165) (159:159:159))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (142:142:142) (192:192:192))
+ (IOPATH dataa combout (165:165:165) (173:173:173))
+ (IOPATH dataa cout (226:226:226) (171:171:171))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (134:134:134) (184:184:184))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (133:133:133) (183:183:183))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (136:136:136) (186:186:186))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~11)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (105:105:105) (134:134:134))
+ (PORT datad (324:324:324) (373:373:373))
+ (IOPATH datab combout (168:168:168) (167:167:167))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~12)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (134:134:134) (183:183:183))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~16)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (133:133:133) (182:182:182))
+ (IOPATH datab combout (192:192:192) (177:177:177))
+ (IOPATH datab cout (227:227:227) (175:175:175))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ (IOPATH cin combout (187:187:187) (204:204:204))
+ (IOPATH cin cout (34:34:34) (34:34:34))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[9\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[10\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2789:2789:2789) (2490:2490:2490))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (139:139:139) (192:192:192))
+ (PORT datab (137:137:137) (187:187:187))
+ (PORT datac (124:124:124) (168:168:168))
+ (PORT datad (124:124:124) (164:164:164))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (136:136:136) (189:189:189))
+ (PORT datab (135:135:135) (185:185:185))
+ (PORT datac (120:120:120) (163:163:163))
+ (PORT datad (123:123:123) (162:162:162))
+ (IOPATH dataa combout (158:158:158) (163:163:163))
+ (IOPATH datab combout (160:160:160) (167:167:167))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (104:104:104) (135:135:135))
+ (PORT datab (489:489:489) (577:577:577))
+ (PORT datac (424:424:424) (479:479:479))
+ (PORT datad (415:415:415) (470:470:470))
+ (IOPATH dataa combout (159:159:159) (163:163:163))
+ (IOPATH datab combout (161:161:161) (167:167:167))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|add_flag\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (135:135:135) (171:171:171))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|add_flag)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1068:1068:1068) (1098:1098:1098))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (3084:3084:3084) (2737:2737:2737))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (377:377:377) (459:459:459))
+ (IOPATH datab combout (196:196:196) (205:205:205))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[1\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (377:377:377) (458:458:458))
+ (PORT datad (161:161:161) (219:219:219))
+ (IOPATH datab combout (166:166:166) (176:176:176))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[2\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (178:178:178) (250:250:250))
+ (PORT datab (378:378:378) (459:459:459))
+ (PORT datad (151:151:151) (203:203:203))
+ (IOPATH dataa combout (158:158:158) (173:173:173))
+ (IOPATH datab combout (160:160:160) (176:176:176))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (179:179:179) (251:251:251))
+ (PORT datab (166:166:166) (228:228:228))
+ (PORT datac (362:362:362) (438:438:438))
+ (PORT datad (154:154:154) (205:205:205))
+ (IOPATH dataa combout (159:159:159) (163:163:163))
+ (IOPATH datab combout (161:161:161) (167:167:167))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (91:91:91) (108:108:108))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (177:177:177) (247:247:247))
+ (PORT datab (161:161:161) (220:220:220))
+ (PORT datac (148:148:148) (204:204:204))
+ (PORT datad (148:148:148) (199:199:199))
+ (IOPATH dataa combout (170:170:170) (163:163:163))
+ (IOPATH datab combout (182:182:182) (193:193:193))
+ (IOPATH datac combout (120:120:120) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (180:180:180) (252:252:252))
+ (PORT datab (160:160:160) (218:218:218))
+ (PORT datac (149:149:149) (207:207:207))
+ (PORT datad (155:155:155) (206:206:206))
+ (IOPATH dataa combout (166:166:166) (157:157:157))
+ (IOPATH datab combout (188:188:188) (177:177:177))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (226:226:226) (285:285:285))
+ (PORT datab (213:213:213) (266:266:266))
+ (PORT datac (117:117:117) (159:159:159))
+ (PORT datad (219:219:219) (268:268:268))
+ (IOPATH dataa combout (188:188:188) (184:184:184))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (131:131:131) (182:182:182))
+ (PORT datab (236:236:236) (291:291:291))
+ (PORT datac (118:118:118) (160:160:160))
+ (PORT datad (92:92:92) (109:109:109))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (192:192:192) (181:181:181))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (145:145:145) (196:196:196))
+ (PORT datab (146:146:146) (199:199:199))
+ (PORT datac (132:132:132) (180:180:180))
+ (PORT datad (172:172:172) (203:203:203))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (120:120:120) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr4\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (180:180:180) (252:252:252))
+ (PORT datab (160:160:160) (218:218:218))
+ (PORT datac (149:149:149) (206:206:206))
+ (PORT datad (154:154:154) (205:205:205))
+ (IOPATH dataa combout (158:158:158) (157:157:157))
+ (IOPATH datab combout (168:168:168) (167:167:167))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr3\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (177:177:177) (247:247:247))
+ (PORT datab (162:162:162) (221:221:221))
+ (PORT datac (148:148:148) (204:204:204))
+ (PORT datad (146:146:146) (197:197:197))
+ (IOPATH dataa combout (192:192:192) (184:184:184))
+ (IOPATH datab combout (166:166:166) (158:158:158))
+ (IOPATH datac combout (120:120:120) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr5\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (177:177:177) (247:247:247))
+ (PORT datab (162:162:162) (221:221:221))
+ (PORT datac (148:148:148) (205:205:205))
+ (PORT datad (145:145:145) (195:195:195))
+ (IOPATH dataa combout (188:188:188) (179:179:179))
+ (IOPATH datab combout (188:188:188) (177:177:177))
+ (IOPATH datac combout (119:119:119) (124:124:124))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (227:227:227) (286:286:286))
+ (PORT datab (235:235:235) (291:291:291))
+ (PORT datac (120:120:120) (161:161:161))
+ (PORT datad (121:121:121) (158:158:158))
+ (IOPATH dataa combout (159:159:159) (173:173:173))
+ (IOPATH datab combout (168:168:168) (167:167:167))
+ (IOPATH datac combout (120:120:120) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr6\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (182:182:182) (253:253:253))
+ (PORT datab (161:161:161) (219:219:219))
+ (PORT datac (151:151:151) (208:208:208))
+ (PORT datad (156:156:156) (208:208:208))
+ (IOPATH dataa combout (192:192:192) (184:184:184))
+ (IOPATH datab combout (182:182:182) (193:193:193))
+ (IOPATH datac combout (120:120:120) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (878:878:878))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2920:2920:2920) (2600:2600:2600))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (226:226:226) (285:285:285))
+ (PORT datab (132:132:132) (181:181:181))
+ (PORT datac (92:92:92) (115:115:115))
+ (PORT datad (120:120:120) (158:158:158))
+ (IOPATH dataa combout (186:186:186) (180:180:180))
+ (IOPATH datab combout (160:160:160) (156:156:156))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (145:145:145) (199:199:199))
+ (PORT datac (133:133:133) (183:183:183))
+ (PORT datad (163:163:163) (192:192:192))
+ (IOPATH datab combout (166:166:166) (167:167:167))
+ (IOPATH datac combout (119:119:119) (125:125:125))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (107:107:107) (139:139:139))
+ (PORT datab (104:104:104) (132:132:132))
+ (PORT datad (92:92:92) (110:110:110))
+ (IOPATH dataa combout (188:188:188) (184:184:184))
+ (IOPATH datab combout (168:168:168) (167:167:167))
+ (IOPATH datac combout (190:190:190) (195:195:195))
+ (IOPATH datad combout (68:68:68) (63:63:63))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|ds)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (872:872:872) (877:877:877))
+ (PORT d (37:37:37) (50:50:50))
+ (PORT clrn (2934:2934:2934) (2613:2613:2613))
+ (IOPATH (posedge clk) q (105:105:105) (105:105:105))
+ (IOPATH (negedge clrn) q (110:110:110) (110:110:110))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (84:84:84))
+ )
+ )
+)
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_modelsim.xrf b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_modelsim.xrf
new file mode 100644
index 0000000..ce539a9
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_modelsim.xrf
@@ -0,0 +1,135 @@
+vendor_name = ModelSim
+source_file = 1, E:/simiao/lc/A415/03_smg595/smg595_static/smg595_static/sim/tb_seg_595_static.v
+source_file = 1, E:/simiao/lc/A415/03_smg595/smg595_static/smg595_static/rtl/seg_static.v
+source_file = 1, E:/simiao/lc/A415/03_smg595/smg595_static/smg595_static/rtl/seg_595_static.v
+source_file = 1, E:/simiao/lc/A415/03_smg595/smg595_static/smg595_static/rtl/hc595_ctrl.v
+source_file = 1, output_files/Chain1.cdf
+source_file = 1, E:/simiao/lc/A415/03_smg595/smg595_static/smg595_static/quartus_prj/db/seg_595_static.cbx.xml
+design_name = seg_595_static
+instance = comp, \seg_static_inst|Add0~4 , seg_static_inst|Add0~4, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~14 , seg_static_inst|Add0~14, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~18 , seg_static_inst|Add0~18, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~20 , seg_static_inst|Add0~20, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~22 , seg_static_inst|Add0~22, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~24 , seg_static_inst|Add0~24, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~26 , seg_static_inst|Add0~26, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~28 , seg_static_inst|Add0~28, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~30 , seg_static_inst|Add0~30, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~32 , seg_static_inst|Add0~32, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~34 , seg_static_inst|Add0~34, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~36 , seg_static_inst|Add0~36, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~38 , seg_static_inst|Add0~38, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~40 , seg_static_inst|Add0~40, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~42 , seg_static_inst|Add0~42, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~44 , seg_static_inst|Add0~44, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~46 , seg_static_inst|Add0~46, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|ds~0 , hc595_ctrl_inst|ds~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[4] , seg_static_inst|seg[4], seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr2~0 , seg_static_inst|WideOr2~0, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[24] , seg_static_inst|cnt_wait[24], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[23] , seg_static_inst|cnt_wait[23], seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~0 , seg_static_inst|Equal0~0, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[22] , seg_static_inst|cnt_wait[22], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[21] , seg_static_inst|cnt_wait[21], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[20] , seg_static_inst|cnt_wait[20], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[19] , seg_static_inst|cnt_wait[19], seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~1 , seg_static_inst|Equal0~1, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[18] , seg_static_inst|cnt_wait[18], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[16] , seg_static_inst|cnt_wait[16], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[17] , seg_static_inst|cnt_wait[17], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[15] , seg_static_inst|cnt_wait[15], seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~2 , seg_static_inst|Equal0~2, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[14] , seg_static_inst|cnt_wait[14], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[13] , seg_static_inst|cnt_wait[13], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[12] , seg_static_inst|cnt_wait[12], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[11] , seg_static_inst|cnt_wait[11], seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~3 , seg_static_inst|Equal0~3, seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~4 , seg_static_inst|Equal0~4, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[8] , seg_static_inst|cnt_wait[8], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[3] , seg_static_inst|cnt_wait[3], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~0 , seg_static_inst|cnt_wait~0, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~1 , seg_static_inst|cnt_wait~1, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~2 , seg_static_inst|cnt_wait~2, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~3 , seg_static_inst|cnt_wait~3, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~4 , seg_static_inst|cnt_wait~4, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~5 , seg_static_inst|cnt_wait~5, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~6 , seg_static_inst|cnt_wait~6, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~7 , seg_static_inst|cnt_wait~7, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~8 , seg_static_inst|cnt_wait~8, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~9 , seg_static_inst|cnt_wait~9, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~10 , seg_static_inst|cnt_wait~10, seg_595_static, 1
+instance = comp, \stcp~output , stcp~output, seg_595_static, 1
+instance = comp, \shcp~output , shcp~output, seg_595_static, 1
+instance = comp, \ds~output , ds~output, seg_595_static, 1
+instance = comp, \oe~output , oe~output, seg_595_static, 1
+instance = comp, \sys_clk~input , sys_clk~input, seg_595_static, 1
+instance = comp, \sys_clk~inputclkctrl , sys_clk~inputclkctrl, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_4[0]~0 , hc595_ctrl_inst|cnt_4[0]~0, seg_595_static, 1
+instance = comp, \sys_rst_n~input , sys_rst_n~input, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_4[0] , hc595_ctrl_inst|cnt_4[0], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[0]~1 , hc595_ctrl_inst|cnt_bit[0]~1, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[0] , hc595_ctrl_inst|cnt_bit[0], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[1]~0 , hc595_ctrl_inst|cnt_bit[1]~0, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[1] , hc595_ctrl_inst|cnt_bit[1], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|always2~0 , hc595_ctrl_inst|always2~0, seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~0 , seg_static_inst|Add0~0, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_4[1] , hc595_ctrl_inst|cnt_4[1], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|Equal1~0 , hc595_ctrl_inst|Equal1~0, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[3]~2 , hc595_ctrl_inst|cnt_bit[3]~2, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[3] , hc595_ctrl_inst|cnt_bit[3], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|always2~1 , hc595_ctrl_inst|always2~1, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|stcp~feeder , hc595_ctrl_inst|stcp~feeder, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|stcp , hc595_ctrl_inst|stcp, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|shcp , hc595_ctrl_inst|shcp, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[2]~3 , hc595_ctrl_inst|cnt_bit[2]~3, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|cnt_bit[2] , hc595_ctrl_inst|cnt_bit[2], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~2 , seg_static_inst|Add0~2, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[2] , seg_static_inst|cnt_wait[2], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~6 , seg_static_inst|Add0~6, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[4] , seg_static_inst|cnt_wait[4], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~8 , seg_static_inst|Add0~8, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[5] , seg_static_inst|cnt_wait[5], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~10 , seg_static_inst|Add0~10, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait~11 , seg_static_inst|cnt_wait~11, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[6] , seg_static_inst|cnt_wait[6], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~12 , seg_static_inst|Add0~12, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[7] , seg_static_inst|cnt_wait[7], seg_595_static, 1
+instance = comp, \seg_static_inst|Add0~16 , seg_static_inst|Add0~16, seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[9] , seg_static_inst|cnt_wait[9], seg_595_static, 1
+instance = comp, \seg_static_inst|cnt_wait[10] , seg_static_inst|cnt_wait[10], seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~5 , seg_static_inst|Equal0~5, seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~6 , seg_static_inst|Equal0~6, seg_595_static, 1
+instance = comp, \seg_static_inst|Equal0~7 , seg_static_inst|Equal0~7, seg_595_static, 1
+instance = comp, \seg_static_inst|add_flag~feeder , seg_static_inst|add_flag~feeder, seg_595_static, 1
+instance = comp, \seg_static_inst|add_flag , seg_static_inst|add_flag, seg_595_static, 1
+instance = comp, \seg_static_inst|num[0]~0 , seg_static_inst|num[0]~0, seg_595_static, 1
+instance = comp, \seg_static_inst|num[0] , seg_static_inst|num[0], seg_595_static, 1
+instance = comp, \seg_static_inst|num[1]~1 , seg_static_inst|num[1]~1, seg_595_static, 1
+instance = comp, \seg_static_inst|num[1] , seg_static_inst|num[1], seg_595_static, 1
+instance = comp, \seg_static_inst|num[2]~2 , seg_static_inst|num[2]~2, seg_595_static, 1
+instance = comp, \seg_static_inst|num[2] , seg_static_inst|num[2], seg_595_static, 1
+instance = comp, \seg_static_inst|num[3]~3 , seg_static_inst|num[3]~3, seg_595_static, 1
+instance = comp, \seg_static_inst|num[3]~4 , seg_static_inst|num[3]~4, seg_595_static, 1
+instance = comp, \seg_static_inst|num[3] , seg_static_inst|num[3], seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr1~0 , seg_static_inst|WideOr1~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[5] , seg_static_inst|seg[5], seg_595_static, 1
+instance = comp, \seg_static_inst|seg[7]~feeder , seg_static_inst|seg[7]~feeder, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[7] , seg_static_inst|seg[7], seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr0~0 , seg_static_inst|WideOr0~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[6] , seg_static_inst|seg[6], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|Mux0~2 , hc595_ctrl_inst|Mux0~2, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|Mux0~3 , hc595_ctrl_inst|Mux0~3, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|ds~2 , hc595_ctrl_inst|ds~2, seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr4~0 , seg_static_inst|WideOr4~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[2] , seg_static_inst|seg[2], seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr3~0 , seg_static_inst|WideOr3~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[3] , seg_static_inst|seg[3], seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr5~0 , seg_static_inst|WideOr5~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[1] , seg_static_inst|seg[1], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|Mux0~0 , hc595_ctrl_inst|Mux0~0, seg_595_static, 1
+instance = comp, \seg_static_inst|WideOr6~0 , seg_static_inst|WideOr6~0, seg_595_static, 1
+instance = comp, \seg_static_inst|seg[0] , seg_static_inst|seg[0], seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|Mux0~1 , hc595_ctrl_inst|Mux0~1, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|ds~1 , hc595_ctrl_inst|ds~1, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|ds~3 , hc595_ctrl_inst|ds~3, seg_595_static, 1
+instance = comp, \hc595_ctrl_inst|ds , hc595_ctrl_inst|ds, seg_595_static, 1
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_v.sdo b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_v.sdo
new file mode 100644
index 0000000..7f4cf64
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/quartus_prj/simulation/modelsim/seg_595_static_v.sdo
@@ -0,0 +1,1858 @@
+// Copyright (C) 1991-2013 Altera Corporation
+// Your use of Altera Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Altera Program License
+// Subscription Agreement, Altera MegaCore Function License
+// Agreement, or other applicable license agreement, including,
+// without limitation, that your use is for the sole purpose of
+// programming logic devices manufactured by Altera and sold by
+// Altera or its authorized distributors. Please refer to the
+// applicable agreement for further details.
+
+
+//
+// Device: Altera EP4CE15F23C8 Package FBGA484
+//
+
+//
+// This file contains Slow Corner delays for the design using part EP4CE15F23C8,
+// with speed grade 8, core voltage 1.2V, and temperature 85 Celsius
+//
+
+//
+// This SDF file should be used for ModelSim (Verilog) only
+//
+
+(DELAYFILE
+ (SDFVERSION "2.1")
+ (DESIGN "seg_595_static")
+ (DATE "06/02/2023 20:55:14")
+ (VENDOR "Altera")
+ (PROGRAM "Quartus II 64-Bit")
+ (VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version")
+ (DIVIDER .)
+ (TIMESCALE 1 ps)
+
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (344:344:344) (433:433:433))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~14)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (343:343:343) (432:432:432))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~18)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (342:342:342) (429:429:429))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~20)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (940:940:940) (921:921:921))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~22)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (984:984:984) (971:971:971))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~24)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (365:365:365) (450:450:450))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~26)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (573:573:573) (611:611:611))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~28)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (358:358:358) (434:434:434))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~30)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (361:361:361) (438:438:438))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~32)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (359:359:359) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~34)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (572:572:572) (603:603:603))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~36)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (363:363:363) (446:446:446))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~38)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (628:628:628) (632:632:632))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~40)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (360:360:360) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~42)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (577:577:577) (611:611:611))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~44)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (360:360:360) (436:436:436))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~46)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (539:539:539) (559:559:559))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (597:597:597) (647:647:647))
+ (PORT datac (558:558:558) (595:595:595))
+ (IOPATH dataa combout (481:481:481) (491:491:491))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (418:418:418) (560:560:560))
+ (PORT datab (386:386:386) (503:503:503))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (369:369:369) (466:466:466))
+ (IOPATH dataa combout (471:471:471) (472:472:472))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[24\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2328:2328:2328) (2322:2322:2322))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[23\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (936:936:936) (939:939:939))
+ (PORT datab (615:615:615) (619:619:619))
+ (PORT datac (876:876:876) (872:872:872))
+ (PORT datad (322:322:322) (392:392:392))
+ (IOPATH dataa combout (405:405:405) (398:398:398))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[22\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[21\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[20\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[19\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (362:362:362) (445:445:445))
+ (PORT datab (359:359:359) (436:436:436))
+ (PORT datac (564:564:564) (579:579:579))
+ (PORT datad (556:556:556) (569:569:569))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[18\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[16\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[17\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[15\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (558:558:558) (595:595:595))
+ (PORT datab (613:613:613) (617:617:617))
+ (PORT datac (516:516:516) (547:547:547))
+ (PORT datad (319:319:319) (389:389:389))
+ (IOPATH dataa combout (421:421:421) (418:418:418))
+ (IOPATH datab combout (407:407:407) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[14\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[13\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5733:5733:5733) (5447:5447:5447))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[12\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[11\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1851:1851:1851))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (634:634:634) (642:642:642))
+ (PORT datab (360:360:360) (436:436:436))
+ (PORT datac (319:319:319) (396:396:396))
+ (PORT datad (516:516:516) (534:534:534))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (280:280:280) (312:312:312))
+ (PORT datab (278:278:278) (303:303:303))
+ (PORT datac (237:237:237) (263:263:263))
+ (PORT datad (238:238:238) (257:257:257))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[8\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (438:438:438) (415:415:415))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (437:437:437) (414:414:414))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (540:540:540))
+ (PORT datad (238:238:238) (256:256:256))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (447:447:447) (410:410:410))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (541:541:541))
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (383:383:383))
+ (PORT datad (469:469:469) (437:437:437))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (554:554:554) (541:541:541))
+ (PORT datad (240:240:240) (259:259:259))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (468:468:468) (435:435:435))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (555:555:555) (541:541:541))
+ (PORT datad (241:241:241) (260:260:260))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~9)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (PORT datad (739:739:739) (665:665:665))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (365:365:365) (423:423:423))
+ (PORT datac (829:829:829) (765:765:765))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE stcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1656:1656:1656) (1618:1618:1618))
+ (IOPATH i o (3449:3449:3449) (3386:3386:3386))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE shcp\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (1872:1872:1872) (1788:1788:1788))
+ (IOPATH i o (3429:3429:3429) (3366:3366:3366))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE ds\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (2238:2238:2238) (2101:2101:2101))
+ (IOPATH i o (3439:3439:3439) (3376:3376:3376))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_obuf")
+ (INSTANCE oe\~output)
+ (DELAY
+ (ABSOLUTE
+ (PORT i (4546:4546:4546) (4318:4318:4318))
+ (IOPATH i o (3376:3376:3376) (3439:3439:3439))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_clk\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (806:806:806) (852:852:852))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_clkctrl")
+ (INSTANCE sys_clk\~inputclkctrl)
+ (DELAY
+ (ABSOLUTE
+ (PORT inclk[0] (200:200:200) (189:189:189))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_io_ibuf")
+ (INSTANCE sys_rst_n\~input)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH i o (766:766:766) (812:812:812))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (599:599:599) (649:649:649))
+ (PORT datab (602:602:602) (636:636:636))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (325:325:325) (367:367:367))
+ (PORT datab (371:371:371) (453:453:453))
+ (PORT datad (245:245:245) (266:266:266))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (328:328:328) (413:413:413))
+ (PORT datad (323:323:323) (394:394:394))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (444:444:444))
+ (PORT datab (358:358:358) (435:435:435))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datab combout (454:454:454) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_4\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Equal1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (560:560:560) (597:597:597))
+ (PORT datad (556:556:556) (596:596:596))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (364:364:364) (464:464:464))
+ (PORT datab (298:298:298) (330:330:330))
+ (PORT datad (467:467:467) (441:441:441))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|always2\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (460:460:460))
+ (PORT datab (361:361:361) (457:457:457))
+ (PORT datac (281:281:281) (320:320:320))
+ (PORT datad (259:259:259) (289:289:289))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (410:410:410) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|stcp\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (248:248:248) (270:270:270))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|stcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|shcp)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT asdata (1335:1335:1335) (1325:1325:1325))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD asdata (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (325:325:325) (367:367:367))
+ (PORT datab (362:362:362) (458:458:458))
+ (PORT datad (259:259:259) (289:289:289))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (435:435:435) (424:424:424))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|cnt_bit\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (361:361:361) (444:444:444))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH dataa cout (552:552:552) (416:416:416))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (341:341:341) (423:423:423))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[4\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~8)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (341:341:341) (420:420:420))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~10)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (342:342:342) (422:422:422))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|cnt_wait\~11)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (279:279:279) (304:304:304))
+ (PORT datad (833:833:833) (788:788:788))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~12)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (422:422:422))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Add0\~16)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (340:340:340) (419:419:419))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datab cout (565:565:565) (421:421:421))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ (IOPATH cin combout (607:607:607) (577:577:577))
+ (IOPATH cin cout (73:73:73) (73:73:73))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[9\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|cnt_wait\[10\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1837:1837:1837) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5691:5691:5691) (5408:5408:5408))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~5)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (346:346:346) (436:436:436))
+ (PORT datab (343:343:343) (425:425:425))
+ (PORT datac (304:304:304) (388:388:388))
+ (PORT datad (304:304:304) (381:381:381))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~6)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (344:344:344) (434:434:434))
+ (PORT datab (342:342:342) (424:424:424))
+ (PORT datac (299:299:299) (383:383:383))
+ (PORT datad (303:303:303) (379:379:379))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|Equal0\~7)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (280:280:280) (312:312:312))
+ (PORT datab (1288:1288:1288) (1220:1220:1220))
+ (PORT datac (1102:1102:1102) (999:999:999))
+ (PORT datad (1098:1098:1098) (983:983:983))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|add_flag\~feeder)
+ (DELAY
+ (ABSOLUTE
+ (PORT datac (319:319:319) (381:381:381))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|add_flag)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (2328:2328:2328) (2322:2322:2322))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (6313:6313:6313) (6092:6092:6092))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[0\]\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (968:968:968) (969:969:969))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[1\]\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (968:968:968) (969:969:969))
+ (PORT datad (368:368:368) (496:496:496))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[2\]\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (416:416:416) (558:558:558))
+ (PORT datab (969:969:969) (970:970:970))
+ (PORT datad (363:363:363) (460:460:460))
+ (IOPATH dataa combout (420:420:420) (428:428:428))
+ (IOPATH datab combout (432:432:432) (433:433:433))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (416:416:416) (558:558:558))
+ (PORT datab (396:396:396) (508:508:508))
+ (PORT datac (926:926:926) (932:932:932))
+ (PORT datad (365:365:365) (462:462:462))
+ (IOPATH dataa combout (392:392:392) (398:398:398))
+ (IOPATH datab combout (393:393:393) (408:408:408))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|num\[3\]\~4)
+ (DELAY
+ (ABSOLUTE
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|num\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr1\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (415:415:415) (556:556:556))
+ (PORT datab (387:387:387) (504:504:504))
+ (PORT datac (351:351:351) (465:465:465))
+ (PORT datad (361:361:361) (457:457:457))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[5\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[7\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (418:418:418) (559:559:559))
+ (PORT datab (386:386:386) (504:504:504))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (368:368:368) (464:464:464))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[6\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (594:594:594) (631:631:631))
+ (PORT datab (571:571:571) (592:592:592))
+ (PORT datac (294:294:294) (371:371:371))
+ (PORT datad (574:574:574) (597:597:597))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (336:336:336) (419:419:419))
+ (PORT datab (633:633:633) (644:644:644))
+ (PORT datac (295:295:295) (373:373:373))
+ (PORT datad (239:239:239) (257:257:257))
+ (IOPATH dataa combout (421:421:421) (428:428:428))
+ (IOPATH datab combout (472:472:472) (473:473:473))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~2)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (364:364:364) (449:449:449))
+ (PORT datab (360:360:360) (456:456:456))
+ (PORT datac (318:318:318) (414:414:414))
+ (PORT datad (481:481:481) (449:449:449))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (457:457:457) (489:489:489))
+ (IOPATH datac combout (324:324:324) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr4\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (417:417:417) (559:559:559))
+ (PORT datab (386:386:386) (504:504:504))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (367:367:367) (463:463:463))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (455:455:455) (412:412:412))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[2\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr3\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (415:415:415) (555:555:555))
+ (PORT datab (387:387:387) (505:505:505))
+ (PORT datac (351:351:351) (465:465:465))
+ (PORT datad (359:359:359) (455:455:455))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[3\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr5\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (414:414:414) (555:555:555))
+ (PORT datab (387:387:387) (505:505:505))
+ (PORT datac (350:350:350) (465:465:465))
+ (PORT datad (358:358:358) (454:454:454))
+ (IOPATH dataa combout (461:461:461) (481:481:481))
+ (IOPATH datab combout (473:473:473) (487:487:487))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[1\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (595:595:595) (632:632:632))
+ (PORT datab (632:632:632) (643:643:643))
+ (PORT datac (296:296:296) (374:374:374))
+ (PORT datad (297:297:297) (368:368:368))
+ (IOPATH dataa combout (456:456:456) (486:486:486))
+ (IOPATH datab combout (455:455:455) (473:473:473))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE seg_static_inst\|WideOr6\~0)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (419:419:419) (561:561:561))
+ (PORT datab (386:386:386) (503:503:503))
+ (PORT datac (352:352:352) (467:467:467))
+ (PORT datad (370:370:370) (467:467:467))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE seg_static_inst\|seg\[0\])
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5952:5952:5952) (5689:5689:5689))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|Mux0\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (594:594:594) (631:631:631))
+ (PORT datab (335:335:335) (412:412:412))
+ (PORT datac (239:239:239) (265:265:265))
+ (PORT datad (296:296:296) (366:366:366))
+ (IOPATH dataa combout (471:471:471) (453:453:453))
+ (IOPATH datab combout (494:494:494) (496:496:496))
+ (IOPATH datac combout (327:327:327) (316:316:316))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~1)
+ (DELAY
+ (ABSOLUTE
+ (PORT datab (361:361:361) (456:456:456))
+ (PORT datac (320:320:320) (417:417:417))
+ (PORT datad (450:450:450) (428:428:428))
+ (IOPATH datab combout (407:407:407) (408:408:408))
+ (IOPATH datac combout (324:324:324) (315:315:315))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "cycloneive_lcell_comb")
+ (INSTANCE hc595_ctrl_inst\|ds\~3)
+ (DELAY
+ (ABSOLUTE
+ (PORT dataa (283:283:283) (315:315:315))
+ (PORT datab (277:277:277) (302:302:302))
+ (PORT datad (240:240:240) (258:258:258))
+ (IOPATH dataa combout (448:448:448) (472:472:472))
+ (IOPATH datab combout (454:454:454) (473:473:473))
+ (IOPATH datac combout (462:462:462) (482:482:482))
+ (IOPATH datad combout (177:177:177) (155:155:155))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "dffeas")
+ (INSTANCE hc595_ctrl_inst\|ds)
+ (DELAY
+ (ABSOLUTE
+ (PORT clk (1838:1838:1838) (1855:1855:1855))
+ (PORT d (99:99:99) (115:115:115))
+ (PORT clrn (5984:5984:5984) (5729:5729:5729))
+ (IOPATH (posedge clk) q (261:261:261) (261:261:261))
+ (IOPATH (negedge clrn) q (247:247:247) (247:247:247))
+ )
+ )
+ (TIMINGCHECK
+ (HOLD d (posedge clk) (212:212:212))
+ )
+ )
+)
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v
new file mode 100644
index 0000000..de9190d
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v
@@ -0,0 +1,99 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/11
+// Module Name : hc595_ctrl
+// Project Name : seg_595_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 595控制模块
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+module hc595_ctrl
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低有效
+ input wire [3:0] sel , //数码管位选信号
+ input wire [7:0] seg , //数码管段选信号
+
+ output reg stcp , //数据存储器时钟
+ output reg shcp , //移位寄存器时钟
+ output reg ds , //串行数据输入
+ output wire oe //使能信号,低有效
+);
+
+//********************************************************************//
+//****************** Parameter and Internal Signal *******************//
+//********************************************************************//
+//reg define
+reg [1:0] cnt_4 ; //分频计数器
+reg [3:0] cnt_bit ; //传输位数计数器
+
+//wire define
+wire [11:0] data ; //数码管信号寄存
+
+//********************************************************************//
+//***************************** Main Code ****************************//
+//********************************************************************//
+
+//将数码管信号寄存
+assign data = {seg[0],seg[1],seg[2],seg[3],seg[4],seg[5],seg[6],seg[7],sel};
+
+//将复位取反后赋值给其即可
+assign oe = ~sys_rst_n;
+
+//分频计数器:0~3循环计数
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_4 <= 2'd0;
+ else if(cnt_4 == 2'd3)
+ cnt_4 <= 2'd0;
+ else
+ cnt_4 <= cnt_4 + 1'b1;
+
+//cnt_bit:每输入一位数据加一
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_bit <= 4'd0;
+ else if(cnt_4 == 2'd3 && cnt_bit == 4'd11)
+ cnt_bit <= 4'd0;
+ else if(cnt_4 == 2'd3)
+ cnt_bit <= cnt_bit + 1'b1;
+ else
+ cnt_bit <= cnt_bit;
+
+//stcp:12个信号传输完成之后产生一个上升沿
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ stcp <= 1'b0;
+ else if(cnt_bit == 4'd11 && cnt_4 == 2'd3)
+ stcp <= 1'b1;
+ else
+ stcp <= 1'b0;
+
+//shcp:产生四分频移位时钟
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ shcp <= 1'b0;
+ else if(cnt_4 >= 4'd2)
+ shcp <= 1'b1;
+ else
+ shcp <= 1'b0;
+
+//ds:将寄存器里存储的数码管信号输入即
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ ds <= 1'b0;
+ else if(cnt_4 == 2'd0)
+ ds <= data[cnt_bit];
+ else
+ ds <= ds;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v.bak b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v.bak
new file mode 100644
index 0000000..cd9b0e1
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/hc595_ctrl.v.bak
@@ -0,0 +1,99 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/11
+// Module Name : hc595_ctrl
+// Project Name : seg_595_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 595控制模块
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+module hc595_ctrl
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低有效
+ input wire [5:0] sel , //数码管位选信号
+ input wire [7:0] seg , //数码管段选信号
+
+ output reg stcp , //数据存储器时钟
+ output reg shcp , //移位寄存器时钟
+ output reg ds , //串行数据输入
+ output wire oe //使能信号,低有效
+);
+
+//********************************************************************//
+//****************** Parameter and Internal Signal *******************//
+//********************************************************************//
+//reg define
+reg [1:0] cnt_4 ; //分频计数器
+reg [3:0] cnt_bit ; //传输位数计数器
+
+//wire define
+wire [13:0] data ; //数码管信号寄存
+
+//********************************************************************//
+//***************************** Main Code ****************************//
+//********************************************************************//
+
+//将数码管信号寄存
+assign data = {seg[0],seg[1],seg[2],seg[3],seg[4],seg[5],seg[6],seg[7],sel};
+
+//将复位取反后赋值给其即可
+assign oe = ~sys_rst_n;
+
+//分频计数器:0~3循环计数
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_4 <= 2'd0;
+ else if(cnt_4 == 2'd3)
+ cnt_4 <= 2'd0;
+ else
+ cnt_4 <= cnt_4 + 1'b1;
+
+//cnt_bit:每输入一位数据加一
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_bit <= 4'd0;
+ else if(cnt_4 == 2'd3 && cnt_bit == 4'd13)
+ cnt_bit <= 4'd0;
+ else if(cnt_4 == 2'd3)
+ cnt_bit <= cnt_bit + 1'b1;
+ else
+ cnt_bit <= cnt_bit;
+
+//stcp:14个信号传输完成之后产生一个上升沿
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ stcp <= 1'b0;
+ else if(cnt_bit == 4'd13 && cnt_4 == 2'd3)
+ stcp <= 1'b1;
+ else
+ stcp <= 1'b0;
+
+//shcp:产生四分频移位时钟
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ shcp <= 1'b0;
+ else if(cnt_4 >= 4'd2)
+ shcp <= 1'b1;
+ else
+ shcp <= 1'b0;
+
+//ds:将寄存器里存储的数码管信号输入即
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ ds <= 1'b0;
+ else if(cnt_4 == 2'd0)
+ ds <= data[cnt_bit];
+ else
+ ds <= ds;
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v
new file mode 100644
index 0000000..04365a7
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v
@@ -0,0 +1,65 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/11
+// Module Name : seg_595_static
+// Project Name : seg_595_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 静态数码管顶层模块
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+
+module seg_595_static
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低有效
+
+ output wire stcp , //输出数据存储寄时钟
+ output wire shcp , //移位寄存器的时钟输入
+ output wire ds , //串行数据输入
+ output wire oe //输出使能信号
+);
+
+//********************************************************************//
+//******************** Parameter And Internal Signal *****************//
+//********************************************************************//
+//wire define
+wire [3:0] sel;
+wire [7:0] seg;
+
+//********************************************************************//
+//*************************** Instantiation **************************//
+//********************************************************************//
+//---------- seg_static_inst ----------
+seg_static seg_static_inst
+(
+ .sys_clk (sys_clk ), //系统时钟,频率50MHz
+ .sys_rst_n (sys_rst_n ), //复位信号,低电平有效
+
+ .sel (sel ), //数码管位选信号
+ .seg (seg ) //数码管段选信号
+);
+
+//---------- hc595_ctrl_inst ----------
+hc595_ctrl hc595_ctrl_inst
+(
+ .sys_clk (sys_clk ), //系统时钟,频率50MHz
+ .sys_rst_n (sys_rst_n), //复位信号,低有效
+ .sel (sel ), //数码管位选信号
+ .seg (seg ), //数码管段选信号
+
+ .stcp (stcp ), //输出数据存储寄时钟
+ .shcp (shcp ), //移位寄存器的时钟输入
+ .ds (ds ), //串行数据输入
+ .oe (oe ) //输出使能信号
+);
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v.bak b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v.bak
new file mode 100644
index 0000000..6d07f57
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_595_static.v.bak
@@ -0,0 +1,65 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/11
+// Module Name : seg_595_static
+// Project Name : seg_595_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 静态数码管顶层模块
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+
+module seg_595_static
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低有效
+
+ output wire stcp , //输出数据存储寄时钟
+ output wire shcp , //移位寄存器的时钟输入
+ output wire ds , //串行数据输入
+ output wire oe //输出使能信号
+);
+
+//********************************************************************//
+//******************** Parameter And Internal Signal *****************//
+//********************************************************************//
+//wire define
+wire [5:0] sel;
+wire [7:0] seg;
+
+//********************************************************************//
+//*************************** Instantiation **************************//
+//********************************************************************//
+//---------- seg_static_inst ----------
+seg_static seg_static_inst
+(
+ .sys_clk (sys_clk ), //系统时钟,频率50MHz
+ .sys_rst_n (sys_rst_n ), //复位信号,低电平有效
+
+ .sel (sel ), //数码管位选信号
+ .seg (seg ) //数码管段选信号
+);
+
+//---------- hc595_ctrl_inst ----------
+hc595_ctrl hc595_ctrl_inst
+(
+ .sys_clk (sys_clk ), //系统时钟,频率50MHz
+ .sys_rst_n (sys_rst_n), //复位信号,低有效
+ .sel (sel ), //数码管位选信号
+ .seg (seg ), //数码管段选信号
+
+ .stcp (stcp ), //输出数据存储寄时钟
+ .shcp (shcp ), //移位寄存器的时钟输入
+ .ds (ds ), //串行数据输入
+ .oe (oe ) //输出使能信号
+);
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v
new file mode 100644
index 0000000..062e6ac
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v
@@ -0,0 +1,123 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/08
+// Module Name : seg7_static
+// Project Name : seg7_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 静态数码管显示
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+
+module seg_static
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低电平有效
+
+ output reg [3:0] sel , //数码管位选信号
+ output reg [7:0] seg //数码管段选信号
+);
+
+//********************************************************************//
+//****************** Parameter and Internal Signal *******************//
+//********************************************************************//
+//parameter define
+parameter CNT_WAIT_MAX = 25'd24_999_999; //计数器最大值(0.5s)
+//十六进制数显示编码
+parameter SEG_0 = 8'b1100_0000, SEG_1 = 8'b1111_1001,
+ SEG_2 = 8'b1010_0100, SEG_3 = 8'b1011_0000,
+ SEG_4 = 8'b1001_1001, SEG_5 = 8'b1001_0010,
+ SEG_6 = 8'b1000_0010, SEG_7 = 8'b1111_1000,
+ SEG_8 = 8'b1000_0000, SEG_9 = 8'b1001_0000,
+ SEG_A = 8'b1000_1000, SEG_B = 8'b1000_0011,
+ SEG_C = 8'b1100_0110, SEG_D = 8'b1010_0001,
+ SEG_E = 8'b1000_0110, SEG_F = 8'b1000_1110;
+
+/*
+parameter SEG_0 = 8'b1100_0000, SEG_1 = 8'b1111_1001,
+ SEG_2 = 8'b1010_0100, SEG_3 = 8'b1011_0000,
+ SEG_4 = 8'b1001_1001, SEG_5 = 8'b1001_0010,
+ SEG_6 = 8'b1000_0010, SEG_7 = 8'b1111_1000,
+ SEG_8 = 8'b1000_0000, SEG_9 = 8'b1001_0000,
+ SEG_A = 8'b1000_1000, SEG_B = 8'b1000_0011,
+ SEG_C = 8'b1100_0110, SEG_D = 8'b1010_0001,
+ SEG_E = 8'b1000_0110, SEG_F = 8'b1000_1110;
+
+ */
+parameter IDLE = 8'b1111_1111; //不显示状态
+
+//reg define
+reg add_flag ; //数码管数值+1标志信号
+reg [24:0] cnt_wait ; //时钟分频计数器
+reg [3:0] num ; //数码管显示的十六进制数
+
+//********************************************************************//
+//*************************** Main Code ******************************//
+//********************************************************************//
+//cnt_wait:0.5秒计数
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_wait <= 25'd0;
+ else if(cnt_wait == CNT_WAIT_MAX)
+ cnt_wait <= 25'd0;
+ else
+ cnt_wait <= cnt_wait + 1'b1;
+
+//add_flag:0.5s拉高一个标志信号
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ add_flag <= 1'b0;
+ else if(cnt_wait == CNT_WAIT_MAX)
+ add_flag <= 1'b1;
+ else
+ add_flag <= 1'b0;
+
+//num:从 4'h0 加到 4'hf 循环
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ num <= 4'd0;
+ else if(add_flag == 1'b1)
+ num <= num + 1'b1;
+ else
+ num <= num;
+
+//sel:选中四个数码管
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ sel <= 4'b1111;
+ else
+ sel <= 4'b0000;
+
+//给要显示的值编码
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ seg <= IDLE;
+ else case(num)
+ 4'd0: seg <= ~SEG_0;
+ 4'd1: seg <= ~SEG_1;
+ 4'd2: seg <= ~SEG_2;
+ 4'd3: seg <= ~SEG_3;
+ 4'd4: seg <= ~SEG_4;
+ 4'd5: seg <= ~SEG_5;
+ 4'd6: seg <= ~SEG_6;
+ 4'd7: seg <= ~SEG_7;
+ 4'd8: seg <= ~SEG_8;
+ 4'd9: seg <= ~SEG_9;
+ 4'd10: seg <= ~SEG_A;
+ 4'd11: seg <= ~SEG_B;
+ 4'd12: seg <= ~SEG_C;
+ 4'd13: seg <= ~SEG_D;
+ 4'd14: seg <= ~SEG_E;
+ 4'd15: seg <= ~SEG_F;
+ default:seg <= IDLE ; //闲置状态,不显示
+ endcase
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v.bak b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v.bak
new file mode 100644
index 0000000..3c1e6fc
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/rtl/seg_static.v.bak
@@ -0,0 +1,111 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/08
+// Module Name : seg7_static
+// Project Name : seg7_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : 静态数码管显示
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+
+module seg_static
+(
+ input wire sys_clk , //系统时钟,频率50MHz
+ input wire sys_rst_n , //复位信号,低电平有效
+
+ output reg [5:0] sel , //数码管位选信号
+ output reg [7:0] seg //数码管段选信号
+);
+
+//********************************************************************//
+//****************** Parameter and Internal Signal *******************//
+//********************************************************************//
+//parameter define
+parameter CNT_WAIT_MAX = 25'd24_999_999; //计数器最大值(0.5s)
+//十六进制数显示编码
+parameter SEG_0 = 8'b1100_0000, SEG_1 = 8'b1111_1001,
+ SEG_2 = 8'b1010_0100, SEG_3 = 8'b1011_0000,
+ SEG_4 = 8'b1001_1001, SEG_5 = 8'b1001_0010,
+ SEG_6 = 8'b1000_0010, SEG_7 = 8'b1111_1000,
+ SEG_8 = 8'b1000_0000, SEG_9 = 8'b1001_0000,
+ SEG_A = 8'b1000_1000, SEG_B = 8'b1000_0011,
+ SEG_C = 8'b1100_0110, SEG_D = 8'b1010_0001,
+ SEG_E = 8'b1000_0110, SEG_F = 8'b1000_1110;
+parameter IDLE = 8'b1111_1111; //不显示状态
+
+//reg define
+reg add_flag ; //数码管数值+1标志信号
+reg [24:0] cnt_wait ; //时钟分频计数器
+reg [3:0] num ; //数码管显示的十六进制数
+
+//********************************************************************//
+//*************************** Main Code ******************************//
+//********************************************************************//
+//cnt_wait:0.5秒计数
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ cnt_wait <= 25'd0;
+ else if(cnt_wait == CNT_WAIT_MAX)
+ cnt_wait <= 25'd0;
+ else
+ cnt_wait <= cnt_wait + 1'b1;
+
+//add_flag:0.5s拉高一个标志信号
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ add_flag <= 1'b0;
+ else if(cnt_wait == CNT_WAIT_MAX)
+ add_flag <= 1'b1;
+ else
+ add_flag <= 1'b0;
+
+//num:从 4'h0 加到 4'hf 循环
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ num <= 4'd0;
+ else if(add_flag == 1'b1)
+ num <= num + 1'b1;
+ else
+ num <= num;
+
+//sel:选中六个数码管
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ sel <= 6'b000000;
+ else
+ sel <= 6'b111111;
+
+//给要显示的值编码
+always@(posedge sys_clk or negedge sys_rst_n)
+ if(sys_rst_n == 1'b0)
+ seg <= IDLE;
+ else case(num)
+ 4'd0: seg <= SEG_0;
+ 4'd1: seg <= SEG_1;
+ 4'd2: seg <= SEG_2;
+ 4'd3: seg <= SEG_3;
+ 4'd4: seg <= SEG_4;
+ 4'd5: seg <= SEG_5;
+ 4'd6: seg <= SEG_6;
+ 4'd7: seg <= SEG_7;
+ 4'd8: seg <= SEG_8;
+ 4'd9: seg <= SEG_9;
+ 4'd10: seg <= SEG_A;
+ 4'd11: seg <= SEG_B;
+ 4'd12: seg <= SEG_C;
+ 4'd13: seg <= SEG_D;
+ 4'd14: seg <= SEG_E;
+ 4'd15: seg <= SEG_F;
+ default:seg <= IDLE ; //闲置状态,不显示
+ endcase
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/smg595_static/sim/tb_seg_595_static.v b/smh-ac415-fpga/examples/03_smg595/smg595_static/sim/tb_seg_595_static.v
new file mode 100644
index 0000000..4fd8ce3
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/smg595_static/sim/tb_seg_595_static.v
@@ -0,0 +1,69 @@
+`timescale 1ns/1ns
+////////////////////////////////////////////////////////////////////////
+// Author : EmbedFire
+// Create Date : 2019/07/08
+// Module Name : tb_seg7_static
+// Project Name : seg7_static
+// Target Devices: Altera EP4CE10F17C8N
+// Tool Versions : Quartus 13.0
+// Description : seg_led_static仿真文件
+//
+// Revision : V1.0
+// Additional Comments:
+//
+// 实验平台: 野火_征途Pro_FPGA开发板
+// 公司 : http://www.embedfire.com
+// 论坛 : http://www.firebbs.cn
+// 淘宝 : https://fire-stm32.taobao.com
+////////////////////////////////////////////////////////////////////////
+
+module tb_seg_595_static();
+
+//********************************************************************//
+//****************** Parameter and Internal Signal *******************//
+//********************************************************************//
+//wire define
+wire stcp ; //输出数据存储寄时钟
+wire shcp ; //移位寄存器的时钟输入
+wire ds ; //串行数据输入
+wire oe ; //输出使能信号
+
+//reg define
+reg sys_clk ;
+reg sys_rst_n ;
+
+//********************************************************************//
+//***************************** Main Code ****************************//
+//********************************************************************//
+//对sys_clk,sys_rst_n赋初始值
+initial
+ begin
+ sys_clk = 1'b1;
+ sys_rst_n <= 1'b0;
+ #100
+ sys_rst_n <= 1'b1;
+ end
+
+//clk:产生时钟
+always #10 sys_clk <= ~sys_clk;
+
+//重新定义参数值,缩短仿真时间
+defparam seg_595_static_inst.seg_static_inst.CNT_WAIT_MAX = 10;
+
+//********************************************************************//
+//*************************** Instantiation **************************//
+//********************************************************************//
+
+//-------------seg_595_static_inst-------------
+seg_595_static seg_595_static_inst
+(
+ .sys_clk (sys_clk ), //系统时钟,频率50MHz
+ .sys_rst_n (sys_rst_n ), //复位信号,低电平有效
+
+ .stcp (stcp ), //输出数据存储寄时钟
+ .shcp (shcp ), //移位寄存器的时钟输入
+ .ds (ds ), //串行数据输入
+ .oe (oe ) //输出使能信号
+);
+
+endmodule
diff --git a/smh-ac415-fpga/examples/03_smg595/实验现象.txt b/smh-ac415-fpga/examples/03_smg595/实验现象.txt
new file mode 100644
index 0000000..b9581e2
--- /dev/null
+++ b/smh-ac415-fpga/examples/03_smg595/实验现象.txt
@@ -0,0 +1,2 @@
+现象:数码管依次显示0-9ABCDEF。
+测试:可以测试数码管是否正常。 \ No newline at end of file