diff options
Diffstat (limited to 'pcbs/keyboard-interface/keyboard-interface.kicad_pcb')
| -rw-r--r-- | pcbs/keyboard-interface/keyboard-interface.kicad_pcb | 12317 |
1 files changed, 12317 insertions, 0 deletions
diff --git a/pcbs/keyboard-interface/keyboard-interface.kicad_pcb b/pcbs/keyboard-interface/keyboard-interface.kicad_pcb new file mode 100644 index 0000000..a7395a2 --- /dev/null +++ b/pcbs/keyboard-interface/keyboard-interface.kicad_pcb @@ -0,0 +1,12317 @@ +(kicad_pcb + (version 20240108) + (generator "pcbnew") + (generator_version "8.0") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + (setup + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (plot_on_all_layers_selection 0x0000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (viasonmask no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plotreference yes) + (plotvalue yes) + (plotfptext yes) + (plotinvisibletext no) + (sketchpadsonfab no) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "+5V") + (net 2 "GND") + (net 3 "+3.3V") + (net 4 "/KBD_RX") + (net 5 "/KBD_TX") + (net 6 "/SCOPE_RX") + (net 7 "/SCOPE_TX") + (net 8 "Net-(J3-Pin_18)") + (net 9 "Net-(J3-Pin_13)") + (net 10 "Net-(J3-Pin_14)") + (net 11 "/U1_RX") + (net 12 "Net-(J3-Pin_20)") + (net 13 "/U0_RX") + (net 14 "+12V") + (net 15 "Net-(J3-Pin_16)") + (net 16 "unconnected-(J3-Pin_10-Pad10)") + (net 17 "Net-(J3-Pin_19)") + (net 18 "Net-(J3-Pin_17)") + (net 19 "Net-(J3-Pin_15)") + (net 20 "/U0_TX") + (net 21 "/U1_TX") + (net 22 "unconnected-(J4-Pin_10-Pad10)") + (net 23 "unconnected-(U1-NC-Pad6)") + (net 24 "unconnected-(U1-NC-Pad9)") + (net 25 "Net-(J3-Pin_9)") + (net 26 "Net-(J3-Pin_11)") + (footprint "feet:TE_104549" + (layer "F.Cu") + (uuid "095ae7d2-e00f-42a6-ac30-5c7d53fe481a") + (at 99.71 61.41) + (descr "TE 10 pin AMP MODU series 50 header") + (property "Reference" "J2" + (at 0 -23.5 0) + (layer "F.SilkS") + (hide yes) + (uuid "0ba3aa1b-9eb4-4f54-bb9e-b3024bb208be") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "~" + (at 0 23.5 0) + (layer "F.Fab") + (hide yes) + (uuid "0fd61300-9ab3-4853-956d-84c281e51cd2") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Footprint" "feet:TE_104549" + (at 0 0 180) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "431f8212-92c9-4d12-adbc-93ee4b72d1c7") + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 180) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "7c6a6a6a-bf31-4d03-9abf-ff884800d987") + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "Generic connectable mounting pin connector, double row, 02x05, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)" + (at 0 0 180) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "8d3605c2-ba05-4553-93ba-8c9ad3448d14") + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (path "/b2d38004-f0bc-4f96-ad2c-cba8bcc33c18") + (solder_mask_margin 0.05) + (attr smd) + (fp_line + (start -4.825 -3.605) + (end -4.825 3.605) + (stroke + (width 0.12) + (type default) + ) + (layer "F.SilkS") + (uuid "0993ae6f-61c0-4684-8e21-6fc273da747b") + ) + (fp_line + (start -4.825 -1.27) + (end -3.555 -1.27) + (stroke + (width 0.12) + (type default) + ) + (layer "F.SilkS") + (uuid "8ac1bd6f-de09-48c3-8210-4b5f2b83bec4") + ) + (fp_line + (start -3.555 -2.335) + (end -3.555 -1.27) + (stroke + (width 0.12) + (type default) + ) + (layer "F.SilkS") + (uuid "ce655f34-4228-4ec9-b70b-799b784d48c7") + ) + (fp_line + (start -3.555 1.27) + (end -4.825 1.27) + (stroke + (width 0.12) + (type default) + ) + (layer "F.SilkS") + (uuid "5e30bcf5-52c5-4e15-9d92-ca9043deec60") + ) + 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(Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags "capacitor handsolder") + (property "Reference" "C1" + (at 1.4375 1.8 180) + (layer "F.SilkS") + (uuid "72d559c7-51e2-49e6-8cef-9bc0df7fbaa1") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "C" + (at 0 1.68 360) + (layer "F.Fab") + (uuid "b6926fc4-36cf-4165-af5f-5d8acaf9a54f") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "19e20d6d-a7e7-4d26-8e6b-252b8a4651d5") + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid 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\ No newline at end of file |