diff options
-rw-r--r-- | spartan6/hp_lcd_driver/hp_lcd_driver.vhdl | 10 | ||||
-rw-r--r-- | spartan6/hp_lcd_driver/vram_spartan6.vhdl | 64 |
2 files changed, 37 insertions, 37 deletions
diff --git a/spartan6/hp_lcd_driver/hp_lcd_driver.vhdl b/spartan6/hp_lcd_driver/hp_lcd_driver.vhdl index 697e90a..4d82d86 100644 --- a/spartan6/hp_lcd_driver/hp_lcd_driver.vhdl +++ b/spartan6/hp_lcd_driver/hp_lcd_driver.vhdl @@ -91,15 +91,15 @@ begin vram0 : entity work.vram - generic map ( - video_width => video_width, - addr_width => addr_width - ) + generic map ( + video_width => video_width, + addr_width => addr_width + ) port map ( wr_clk => i_clk, wr_en => wr_en, wr_addr => wr_addr, - wr_data => wr_data, + wr_data => wr_data, rd_clk => o_clk, rd_addr => rd_addr, rd_data => rd_data diff --git a/spartan6/hp_lcd_driver/vram_spartan6.vhdl b/spartan6/hp_lcd_driver/vram_spartan6.vhdl index 05a8eae..801cc0a 100644 --- a/spartan6/hp_lcd_driver/vram_spartan6.vhdl +++ b/spartan6/hp_lcd_driver/vram_spartan6.vhdl @@ -1,36 +1,36 @@ -LIBRARY ieee; -USE ieee.std_logic_1164.ALL; +library ieee; +use ieee.std_logic_1164.all; -ENTITY vram IS - generic ( - addr_width:natural :=17; - video_width:natural :=2 - ); - PORT ( - wr_clk: in std_logic; - wr_en : in std_logic; - wr_addr : in STD_LOGIC_VECTOR(addr_width-1 downto 0); - wr_data : in std_logic_vector(video_width-1 downto 0); - rd_clk : in std_logic; - rd_addr : in STD_LOGIC_VECTOR(addr_width-1 downto 0); - rd_data : out std_logic_vector(video_width-1 downto 0) - ); -END vram; +entity vram is + generic ( + addr_width : natural := 17; + video_width : natural := 2 + ); + port ( + wr_clk : in std_logic; + wr_en : in std_logic; + wr_addr : in std_logic_vector(addr_width-1 downto 0); + wr_data : in std_logic_vector(video_width-1 downto 0); + rd_clk : in std_logic; + rd_addr : in std_logic_vector(addr_width-1 downto 0); + rd_data : out std_logic_vector(video_width-1 downto 0) + ); +end vram; -ARCHITECTURE beh OF vram IS -signal wr_en_v : std_logic_vector(0 downto 0); -BEGIN +architecture beh of vram is + signal wr_en_v : std_logic_vector(0 downto 0); +begin -wr_en_v(0)<=wr_en; + wr_en_v(0) <= wr_en; -vram_impl0: entity work.vram_spartan6_impl - port map ( - clka => wr_clk, - wea => wr_en_v, - addra => wr_addr, - dina => wr_data, - clkb => rd_clk, - doutb => rd_data, - addrb => rd_addr - ); -END beh; + vram_impl0 : entity work.vram_spartan6_impl + port map ( + clka => wr_clk, + wea => wr_en_v, + addra => wr_addr, + dina => wr_data, + clkb => rd_clk, + doutb => rd_data, + addrb => rd_addr + ); +end beh; |