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-rw-r--r--fpga/ebaz4205/linux-6.16.4-pq/master/jmm-fb35
-rw-r--r--fpga/ebaz4205/src/uEnv.txt1
-rw-r--r--fpga/hp_lcd_driver/fb_hw.vhdl41
-rw-r--r--fpga/hp_lcd_driver/zynq7.mk1
-rw-r--r--fpga/hp_lcd_driver/zynq7_hp_lcd_driver.tcl2
-rw-r--r--fpga/hp_lcd_driver/zynq7_ip/blk_mem_gen_1.tcl14
-rw-r--r--fpga/hp_lcd_driver/zynq7_wrapper.vhdl9
7 files changed, 60 insertions, 43 deletions
diff --git a/fpga/ebaz4205/linux-6.16.4-pq/master/jmm-fb b/fpga/ebaz4205/linux-6.16.4-pq/master/jmm-fb
index f63b98b..4ea02ff 100644
--- a/fpga/ebaz4205/linux-6.16.4-pq/master/jmm-fb
+++ b/fpga/ebaz4205/linux-6.16.4-pq/master/jmm-fb
@@ -38,10 +38,10 @@ index cef74a483..7f3eadf0e 100644
obj-$(CONFIG_NSM) += nsm.o
diff --git a/drivers/misc/jmm_fb.c b/drivers/misc/jmm_fb.c
new file mode 100644
-index 000000000..83ad11d83
+index 000000000..599d795d8
--- /dev/null
+++ b/drivers/misc/jmm_fb.c
-@@ -0,0 +1,356 @@
+@@ -0,0 +1,347 @@
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/kernel.h>
@@ -71,16 +71,15 @@ index 000000000..83ad11d83
+
+static const struct fb_var_screeninfo jmm_fb_var = {
+ .xres = 384,
-+ .yres = 600,
++ .yres = 640,
+ .xres_virtual = 384,
-+ .yres_virtual = 600,
++ .yres_virtual = 640,
+ .bits_per_pixel = 4,
+ .red = {0, 4, 0},
+ .green = {0, 4, 0},
+ .blue = {0, 4, 0},
+ .transp = {0, 4, 0},
-+ .grayscale = 1,
-+ .rotate = FB_ROTATE_CW,
++// .rotate = FB_ROTATE_CW,
+ .height = -1,
+ .width = -1,
+};
@@ -92,7 +91,7 @@ index 000000000..83ad11d83
+ .xpanstep = 0,
+ .ypanstep = 0,
+ .line_length = 192,
-+ .accel = FB_ACCEL_NONE
++ .accel = FB_ACCEL_NONE,
+};
+
+
@@ -276,6 +275,7 @@ index 000000000..83ad11d83
+ jmm_fb.info->fix.smem_start = res->start;
+ jmm_fb.info->fix.smem_len = jmm_fb.fb_len;
+ jmm_fb.info->fix.type = FB_TYPE_PACKED_PIXELS;
++ jmm_fb.info->fbcon_rotate_hint=FB_ROTATE_CW;
+
+ jmm_fb.info->flags = 0;
+
@@ -290,23 +290,14 @@ index 000000000..83ad11d83
+ jmm_fb.info->cmap.start = 0;
+ jmm_fb.info->cmap.len = 4;
+
-+ for (i=0;i<0x8;++i) {
-+ jmm_fb.info->cmap.red[i] = (i &4) ? 0xaaaa:0x0;
-+ jmm_fb.info->cmap.green[i] = (i &2) ? 0xaaaa:0x0;
-+ jmm_fb.info->cmap.blue[i] = (i &1) ? 0xaaaa:0x0;
++ for (i=0;i<0x10;++i) {
++ jmm_fb.info->cmap.red[i] = (i &4) ? 0xffff:0x0;
++ jmm_fb.info->cmap.green[i] = (i &2) ? 0xffff:0x0;
++ jmm_fb.info->cmap.blue[i] = (i &1) ? 0xffff:0x0;
+ jmm_fb.info->cmap.transp[i] = 0;
+ }
-+
-+ for (;i<0x10;++i) {
-+ jmm_fb.info->cmap.red[i] = (i &4) ? 0xffff:0x5555;
-+ jmm_fb.info->cmap.green[i] = (i &2) ? 0xffff:0x5555;
-+ jmm_fb.info->cmap.blue[i] = (i &1) ? 0xffff:0x5555;
-+ jmm_fb.info->cmap.transp[i] = 0;
-+ }
-+
-+
-+ jmm_fb.info->cmap.green[6] = 0x5555; // Brown
-+ jmm_fb.info->cmap.transp[i] = 0xffff;
++ jmm_fb.info->cmap.transp[0] = 0xffff;
++ jmm_fb.info->cmap.transp[8] = 0xffff;
+
+ if (register_framebuffer (jmm_fb.info) < 0) {
+ printk (KERN_ERR "jmm_fb register framebuffer didn't\n");
diff --git a/fpga/ebaz4205/src/uEnv.txt b/fpga/ebaz4205/src/uEnv.txt
index 0be6a1b..d881b54 100644
--- a/fpga/ebaz4205/src/uEnv.txt
+++ b/fpga/ebaz4205/src/uEnv.txt
@@ -1,3 +1,4 @@
+ethaddr=00:01:02:03:04:05
machine_name=ebaz4205-zynq7
kernel_image=uImage
loadkernel=load mmc 0 ${kernel_load_address} ${kernel_image}
diff --git a/fpga/hp_lcd_driver/fb_hw.vhdl b/fpga/hp_lcd_driver/fb_hw.vhdl
index 5f2df26..f4adbc9 100644
--- a/fpga/hp_lcd_driver/fb_hw.vhdl
+++ b/fpga/hp_lcd_driver/fb_hw.vhdl
@@ -51,10 +51,9 @@ entity fb_hw is
overlay_gate : out std_logic;
overlay_r : out std_logic_vector(7 downto 0);
overlay_g : out std_logic_vector(7 downto 0);
- overlay_b : out std_logic_vector(7 downto 0)
-
-
-
+ overlay_b : out std_logic_vector(7 downto 0);
+ overlay_on : in std_logic;
+ overlay_off : in std_logic
);
end fb_hw;
architecture Behavioural of fb_hw is
@@ -62,16 +61,16 @@ architecture Behavioural of fb_hw is
type t_palette is array (0 to 15) of std_logic_vector(7 downto 0);
constant r_lut : t_palette := (
- x"00", x"00", x"00", x"00", x"AA", x"AA", x"AA", x"AA",
- x"55", x"55", x"55", x"55", x"FF", x"FF", x"FF", x"FF"
+ x"00", x"00", x"00", x"00", x"FF", x"FF", x"FF", x"FF",
+ x"00", x"00", x"00", x"00", x"FF", x"FF", x"FF", x"FF"
);
constant g_lut : t_palette := (
- x"00", x"00", x"AA", x"AA", x"00", x"00", x"55", x"AA",
- x"55", x"55", x"FF", x"FF", x"55", x"55", x"FF", x"FF"
+ x"00", x"00", x"FF", x"FF", x"00", x"00", x"FF", x"FF",
+ x"00", x"00", x"FF", x"FF", x"00", x"00", x"FF", x"FF"
);
constant b_lut : t_palette := (
- x"00", x"AA", x"00", x"AA", x"00", x"AA", x"00", x"AA",
- x"55", x"FF", x"55", x"FF", x"55", x"FF", x"55", x"FF"
+ x"00", x"FF", x"00", x"FF", x"00", x"FF", x"00", x"FF",
+ x"00", x"FF", x"00", x"FF", x"00", x"FF", x"00", x"FF"
);
@@ -92,7 +91,22 @@ architecture Behavioural of fb_hw is
begin
- fb_ram0 : entity work.blk_mem_gen_1
+-- fb_ram0 : entity work.blk_mem_gen_1
+-- port map (
+-- clka => fb_ps_clk,
+-- ena => fb_ps_en,
+-- wea => fb_ps_we,
+-- addra => fb_ps_addr (16 downto 2),
+-- dina => fb_ps_wrdata,
+-- douta => fb_ps_rddata,
+-- clkb => overlay_clk,
+-- web => "0000",
+-- addrb => fb_pl_addr,
+-- dinb => x"00000000",
+-- doutb => fb_pl_rddata
+-- );
+
+ fb_ram0 : entity work.fb_ram
port map (
clka => fb_ps_clk,
ena => fb_ps_en,
@@ -121,7 +135,10 @@ begin
overlay_data <= to_integer(unsigned(fb_pl_rddata(overlay_demux+3 downto overlay_demux)));
- overlay_gate <= '0' when overlay_data = 0 else '1';
+ overlay_gate <= '0' when overlay_off='1' else
+ '1' when overlay_on='1' else
+ '0' when overlay_data = 0 else '1';
+
overlay_r <= r_lut(overlay_data);
overlay_g <= g_lut(overlay_data);
overlay_b <= b_lut(overlay_data);
diff --git a/fpga/hp_lcd_driver/zynq7.mk b/fpga/hp_lcd_driver/zynq7.mk
index cbe9443..959e723 100644
--- a/fpga/hp_lcd_driver/zynq7.mk
+++ b/fpga/hp_lcd_driver/zynq7.mk
@@ -43,6 +43,7 @@ SRCS= ${IP} \
vnc_hw.vhdl \
vnc_serializer.vhdl \
fb_hw.vhdl \
+ fb_ram.vhdl \
kbd_uarts.vhdl
diff --git a/fpga/hp_lcd_driver/zynq7_hp_lcd_driver.tcl b/fpga/hp_lcd_driver/zynq7_hp_lcd_driver.tcl
index babb0a7..a704cfb 100644
--- a/fpga/hp_lcd_driver/zynq7_hp_lcd_driver.tcl
+++ b/fpga/hp_lcd_driver/zynq7_hp_lcd_driver.tcl
@@ -20,7 +20,7 @@ if {[llength $files] != 0} {
#read_verilog [ glob ../source/*.v ]
#read_vhdl -vhdl2008 -library work [ glob ../source/*.vhdl ]
-read_vhdl -vhdl2008 -library work { ../zynq7_wrapper.vhdl ../fifo_to_axi.vhdl ../clkgen_artix7.vhdl ../debounce.vhdl ../delay.vhdl ../edge_det.vhdl ../common.vhdl ../input_formatter.vhdl ../input_stage.vhdl ../output_analog.vhdl ../output_formatter.vhdl ../output_stage.vhdl ../synchronizer.vhdl ../tmds_encoder.vhdl ../tmds_encode.vhdl ../tmds_output_artix7.vhdl ../tmds_phy_artix7.vhdl ../vram_artix7.vhdl ../vnc_hw.vhdl ../vnc_serializer.vhdl ../fb_hw.vhdl ../kbd_uarts.vhdl }
+read_vhdl -vhdl2008 -library work { ../zynq7_wrapper.vhdl ../fifo_to_axi.vhdl ../clkgen_artix7.vhdl ../debounce.vhdl ../delay.vhdl ../edge_det.vhdl ../common.vhdl ../input_formatter.vhdl ../input_stage.vhdl ../output_analog.vhdl ../output_formatter.vhdl ../output_stage.vhdl ../synchronizer.vhdl ../tmds_encoder.vhdl ../tmds_encode.vhdl ../tmds_output_artix7.vhdl ../tmds_phy_artix7.vhdl ../vram_artix7.vhdl ../vnc_hw.vhdl ../vnc_serializer.vhdl ../fb_hw.vhdl ../fb_ram.vhdl ../kbd_uarts.vhdl }
set generics {}
append generics { } "video_width=$video_width"
diff --git a/fpga/hp_lcd_driver/zynq7_ip/blk_mem_gen_1.tcl b/fpga/hp_lcd_driver/zynq7_ip/blk_mem_gen_1.tcl
index 818d6fc..aefd1f9 100644
--- a/fpga/hp_lcd_driver/zynq7_ip/blk_mem_gen_1.tcl
+++ b/fpga/hp_lcd_driver/zynq7_ip/blk_mem_gen_1.tcl
@@ -10,14 +10,14 @@ create_ip -name blk_mem_gen -vendor xilinx.com -library ip -version 8.4 -module_
set_property -dict [list \
CONFIG.Memory_Type {True_Dual_Port_RAM} \
- CONFIG.Use_Byte_Write_Enable {true} \
- CONFIG.Byte_Size {8} \
- CONFIG.Write_Width_A {32} \
- CONFIG.Write_Depth_A {28800} \
- CONFIG.Read_Width_A {32} \
+ CONFIG.Use_Byte_Write_Enable {false} \
+ CONFIG.Byte_Size {9} \
+ CONFIG.Write_Width_A {6} \
+ CONFIG.Write_Depth_A {30720} \
+ CONFIG.Read_Width_A {6} \
CONFIG.Operating_Mode_A {WRITE_FIRST} \
- CONFIG.Write_Width_B {32} \
- CONFIG.Read_Width_B {32} \
+ CONFIG.Write_Width_B {6} \
+ CONFIG.Read_Width_B {6} \
CONFIG.Operating_Mode_B {READ_FIRST} \
CONFIG.Enable_B {Always_Enabled} \
CONFIG.Register_PortA_Output_of_Memory_Primitives {false} \
diff --git a/fpga/hp_lcd_driver/zynq7_wrapper.vhdl b/fpga/hp_lcd_driver/zynq7_wrapper.vhdl
index 6fb89d6..0107700 100644
--- a/fpga/hp_lcd_driver/zynq7_wrapper.vhdl
+++ b/fpga/hp_lcd_driver/zynq7_wrapper.vhdl
@@ -217,6 +217,8 @@ architecture arch of zynq7_wrapper is
signal run : std_logic;
+ signal overlay_off : std_logic;
+ signal overlay_on : std_logic;
signal eth0_mdio_mdio_i : std_logic;
signal eth0_mdio_mdio_o : std_logic;
@@ -557,7 +559,9 @@ begin
overlay_gate => overlay_gate,
overlay_r => overlay_r,
overlay_g => overlay_g,
- overlay_b => overlay_b
+ overlay_b => overlay_b,
+ overlay_on => overlay_on,
+ overlay_off => overlay_off
);
@@ -615,6 +619,7 @@ begin
+
hp0_araddr <= (others => '0');
hp0_arvalid <= '0';
hp0_rready <= '0';
@@ -629,6 +634,8 @@ begin
red_led <= emio_o(0);
green_led <= emio_o(1);
run <= emio_o(2);
+ overlay_off <= emio_o(3);
+ overlay_on <= emio_o(4);
end architecture arch;
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-20 14:52:45 +0000