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authorJames McKenzie <root@ka-ata-killa.panaceas.james.local>2025-10-05 17:17:44 +0100
committerJames McKenzie <root@ka-ata-killa.panaceas.james.local>2025-10-05 17:17:44 +0100
commit8123e5531868f8db9787c81792286143a0f2868a (patch)
treeb7ce93ef80af9b764f8c36ee7a3274c2682c2de2 /fpga/ebaz4205
parente26607065f26b6bc3705b4ab80c2bdf101f4f3b6 (diff)
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Diffstat (limited to 'fpga/ebaz4205')
-rw-r--r--fpga/ebaz4205/doc/DOC/Boot.log241
-rw-r--r--fpga/ebaz4205/doc/DOC/dmesg.log186
-rw-r--r--fpga/ebaz4205/doc/DOC/printenv.log58
-rw-r--r--fpga/ebaz4205/doc/Development/EBAZ4205.xdc74
-rw-r--r--fpga/ebaz4205/doc/HW/3D Files/EBAZ4205_Stand.stlbin0 -> 308484 bytes
-rw-r--r--fpga/ebaz4205/doc/HW/3D Files/README.md7
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-3D.pngbin0 -> 1490451 bytes
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-SCH.pdfbin0 -> 303780 bytes
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/README.md127
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/altium/README.md3
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/altium/ebit_ad.PcbDocbin0 -> 3618816 bytes
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/.gitignore30
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/IO.kicad_sch6055
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/Mem_Zynq.kicad_sch9821
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/Phy-Sun.kicad_sch5937
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/README.md21
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_IO.kicad_sch5752
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_Pwr.kicad_sch6280
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/blank.kicad_wks20
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pcb129321
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pro429
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sch6334
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sym4551
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/kicad/sym-lib-table4
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/original/README.md5
-rw-r--r--fpga/ebaz4205/doc/HW/ebaz4205/original/ebit.pcbbin0 -> 3632739 bytes
-rw-r--r--fpga/ebaz4205/doc/HW/prog/FT232HL_v20.5.31.pdfbin0 -> 278825 bytes
-rw-r--r--fpga/ebaz4205/doc/LICENSE22
-rw-r--r--fpga/ebaz4205/doc/README.md91
-rw-r--r--fpga/ebaz4205/doc/image/01-PCB-TL.jpgbin0 -> 805114 bytes
-rw-r--r--fpga/ebaz4205/doc/image/02-PCB-BL.jpgbin0 -> 847851 bytes
-rw-r--r--fpga/ebaz4205/doc/image/03-ZYNQ.jpgbin0 -> 704639 bytes
-rw-r--r--fpga/ebaz4205/doc/image/04-DDR3.jpgbin0 -> 747490 bytes
-rw-r--r--fpga/ebaz4205/doc/image/05-NAND.jpgbin0 -> 752734 bytes
-rw-r--r--fpga/ebaz4205/doc/image/06-PHY.jpgbin0 -> 496177 bytes
-rw-r--r--fpga/ebaz4205/doc/image/07-BOOT.jpgbin0 -> 643091 bytes
-rw-r--r--fpga/ebaz4205/doc/image/08-STAND.jpgbin0 -> 124590 bytes
-rw-r--r--fpga/ebaz4205/doc/image/09-STAND.jpgbin0 -> 118732 bytes
-rw-r--r--fpga/ebaz4205/doc/proc/cmdline1
-rw-r--r--fpga/ebaz4205/doc/proc/cpuinfo23
-rw-r--r--fpga/ebaz4205/doc/proc/mtd10
-rw-r--r--fpga/ebaz4205/doc/proc/partitions29
-rw-r--r--fpga/ebaz4205/doc/proc/version1
43 files changed, 175433 insertions, 0 deletions
diff --git a/fpga/ebaz4205/doc/DOC/Boot.log b/fpga/ebaz4205/doc/DOC/Boot.log
new file mode 100644
index 0000000..b07f4ad
--- /dev/null
+++ b/fpga/ebaz4205/doc/DOC/Boot.log
@@ -0,0 +1,241 @@
+
+
+1.0.0.46 (Nov 28 2017 - 20:56:04 +0800)
+
+Model: Zynq Zed Development Board
+DRAM: ECC disabled 256 MiB
+NAND: 128 MiB
+MMC: zynq_sdhci: 0
+Invalid bus 0 (err=-1)
+*** Warning - spi_flash_probe() failed, using default environment
+
+In: serial
+Out: serial
+Err: serial
+Model: Zynq Zed Development Board
+Net: Gem.e000b000
+Hit 'd' to stop autoboot(eric): 3  2  1  0
+Copying Linux from NAND flash to RAM...
+
+Device 0: nand0, sector size 128 KiB
+ Page size 2048 b
+ OOB size 64 b
+ Erase size 131072 b
+ subpagesize 512 b
+ options 0x 0
+ bbt options 0x 20000
+
+NAND read: device 0 offset 0x2220000, size 0x300000
+ 3145728 bytes read: OK
+ design filename = "top_ctrl;UserID=0XFFFFFFFF;Version=2016.4"
+ part number = "7z010clg400"
+ date = "2017/11/28"
+ time = "13:25:29"
+ bytes in bitstream = 2083740
+zynq_align_dma_buffer: Align buffer at 100068 to 100000(swap 1)
+
+NAND read: device 0 offset 0x300000, size 0x500000
+ 5242880 bytes read: OK
+
+NAND read: device 0 offset 0x800000, size 0x20000
+ 131072 bytes read: OK
+## Booting kernel from Legacy Image at 02080000 ...
+ Image Name: Linux-4.6.0-xilinx
+ Image Type: ARM Linux Kernel Image (uncompressed)
+ Data Size: 3820688 Bytes = 3.6 MiB
+ Load Address: 00008000
+ Entry Point: 00008000
+ Verifying Checksum ... OK
+## Flattened Device Tree blob at 02000000
+ Booting using the fdt blob at 0x2000000
+ Loading Kernel Image ... OK
+ Loading Device Tree to 0f2fe000, end 0f303b90 ... OK
+
+Starting kernel ...
+
+Booting Linux on physical CPU 0x0
+Linux version 4.6.0-xilinx (root@alvin) (gcc version 5.2.0 (GCC) ) #5 SMP PREEMPT Mon May 8 14:36:49 CST 2017
+CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
+CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
+Machine model: xlnx,zynq-7000
+cma: Reserved 16 MiB at 0x0e000000
+Memory policy: Data cache writealloc
+percpu: Embedded 12 pages/cpu @cfdce000 s19776 r8192 d21184 u49152
+Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
+Kernel command line: console=ttyPS0,115200 root=/dev/mtdblock6 rootfstype=jffs2 noinitrd rw rootwait
+PID hash table entries: 1024 (order: 0, 4096 bytes)
+Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
+Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
+Memory: 234624K/262144K available (5286K kernel code, 231K rwdata, 1848K rodata, 1024K init, 226K bss, 11136K reserved, 16384K cma-reserved, 0K highmem)
+Virtual kernel memory layout:
+ vector : 0xffff0000 - 0xffff1000 ( 4 kB)
+ fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
+ vmalloc : 0xd0800000 - 0xff800000 ( 752 MB)
+ lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
+ pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
+ modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
+ .text : 0xc0008000 - 0xc07f7850 (8127 kB)
+ .init : 0xc0800000 - 0xc0900000 (1024 kB)
+ .data : 0xc0900000 - 0xc0939e60 ( 232 kB)
+ .bss : 0xc0939e60 - 0xc0972764 ( 227 kB)
+Preemptible hierarchical RCU implementation.
+ Build-time adjustment of leaf fanout to 32.
+ RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
+RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
+NR_IRQS:16 nr_irqs:16 16
+efuse mapped to d0800000
+slcr mapped to d0802000
+L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
+L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
+L2C-310 erratum 769419 enabled
+L2C-310 enabling early BRESP for Cortex-A9
+L2C-310 full line of zeros enabled for Cortex-A9
+L2C-310 ID prefetch enabled, offset 1 lines
+L2C-310 dynamic clock gating enabled, standby mode enabled
+L2C-310 cache controller enabled, 8 ways, 512 kB
+L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
+zynq_clock_init: clkc starts at d0802100
+Zynq clock init
+sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
+clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce076117e, max_idle_ns: 440795215954 ns
+Switching to timer-based delay loop, resolution 3ns
+clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
+timer #0 at d080a000, irq=17
+Console: colour dummy device 80x30
+Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333330)
+pid_max: default: 32768 minimum: 301
+Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
+CPU: Testing write buffer coherency: ok
+CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
+Setting up static identity map for 0x100000 - 0x100058
+CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
+Brought up 2 CPUs
+SMP: Total of 2 processors activated (1333.33 BogoMIPS).
+CPU: All CPU(s) started in SVC mode.
+devtmpfs: initialized
+VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
+clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+pinctrl core: initialized pinctrl subsystem
+NET: Registered protocol family 16
+DMA: preallocated 256 KiB pool for atomic coherent allocations
+cpuidle: using governor menu
+hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
+hw-breakpoint: maximum watchpoint size is 4 bytes.
+zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xd0880000
+zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
+vgaarb: loaded
+SCSI subsystem initialized
+usbcore: registered new interface driver usbfs
+usbcore: registered new interface driver hub
+usbcore: registered new device driver usb
+media: Linux media interface: v0.10
+Linux video capture interface: v2.00
+pps_core: LinuxPPS API ver. 1 registered
+pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+PTP clock support registered
+EDAC MC: Ver: 3.0.0
+Advanced Linux Sound Architecture Driver Initialized.
+clocksource: Switched to clocksource arm_global_timer
+NET: Registered protocol family 2
+TCP established hash table entries: 2048 (order: 1, 8192 bytes)
+TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
+TCP: Hash tables configured (established 2048 bind 2048)
+UDP hash table entries: 256 (order: 1, 8192 bytes)
+UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+NET: Registered protocol family 1
+RPC: Registered named UNIX socket transport module.
+RPC: Registered udp transport module.
+RPC: Registered tcp transport module.
+RPC: Registered tcp NFSv4.1 backchannel transport module.
+hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
+futex hash table entries: 512 (order: 3, 32768 bytes)
+workingset: timestamp_bits=28 max_order=16 bucket_order=0
+jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
+io scheduler noop registered
+io scheduler deadline registered
+io scheduler cfq registered (default)
+dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
+dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
+42c00000.serial: ttyUL2 at MMIO 0x42c00000 (irq = 166, base_baud = 0) is a uartlite
+e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 144, base_baud = 3124996) is a xuartps
+e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 145, base_baud = 3124996) is a xuartps
+console [ttyPS0] enabled
+xdevcfg f8007000.devcfg: ioremap 0xf8007000 to d0872000
+[drm] Initialized drm 1.1.0 20060810
+brd: module loaded
+loop: module loaded
+CAN device driver interface
+gpiod_set_value: invalid GPIO
+libphy: MACB_mii_bus: probed
+macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 148 (00:0a:35:00:01:22)
+ICPlus IP101A/G e000b000.etherne:00: attached PHY driver [ICPlus IP101A/G] (mii_bus:phy_addr=e000b000.etherne:00, irq=-1)
+e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
+e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+ehci-pci: EHCI PCI platform driver
+usbcore: registered new interface driver usb-storage
+mousedev: PS/2 mouse device common for all mice
+i2c /dev entries driver
+rtc-pcf8563 0-0051: chip found, driver version 0.4.4
+rtc-pcf8563 0-0051: pcf8563_write_block_data: err=-11 addr=0e, data=03
+rtc-pcf8563 0-0051: pcf8563_probe: write error
+rtc-pcf8563: probe of 0-0051 failed with error -5
+cdns-i2c e0004000.i2c: 400 kHz mmio e0004000 irq 141
+EDAC MC: ECC not enabled
+Xilinx Zynq CpuIdle Driver started
+sdhci: Secure Digital Host Controller Interface driver
+sdhci: Copyright(c) Pierre Ossman
+sdhci-pltfm: SDHCI platform and OF driver helper
+mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using DMA
+ledtrig-cpu: registered to indicate activity on CPUs
+usbcore: registered new interface driver usbhid
+usbhid: USB HID core driver
+nand: device found, Manufacturer ID: 0xef, Chip ID: 0xf1
+nand: Unknown W29N01HV
+nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
+Bad block table found at page 65472, version 0x01
+Bad block table found at page 65408, version 0x01
+nand_read_bbt: bad block at 0x000007f60000
+nand_read_bbt: bad block at 0x000007f80000
+nand_read_bbt: bad block at 0x000007fa0000
+nand_read_bbt: bad block at 0x000007fc0000
+9 ofpart partitions found on MTD device pl35x-nand
+Creating 9 MTD partitions on "pl35x-nand":
+0x000000000000-0x000000300000 : "nand-fsbl-uboot"
+0x000000300000-0x000000800000 : "nand-linux"
+0x000000800000-0x000000820000 : "nand-device-tree"
+0x000000820000-0x000001220000 : "nand-rootfs"
+0x000001220000-0x000002220000 : "nand-jffs2"
+0x000002220000-0x000002a20000 : "nand-bitstream"
+0x000002a20000-0x000006a20000 : "nand-allrootfs"
+0x000006a20000-0x000007e00000 : "nand-release"
+0x000007e00000-0x000008000000 : "nand-reserve"
+NET: Registered protocol family 10
+sit: IPv6 over IPv4 tunneling driver
+NET: Registered protocol family 17
+can: controller area network core (rev 20120528 abi 9)
+NET: Registered protocol family 29
+can: raw protocol (rev 20120528)
+can: broadcast manager protocol (rev 20120528 t)
+can: netlink gateway (rev 20130117) max_hops=1
+Registering SWP/SWPB emulation handler
+hctosys: unable to open rtc device (rtc0)
+ALSA device list:
+ No soundcards found.
+VFS: Mounted root (jffs2 filesystem) on device 31:6.
+devtmpfs: mounted
+Freeing unused kernel memory: 1024K (c0800000 - c0900000)
+ INIT: version 2.88 booting
+random: dd urandom read with 2 bits of entropy available
+Wed Jul 21 01:12:44 UTC 2010
+Starting internet superserver: inetd.
+ INIT: Entering runlevel: 5
+Configuring network interfaces... IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
+done.
+Starting Dropbear SSH server: dropbear.
+Starting syslogd/klogd: done
+
+PetaLinux 2016.4 zedboard-zynq7 /dev/ttyPS0
+
+ zedboard-zynq7 login: jffs2: notice: (721) check_node_data: wrong data CRC in data node at 0x0011bc60: read 0x7d8de99e, calculated 0x7a2b1e83.
diff --git a/fpga/ebaz4205/doc/DOC/dmesg.log b/fpga/ebaz4205/doc/DOC/dmesg.log
new file mode 100644
index 0000000..47c1d4b
--- /dev/null
+++ b/fpga/ebaz4205/doc/DOC/dmesg.log
@@ -0,0 +1,186 @@
+dmesg
+Booting Linux on physical CPU 0x0
+Linux version 4.6.0-xilinx (root@alvin) (gcc version 5.2.0 (GCC) ) #5 SMP PREEMPT Mon May 8 14:36:49 CST 2017
+CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
+CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
+Machine model: xlnx,zynq-7000
+cma: Reserved 16 MiB at 0x0e000000
+Memory policy: Data cache writealloc
+On node 0 totalpages: 65536
+free_area_init_node: node 0, pgdat c0939100, node_mem_map cfdf0000
+ Normal zone: 512 pages used for memmap
+ Normal zone: 0 pages reserved
+ Normal zone: 65536 pages, LIFO batch:15
+percpu: Embedded 12 pages/cpu @cfdce000 s19776 r8192 d21184 u49152
+pcpu-alloc: s19776 r8192 d21184 u49152 alloc=12*4096
+pcpu-alloc: [0] 0 [0] 1
+Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
+Kernel command line: console=ttyPS0,115200 root=/dev/mtdblock6 rootfstype=jffs2 noinitrd rw rootwait
+PID hash table entries: 1024 (order: 0, 4096 bytes)
+Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
+Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
+Memory: 234624K/262144K available (5286K kernel code, 231K rwdata, 1848K rodata, 1024K init, 226K bss, 11136K reserved, 16384K cma-reserved, 0K highmem)
+Virtual kernel memory layout:
+ vector : 0xffff0000 - 0xffff1000 ( 4 kB)
+ fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
+ vmalloc : 0xd0800000 - 0xff800000 ( 752 MB)
+ lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
+ pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
+ modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
+ .text : 0xc0008000 - 0xc07f7850 (8127 kB)
+ .init : 0xc0800000 - 0xc0900000 (1024 kB)
+ .data : 0xc0900000 - 0xc0939e60 ( 232 kB)
+ .bss : 0xc0939e60 - 0xc0972764 ( 227 kB)
+Preemptible hierarchical RCU implementation.
+ Build-time adjustment of leaf fanout to 32.
+ RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
+RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
+NR_IRQS:16 nr_irqs:16 16
+efuse mapped to d0800000
+slcr mapped to d0802000
+L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
+L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
+L2C-310 erratum 769419 enabled
+L2C-310 enabling early BRESP for Cortex-A9
+L2C-310 full line of zeros enabled for Cortex-A9
+L2C-310 ID prefetch enabled, offset 1 lines
+L2C-310 dynamic clock gating enabled, standby mode enabled
+L2C-310 cache controller enabled, 8 ways, 512 kB
+L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
+zynq_clock_init: clkc starts at d0802100
+Zynq clock init
+sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
+clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce076117e, max_idle_ns: 440795215954 ns
+Switching to timer-based delay loop, resolution 3ns
+clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
+timer #0 at d080a000, irq=17
+Console: colour dummy device 80x30
+Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333330)
+pid_max: default: 32768 minimum: 301
+Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
+CPU: Testing write buffer coherency: ok
+CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
+Setting up static identity map for 0x100000 - 0x100058
+CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
+Brought up 2 CPUs
+SMP: Total of 2 processors activated (1333.33 BogoMIPS).
+CPU: All CPU(s) started in SVC mode.
+devtmpfs: initialized
+VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
+clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+pinctrl core: initialized pinctrl subsystem
+NET: Registered protocol family 16
+DMA: preallocated 256 KiB pool for atomic coherent allocations
+cpuidle: using governor menu
+hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
+hw-breakpoint: maximum watchpoint size is 4 bytes.
+zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xd0880000
+zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
+vgaarb: loaded
+SCSI subsystem initialized
+usbcore: registered new interface driver usbfs
+usbcore: registered new interface driver hub
+usbcore: registered new device driver usb
+media: Linux media interface: v0.10
+Linux video capture interface: v2.00
+pps_core: LinuxPPS API ver. 1 registered
+pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+PTP clock support registered
+EDAC MC: Ver: 3.0.0
+Advanced Linux Sound Architecture Driver Initialized.
+clocksource: Switched to clocksource arm_global_timer
+NET: Registered protocol family 2
+TCP established hash table entries: 2048 (order: 1, 8192 bytes)
+TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
+TCP: Hash tables configured (established 2048 bind 2048)
+UDP hash table entries: 256 (order: 1, 8192 bytes)
+UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+NET: Registered protocol family 1
+RPC: Registered named UNIX socket transport module.
+RPC: Registered udp transport module.
+RPC: Registered tcp transport module.
+RPC: Registered tcp NFSv4.1 backchannel transport module.
+PCI: CLS 0 bytes, default 64
+hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
+futex hash table entries: 512 (order: 3, 32768 bytes)
+workingset: timestamp_bits=28 max_order=16 bucket_order=0
+jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
+io scheduler noop registered
+io scheduler deadline registered
+io scheduler cfq registered (default)
+dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
+dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
+42c00000.serial: ttyUL2 at MMIO 0x42c00000 (irq = 166, base_baud = 0) is a uartlite
+e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 144, base_baud = 3124996) is a xuartps
+e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 145, base_baud = 3124996) is a xuartps
+console [ttyPS0] enabled
+xdevcfg f8007000.devcfg: ioremap 0xf8007000 to d0872000
+[drm] Initialized drm 1.1.0 20060810
+brd: module loaded
+loop: module loaded
+CAN device driver interface
+gpiod_set_value: invalid GPIO
+libphy: MACB_mii_bus: probed
+macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 148 (00:0a:35:00:01:22)
+ICPlus IP101A/G e000b000.etherne:00: attached PHY driver [ICPlus IP101A/G] (mii_bus:phy_addr=e000b000.etherne:00, irq=-1)
+e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
+e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+ehci-pci: EHCI PCI platform driver
+usbcore: registered new interface driver usb-storage
+mousedev: PS/2 mouse device common for all mice
+i2c /dev entries driver
+rtc-pcf8563 0-0051: chip found, driver version 0.4.4
+rtc-pcf8563 0-0051: pcf8563_write_block_data: err=-11 addr=0e, data=03
+rtc-pcf8563 0-0051: pcf8563_probe: write error
+rtc-pcf8563: probe of 0-0051 failed with error -5
+cdns-i2c e0004000.i2c: 400 kHz mmio e0004000 irq 141
+EDAC MC: ECC not enabled
+Xilinx Zynq CpuIdle Driver started
+sdhci: Secure Digital Host Controller Interface driver
+sdhci: Copyright(c) Pierre Ossman
+sdhci-pltfm: SDHCI platform and OF driver helper
+mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using DMA
+ledtrig-cpu: registered to indicate activity on CPUs
+usbcore: registered new interface driver usbhid
+usbhid: USB HID core driver
+nand: device found, Manufacturer ID: 0xef, Chip ID: 0xf1
+nand: Unknown W29N01HV
+nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
+Bad block table found at page 65472, version 0x01
+Bad block table found at page 65408, version 0x01
+nand_read_bbt: bad block at 0x000007f60000
+nand_read_bbt: bad block at 0x000007f80000
+nand_read_bbt: bad block at 0x000007fa0000
+nand_read_bbt: bad block at 0x000007fc0000
+9 ofpart partitions found on MTD device pl35x-nand
+Creating 9 MTD partitions on "pl35x-nand":
+0x000000000000-0x000000300000 : "nand-fsbl-uboot"
+0x000000300000-0x000000800000 : "nand-linux"
+0x000000800000-0x000000820000 : "nand-device-tree"
+0x000000820000-0x000001220000 : "nand-rootfs"
+0x000001220000-0x000002220000 : "nand-jffs2"
+0x000002220000-0x000002a20000 : "nand-bitstream"
+0x000002a20000-0x000006a20000 : "nand-allrootfs"
+0x000006a20000-0x000007e00000 : "nand-release"
+0x000007e00000-0x000008000000 : "nand-reserve"
+NET: Registered protocol family 10
+sit: IPv6 over IPv4 tunneling driver
+NET: Registered protocol family 17
+can: controller area network core (rev 20120528 abi 9)
+NET: Registered protocol family 29
+can: raw protocol (rev 20120528)
+can: broadcast manager protocol (rev 20120528 t)
+can: netlink gateway (rev 20130117) max_hops=1
+Registering SWP/SWPB emulation handler
+hctosys: unable to open rtc device (rtc0)
+ALSA device list:
+ No soundcards found.
+VFS: Mounted root (jffs2 filesystem) on device 31:6.
+devtmpfs: mounted
+Freeing unused kernel memory: 1024K (c0800000 - c0900000)
+random: dd urandom read with 2 bits of entropy available
+IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
+jffs2: notice: (721) check_node_data: wrong data CRC in data node at 0x0011bc60: read 0x7d8de99e, calculated 0x7a2b1e83.
+root@zedboard-zynq7:~# \ No newline at end of file
diff --git a/fpga/ebaz4205/doc/DOC/printenv.log b/fpga/ebaz4205/doc/DOC/printenv.log
new file mode 100644
index 0000000..8be0edc
--- /dev/null
+++ b/fpga/ebaz4205/doc/DOC/printenv.log
@@ -0,0 +1,58 @@
+printenv
+baudrate=115200
+bitstream_image=system.bit.bin
+boot_image=BOOT.bin
+boot_size=0xF00000
+bootcmd=run $modeboot
+bootdelay=3
+bootenv=uEnv.txt
+devicetree_image=devicetree.dtb
+devicetree_load_address=0x2000000
+devicetree_size=0x20000
+dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0
+dfu_mmc_info=set dfu_alt_info ${kernel_image} fat 0 1\\;${devicetree_image} fat 0 1\\;${ramdisk_image} fat 0 1
+dfu_ram=run dfu_ram_info && dfu 0 ram 0
+dfu_ram_info=set dfu_alt_info ${kernel_image} ram 0x3000000 0x500000\\;${devicetree_image} ram 0x2A00000 0x20000\\;${ramdisk_image} ram 0x2000000 0x600000
+ethact=Gem.e000b000
+ethaddr=00:0a:35:00:01:22
+fdt_high=0x20000000
+gatewayip=192.168.0.1
+importbootenv=echo Importing environment from SD ...; env import -t ${loadbootenv_addr} $filesize
+initrd_high=0x20000000
+ipaddr=192.168.0.115
+jtagboot=echo TFTPing Linux to RAM... && tftpboot ${kernel_load_address} ${kernel_image} && tftpboot ${devicetree_load_address} ${devicetree_image} && tftpboot ${ramdisk_load_address} ${ramdisk_image} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+kernel_image=uImage
+kernel_load_address=0x2080000
+kernel_size=0x500000
+loadbit_addr=0x100000
+loadbootenv=load mmc 0 ${loadbootenv_addr} ${bootenv}
+loadbootenv_addr=0x2000000
+mmc_loadbit=echo Loading bitstream from SD/MMC/eMMC to RAM.. && mmcinfo && load mmc 0 ${loadbit_addr} ${bitstream_image} && fpga loadb 0 ${loadbit_addr} ${filesize}
+modeboot=nandboot
+nandboot=echo Copying Linux from NAND flash to RAM... && nand info && run nandroot;nand read 0x100000 0x2220000 0x300000 && fpga loadb 0 0x100000 0x300000 && nand read ${kernel_load_address} 0x300000 ${kernel_size} && nand read ${devicetree_load_address} 0x800000 ${devicetree_size} && bootm ${kernel_load_address} - ${devicetree_load_address}
+nandboot0=echo Copying Linux from NAND flash to RAM... && nand read ${kernel_load_address} 0x300000 ${kernel_size} && nand read ${devicetree_load_address} 0x800000 ${devicetree_size} && echo Copying ramdisk... && nand read ${ramdisk_load_address} 0x820000 ${ramdisk_size} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+nandroot=setenv bootargs 'console=ttyPS0,115200 root=/dev/mtdblock6 rootfstype=jffs2 noinitrd rw rootwait'
+norboot=echo Copying Linux from NOR flash to RAM... && cp.b 0xE2100000 ${kernel_load_address} ${kernel_size} && cp.b 0xE2600000 ${devicetree_load_address} ${devicetree_size} && echo Copying ramdisk... && cp.b 0xE2620000 ${ramdisk_load_address} ${ramdisk_size} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+preboot=if test $modeboot = sdboot && env run sd_uEnvtxt_existence_test; then if env run loadbootenv; then env run importbootenv; fi; fi;
+qspiboot=echo Copying Linux from QSPI flash to RAM... && sf probe 0 0 0 && sf read ${kernel_load_address} 0x100000 ${kernel_size} && sf read ${devicetree_load_address} 0x600000 ${devicetree_size} && echo Copying ramdisk... && sf read ${ramdisk_load_address} 0x620000 ${ramdisk_size} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+ramdisk_image=uramdisk.image.gz
+ramdisk_load_address=0x4000000
+ramdisk_size=0xA00000
+rsa_jtagboot=echo TFTPing Image to RAM... && tftpboot 0x100000 ${boot_image} && zynqrsa 0x100000 && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+rsa_nandboot=echo Copying Image from NAND flash to RAM... && nand read 0x100000 0x0 ${boot_size} && zynqrsa 0x100000 && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+rsa_norboot=echo Copying Image from NOR flash to RAM... && cp.b 0xE2100000 0x100000 ${boot_size} && zynqrsa 0x100000 && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+rsa_qspiboot=echo Copying Image from QSPI flash to RAM... && sf probe 0 0 0 && sf read 0x100000 0x0 ${boot_size} && zynqrsa 0x100000 && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+rsa_sdboot=echo Copying Image from SD to RAM... && load mmc 0 0x100000 ${boot_image} && zynqrsa 0x100000 && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}
+sd_uEnvtxt_existence_test=test -e mmc 0 /uEnv.txt
+sdboot=if mmcinfo; then run uenvboot; echo Copying Linux from SD to RAM... && load mmc 0 ${kernel_load_address} ${kernel_image} && load mmc 0 ${devicetree_load_address} ${devicetree_image} && load mmc 0 ${ramdisk_load_address} ${ramdisk_image} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}; fi
+serverip=192.168.0.104
+stderr=serial
+stdin=serial
+stdout=serial
+thor_mmc=run dfu_mmc_info && thordown 0 mmc 0
+thor_ram=run dfu_ram_info && thordown 0 ram 0
+uenvboot=if run loadbootenv; then echo Loaded environment from ${bootenv}; run importbootenv; fi; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi
+usbboot=if usb start; then run uenvboot; echo Copying Linux from USB to RAM... && load usb 0 ${kernel_load_address} ${kernel_image} && load usb 0 ${devicetree_load_address} ${devicetree_image} && load usb 0 ${ramdisk_load_address} ${ramdisk_image} && bootm ${kernel_load_address} ${ramdisk_load_address} ${devicetree_load_address}; fi
+
+Environment size: 5314/131068 bytes
+zynq-uboot> \ No newline at end of file
diff --git a/fpga/ebaz4205/doc/Development/EBAZ4205.xdc b/fpga/ebaz4205/doc/Development/EBAZ4205.xdc
new file mode 100644
index 0000000..ff57951
--- /dev/null
+++ b/fpga/ebaz4205/doc/Development/EBAZ4205.xdc
@@ -0,0 +1,74 @@
+## This file is a general .xdc for the EBAZ425
+## To use it in a project:
+## - uncomment the lines corresponding to used pins
+## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
+
+
+##Clock signal
+
+#set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports { clk }]; # Use if you have X5 Oscillator soldered on
+#create_clock -add -name clk_pin -period 10.00 -waveform {0 5} [get_ports { clk }];
+
+
+##DATA1
+#set_property -dict { PACKAGE_PIN A20 IOSTANDARD LVCMOS33 } [get_ports { DATA1_5 }];
+#set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { DATA1_6 }];
+#set_property -dict { PACKAGE_PIN B19 IOSTANDARD LVCMOS33 } [get_ports { DATA1_7 }];
+#set_property -dict { PACKAGE_PIN B20 IOSTANDARD LVCMOS33 } [get_ports { DATA1_8 }];
+#set_property -dict { PACKAGE_PIN C20 IOSTANDARD LVCMOS33 } [get_ports { DATA1_9 }];
+#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { DATA1_11 }];
+#set_property -dict { PACKAGE_PIN D20 IOSTANDARD LVCMOS33 } [get_ports { DATA1_13 }];
+#set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { DATA1_14 }];
+#set_property -dict { PACKAGE_PIN H18 IOSTANDARD LVCMOS33 } [get_ports { DATA1_15 }];
+#set_property -dict { PACKAGE_PIN D19 IOSTANDARD LVCMOS33 } [get_ports { DATA1_16 }];
+#set_property -dict { PACKAGE_PIN F20 IOSTANDARD LVCMOS33 } [get_ports { DATA1_17 }];
+#set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { DATA1_18 }];
+#set_property -dict { PACKAGE_PIN F19 IOSTANDARD LVCMOS33 } [get_ports { DATA1_19 }];
+#set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { DATA1_20 }];
+
+
+##DATA2
+#set_property -dict { PACKAGE_PIN G20 IOSTANDARD LVCMOS33 } [get_ports { DATA2_5 }];
+#set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports { DATA2_6 }];
+#set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports { DATA2_7 }];
+#set_property -dict { PACKAGE_PIN H20 IOSTANDARD LVCMOS33 } [get_ports { DATA2_8 }];
+#set_property -dict { PACKAGE_PIN J19 IOSTANDARD LVCMOS33 } [get_ports { DATA2_9 }];
+#set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { DATA2_11 }];
+#set_property -dict { PACKAGE_PIN K19 IOSTANDARD LVCMOS33 } [get_ports { DATA2_13 }];
+#set_property -dict { PACKAGE_PIN J20 IOSTANDARD LVCMOS33 } [get_ports { DATA2_14 }];
+#set_property -dict { PACKAGE_PIN L16 IOSTANDARD LVCMOS33 } [get_ports { DATA2_15 }];
+#set_property -dict { PACKAGE_PIN L19 IOSTANDARD LVCMOS33 } [get_ports { DATA2_16 }];
+#set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 } [get_ports { DATA2_17 }];
+#set_property -dict { PACKAGE_PIN L20 IOSTANDARD LVCMOS33 } [get_ports { DATA2_18 }];
+#set_property -dict { PACKAGE_PIN M20 IOSTANDARD LVCMOS33 } [get_ports { DATA2_19 }];
+#set_property -dict { PACKAGE_PIN L17 IOSTANDARD LVCMOS33 } [get_ports { DATA2_20 }];
+
+
+##DATA3
+#set_property -dict { PACKAGE_PIN M19 IOSTANDARD LVCMOS33 } [get_ports { DATA3_5 }];
+#set_property -dict { PACKAGE_PIN N20 IOSTANDARD LVCMOS33 } [get_ports { DATA3_6 }];
+#set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 } [get_ports { DATA3_7 }];
+#set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 } [get_ports { DATA3_8 }];
+#set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 } [get_ports { DATA3_9 }];
+#set_property -dict { PACKAGE_PIN P20 IOSTANDARD LVCMOS33 } [get_ports { DATA3_11 }];
+#set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { DATA3_13 }];
+#set_property -dict { PACKAGE_PIN R19 IOSTANDARD LVCMOS33 } [get_ports { DATA3_14 }];
+#set_property -dict { PACKAGE_PIN P19 IOSTANDARD LVCMOS33 } [get_ports { DATA3_15 }];
+#set_property -dict { PACKAGE_PIN T20 IOSTANDARD LVCMOS33 } [get_ports { DATA3_16 }];
+#set_property -dict { PACKAGE_PIN U20 IOSTANDARD LVCMOS33 } [get_ports { DATA3_17 }];
+#set_property -dict { PACKAGE_PIN T19 IOSTANDARD LVCMOS33 } [get_ports { DATA3_18 }];
+#set_property -dict { PACKAGE_PIN V20 IOSTANDARD LVCMOS33 } [get_ports { DATA3_19 }];
+#set_property -dict { PACKAGE_PIN U19 IOSTANDARD LVCMOS33 } [get_ports { DATA3_20 }];
+
+##LEDS
+#set_property -dict { PACKAGE_PIN W13 IOSTANDARD LVCMOS33 } [get_ports { greenLED }];
+#set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports { redLED }];
+
+
+##J5&J3
+#set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports { J5_SPEED }];
+#set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { J5_PWM }];
+#set_property -dict { PACKAGE_PIN V13 IOSTANDARD LVCMOS33 } [get_ports { J3_SPEED }];
+#set_property -dict { PACKAGE_PIN U12 IOSTANDARD LVCMOS33 } [get_ports { J3_PWM }];
+
+
diff --git a/fpga/ebaz4205/doc/HW/3D Files/EBAZ4205_Stand.stl b/fpga/ebaz4205/doc/HW/3D Files/EBAZ4205_Stand.stl
new file mode 100644
index 0000000..6ae9584
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/3D Files/EBAZ4205_Stand.stl
Binary files differ
diff --git a/fpga/ebaz4205/doc/HW/3D Files/README.md b/fpga/ebaz4205/doc/HW/3D Files/README.md
new file mode 100644
index 0000000..91e61c6
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/3D Files/README.md
@@ -0,0 +1,7 @@
+# EBAZ4205 3D Files
+
+## EBAZ4205_Stand.stl
+
+Uses four 5mm M3 Screws.
+![Unmounted Stand](../../image/08-STAND.jpg)
+![Mounted Stand](../../image/09-STAND.jpg)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-3D.png b/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-3D.png
new file mode 100644
index 0000000..8e164bd
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-3D.png
Binary files differ
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-SCH.pdf b/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-SCH.pdf
new file mode 100644
index 0000000..8fbbe56
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/EBAZ4205-SCH.pdf
Binary files differ
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/README.md b/fpga/ebaz4205/doc/HW/ebaz4205/README.md
new file mode 100644
index 0000000..4d63460
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/README.md
@@ -0,0 +1,127 @@
+# EBAZ4205 PCB designs and schematics
+
+[original](./original) contains the original design (PCB only).
+
+## Altium & KiCad import tutorial
+
+Tools required:
+- Altium 20 (21 has importer issues)
+- latest KiCad nightly - [Windows builds](https://kicad-downloads.s3.cern.ch/index.html?prefix=windows/nightly/)
+
+
+1\. Download original PCB file from https://github.com/Elrori/EBAZ4205/blob/master/ebit.pcb
+
+---
+
+2\. Import it in Altium Designer 20 or lower (v21 has a broken importer) via the DXP import wizard
+
+2.1 Use define board shape from bounding rectangle
+
+2.2 Other options are greyed out and turned off
+
+2.3 20mil Internal Plane Pullback (default)
+
+---
+
+3\. Fix import issues in Altium
+
+3.1.1. In PCB List (View > Panels > PCB List) locate "Pads" objects that have "Stack mode property" set to "Top-Middle-Bottom"
+
+3.1.2. In the Properties window, change it to "Simple", keep the Shape "Rectangular"
+ (It will cause DRC issues with polygon fills which we will fix)
+
+3.2. Polygon pour priorities seem to be screwed up and that affects KiCad (since Kicad doesn't keep around filled polygons). \
+ It's possible that this is actually an issue of the original design - they poured polygons in parts, never fully.
+ \
+ So even though Altium keeps previous fills, we need to to fix that in Altium (has better tools for this) so that it works in KiCad.
+
+3.2.1. Go to Tools > Polygon Pours > Polygon Manager
+
+3.2.2. Select all polygons (Ctrl+A) in Properties set "Hatched" to "Solid", disable "Remove Islands", keep other settings as-is
+
+3.2.3. For every layer, Auto Generate Pour Order
+
+3.2.4. Apply and close Polygon Manager
+
+3.3. Default design rules mangle poly fills
+
+3.3.1. Go to Design > Rules
+
+3.3.2. Set "PolyonConnect" rule "Connect Style" property to "Direct Connect" \
+ (This removes thermals reliefs on specific pins, but at least you don't need to dick with DRC rules too much)
+
+3.3.3. Set "Clearance_1" minimum clearance 3.2mil to pass the DRC check \
+ (Or, alternatively, fix these issues, there's only 4 or so violations)
+
+3.4. Repour all polygons via Tools > Polygon Pours > Repour All
+
+---
+
+4\. Save the design as ebit_ad.PcbDoc , use "PCB Binary Files" type (this is version 6 of the format, which is expected by the Kicad importer).
+
+---
+
+5\. Import the design in KiCad nightly (I've used 5.99.0-8236-gc3d46c1cb5, Jan 7 2021 22:02:27, CERN Windows build)
+
+5.1. Open pcbnew directly
+
+5.2. File > Import > Non-KiCad board file, select ebit_ad.PcbDoc (it needs to have the PcbDoc extension!)
+
+5.3. Fix import issues in KiCad \
+ Constraints aren't migrated properly (though the values in Altium don't make much sense either) \
+ so we need to manually set it to Altium rules to get comparable results
+
+5.3.1. Go to File > Board Setup
+
+5.3.2. Board Stackup > Physical Stackup, set Board thickness to Current thickness from stackup \
+ (or actually fix / adapt it to your manufacturers capabilities)
+
+5.3.3. Design Rules > Constraints, set to Altium rules (or manufacturer capabilities)
+
+ - Copper > Minimum track width to 1 mils
+ - Copper > Minimum annular width to 3 mils
+ - Copper > Minimum via diameter to 2 mils
+ - Copper > Copper edge clearance to 3.2 mils
+ - Holes > Minimum through hole to 2 mils
+ - Holes > Hole to hole clearance to 10 mils
+ - you can ignore other settings
+
+5.3.4. Design Rules > Violation Severity
+
+ - set Miscellaneous > Silkscreen overlap to Ignore
+ - set Miscellaneous > Silkscreen clipped by solder mask to Ignore
+
+5.3.5. Project > Net Classes, Default+All nets, set to Altium rules (or manufacturer capabilities)
+
+ - Clearance to 3.2 mils
+ - Track Width to 10 mils
+ - Via Size to 50 mils
+ - Via Drill to 28 mils
+ - you can ignore other settings
+
+5.3.6. Apply and close Board Setup
+
+5.4. Set up zone fills
+
+5.4.1. Open Copper Zone Properties (Ctrl+Shift+Z)
+
+5.4.2. Set Electrical Properties
+
+ - Clearance to 3.2 mils
+ - Minimum width to 3.2 mils
+ - Pad connections to Solid
+ - you can ignore other settings
+
+5.4.3. Invoke "Export Settings to Other Zones" and close the Copper Zone Properties
+
+---
+
+6\. Due to https://gitlab.com/kicad/code/kicad/-/issues/5794 (still applicable),
+ invoke zone refill in DRC checker to apply new net clearances
+ \
+ If you set everything as described, the DRC checker shouldn't report any errors
+ and all nets should be connected.
+
+---
+
+7\. Save the KiCad design if you haven't already ;)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/altium/README.md b/fpga/ebaz4205/doc/HW/ebaz4205/altium/README.md
new file mode 100644
index 0000000..4bdce50
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/altium/README.md
@@ -0,0 +1,3 @@
+Altium import + fixes for proper polygon fill.
+
+See [../README.md](../README.md) for details. \ No newline at end of file
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/altium/ebit_ad.PcbDoc b/fpga/ebaz4205/doc/HW/ebaz4205/altium/ebit_ad.PcbDoc
new file mode 100644
index 0000000..96d633a
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/altium/ebit_ad.PcbDoc
Binary files differ
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/.gitignore b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/.gitignore
new file mode 100644
index 0000000..92e8586
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/.gitignore
@@ -0,0 +1,30 @@
+# For PCBs designed using KiCad: http://www.kicad-pcb.org/
+# Format documentation: http://kicad-pcb.org/help/file-formats/
+
+# Temporary files
+*.000
+*.bak
+*.bck
+*.kicad_pcb-bak
+*.kicad_sch-bak
+*.kicad_prl
+*.sch-bak
+*~
+_autosave-*
+*.tmp
+*-save.pro
+*-save.kicad_pcb
+fp-info-cache
+
+# Netlist files (exported from Eeschema)
+*.net
+
+# Autorouter files (exported from Pcbnew)
+*.dsn
+*.ses
+
+# Exported BOM files
+*.xml
+*.csv
+
+**/*.zip
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/IO.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/IO.kicad_sch
new file mode 100644
index 0000000..26c0611
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/IO.kicad_sch
@@ -0,0 +1,6055 @@
+(kicad_sch (version 20210126) (generator eeschema)
+
+ (paper "A3")
+
+ (title_block
+ (title "EBAZ4205 Schematic rebuild.")
+ (date "2021-02-15")
+ (rev "V004")
+ (comment 1 "Some schematic symbols have been eeditted to clear DRC errors")
+ (comment 2 "Extra PWR_FLAGS have been added to clear DRC errors")
+ (comment 3 "Kicad does not allow refs like RxxxA some some devices have been renumbered")
+ )
+
+ (lib_symbols
+ (symbol "Connector_Generic:Conn_01x04" (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
+ (property "Reference" "J" (id 0) (at 0 5.08 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Value" "Conn_01x04" (id 1) (at 0 -7.62 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Footprint" "" (id 2) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "connector" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "Connector*:*_1x??_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "Conn_01x04_1_1"
+ (rectangle (start -1.27 -4.953) (end 0 -5.207)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -2.413) (end 0 -2.667)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 2.667) (end 0 2.413)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 3.81) (end 1.27 -6.35)
+ (stroke (width 0.254)) (fill (type background))
+ )
+ (rectangle (start -1.27 0.127) (end 0 -0.127)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (pin passive line (at -5.08 2.54 0) (length 3.81)
+ (name "Pin_1" (effects (font (size 1.27 1.27))))
+ (number "1" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 0 0) (length 3.81)
+ (name "Pin_2" (effects (font (size 1.27 1.27))))
+ (number "2" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -2.54 0) (length 3.81)
+ (name "Pin_3" (effects (font (size 1.27 1.27))))
+ (number "3" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -5.08 0) (length 3.81)
+ (name "Pin_4" (effects (font (size 1.27 1.27))))
+ (number "4" (effects (font (size 1.27 1.27))))
+ )
+ )
+ )
+ (symbol "Device:C" (pin_numbers hide) (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
+ (property "Reference" "C" (id 0) (at 0.635 2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "C" (id 1) (at 0.635 -2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Footprint" "" (id 2) (at 0.9652 -3.81 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "cap capacitor" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Unpolarized capacitor" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "C_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "C_0_1"
+ (polyline
+ (pts
+ (xy -2.032 -0.762)
+ (xy 2.032 -0.762)
+ )
+ (stroke (width 0.508)) (fill (type none))
+ )
+ (polyline
+ (pts
+ (xy -2.032 0.762)
+ (xy 2.032 0.762)
+ )
+ (stroke (width 0.508)) (fill (type none))
+ )
+ )
+ (symbol "C_1_1"
+ (pin passive line (at 0 3.81 270) (length 2.794)
+ (name "~" (effects (font (size 1.27 1.27))))
+ (number "1" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 0 -3.81 90) (length 2.794)
+ (name "~" (effects (font (size 1.27 1.27))))
+ (number "2" (effects (font (size 1.27 1.27))))
+ )
+ )
+ )
+ (symbol "Device:CP" (pin_numbers hide) (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
+ (property "Reference" "C" (id 0) (at 0.635 2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "CP" (id 1) (at 0.635 -2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Footprint" "" (id 2) (at 0.9652 -3.81 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "cap capacitor" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Polarized capacitor" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "CP_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "CP_0_1"
+ (rectangle (start -2.286 0.508) (end 2.286 1.016)
+ (stroke (width 0)) (fill (type none))
+ )
+ (rectangle (start 2.286 -0.508) (end -2.286 -1.016)
+ (stroke (width 0)) (fill (type outline))
+ )
+ (polyline
+ (pts
+ (xy -1.778 2.286)
+ (xy -0.762 2.286)
+ )
+ (stroke (width 0)) (fill (type none))
+ )
+ (polyline
+ (pts
+ (xy -1.27 2.794)
+ (xy -1.27 1.778)
+ )
+ (stroke (width 0)) (fill (type none))
+ )
+ )
+ (symbol "CP_1_1"
+ (pin passive line (at 0 3.81 270) (length 2.794)
+ (name "~" (effects (font (size 1.27 1.27))))
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+ )
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+ (number "2" (effects (font (size 1.27 1.27))))
+ )
+ )
+ )
+ (symbol "Device:L" (pin_numbers hide) (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
+ (property "Reference" "L" (id 0) (at -1.27 0 90)
+ (effects (font (size 1.27 1.27)))
+ )
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+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Footprint" "" (id 2) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "inductor choke coil reactor magnetic" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Inductor" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "Choke_* *Coil* Inductor_* L_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "L_0_1"
+ (arc (start 0 -2.54) (end 0 -1.27) (radius (at 0 -1.905) (length 0.635) (angles -89.9 89.9))
+ (stroke (width 0)) (fill (type none))
+ )
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+ )
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+ )
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+ (stroke (width 0)) (fill (type none))
+ )
+ )
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+ )
+ )
+ )
+ (symbol "Device:R_US" (pin_numbers hide) (pin_names (offset 0)) (in_bom yes) (on_board yes)
+ (property "Reference" "R" (id 0) (at 2.54 0 90)
+ (effects (font (size 1.27 1.27)))
+ )
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+ (effects (font (size 1.27 1.27)))
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "R_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ )
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+ )
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+ )
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+ )
+ )
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Mem_Zynq.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Mem_Zynq.kicad_sch
new file mode 100644
index 0000000..436a871
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Mem_Zynq.kicad_sch
@@ -0,0 +1,9821 @@
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+ (paper "A3")
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+ (title_block
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+ (pin "25" (uuid 09100448-9caf-43db-9eb4-61241d7050e9))
+ )
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "device class L1" "Integrated Circuits (ICs)" (id 5) (at 177.8 157.48 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "device class L2" "Memory" (id 6) (at 177.8 154.94 0)
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+ (property "device class L3" "RAM" (id 7) (at 177.8 152.4 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "digikey part number" "557-1752-ND" (id 9) (at 177.8 147.32 0)
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+ )
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+ )
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
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+ )
+ (property "manufacturer" "Micron" (id 15) (at 177.8 132.08 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "max supply voltage" "1.45V" (id 16) (at 177.8 129.54 0)
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+ (property "memory size" "256MB" (id 17) (at 177.8 127 0)
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+ )
+ (property "memory type" "RAM,SDRAM" (id 18) (at 177.8 124.46 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "min supply voltage" "1.283V" (id 19) (at 177.8 121.92 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "mouser part number" "340-135814-TRAY" (id 20) (at 177.8 119.38 0)
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "temperature range high" "+95°C" (id 24) (at 177.8 109.22 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
+ )
+ (property "temperature range low" "-40°C" (id 25) (at 177.8 106.68 0)
+ (effects (font (size 1.27 1.27)) (justify left) hide)
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+ (pin "J9" (uuid c8b0de99-09f4-446e-bfc2-d06ff756bd11))
+ (pin "L1" (uuid bf1f9639-9511-4b13-9347-fcc1161c89fc))
+ (pin "L9" (uuid b48f0c97-8793-4d23-861e-4e3a42ae0754))
+ (pin "M7" (uuid fadf47d1-4b6d-4ab0-ae66-751463aa0aea))
+ (pin "T7" (uuid 605092c6-8498-4bf6-b535-2f2d61e20040))
+ )
+
+ (symbol (lib_id "ebaz4205:xc7z010clg400") (at 358.14 30.48 0) (unit 7)
+ (in_bom yes) (on_board yes)
+ (uuid 77ba32c6-22f6-42dd-a3c1-1f90074b6700)
+ (property "Reference" "U31" (id 0) (at 363.22 24.13 0)
+ (effects (font (size 1.524 1.524)) (justify left))
+ )
+ (property "Value" "XC7Z010-1CLG400I" (id 1) (at 363.22 26.67 0)
+ (effects (font (size 1.524 1.524)) (justify left))
+ )
+ (property "Footprint" "" (id 2) (at 363.22 29.21 0)
+ (effects (font (size 1.524 1.524)) (justify left) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 363.22 34.29 0)
+ (effects (font (size 1.524 1.524)) (justify left) hide)
+ )
+ (property "desc" "xc7z010clg400" (id 4) (at 363.22 36.83 0)
+ (effects (font (size 1.524 1.524)) (justify left) hide)
+ )
+ (pin "N2" (uuid 29dd9daa-9eb9-4d69-9138-a3ebec89fdb7))
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+ (pin "M4" (uuid 66f276cb-1c84-4831-9f22-1bece0e7c537))
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+ (pin "L4" (uuid a2251f8f-0e4c-4f70-aee0-6f6e11dffcdc))
+ (pin "K4" (uuid 63ea3164-1964-47ea-a5dc-bca62274b32d))
+ (pin "K1" (uuid f220cb20-da1f-4722-b560-9d6f0c3eeb3e))
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+ (pin "D4" (uuid 4dd3c03c-bc78-4880-a7e3-66ced1e410c9))
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+ (pin "M2" (uuid 4d0a7c3d-9100-4bfa-ae7b-3538bf0ffbc4))
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+ (pin "N1" (uuid f8a1dbf5-d592-4c59-82f7-3c32e52eecf6))
+ (pin "A1" (uuid 2f468cf8-d1a9-48e3-b58b-cf7a0155edb1))
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+ (pin "C3" (uuid 9c61aa0e-6256-4eff-91ec-0339477d721f))
+ (pin "B3" (uuid 5120fe0e-cb5a-4cc5-99cb-e518d4d50f0e))
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+ (pin "D1" (uuid a01b787e-674a-401d-a51e-d1591260c0a1))
+ (pin "C1" (uuid 9294f6b5-4091-4d33-bf39-cc2f68fd5039))
+ (pin "E1" (uuid fce004fb-0498-4356-97f0-5a8fb5683da1))
+ (pin "E2" (uuid c7aa216e-26e0-4199-80b0-103793fcb1af))
+ (pin "E3" (uuid d5077f5f-e28b-4a7b-8210-b8a9e535d5ef))
+ (pin "G3" (uuid c22b0eca-4add-4359-9a20-e6b9831cc85d))
+ (pin "H3" (uuid e238c1c8-7302-424f-9955-a811b7d88d6f))
+ (pin "J3" (uuid 32753d86-15ca-4ad3-9c5e-fe74efd15f3f))
+ (pin "H2" (uuid 62f5a884-d005-4808-afe3-292aae6e75c5))
+ (pin "H1" (uuid cd725f8d-ccd7-4dc4-b3e1-8962f1382706))
+ (pin "J1" (uuid c0d8ea61-d8f1-4c9a-8e52-6516c40ff854))
+ (pin "P1" (uuid 8a66a9e4-727a-485d-82ae-e8c0d4f9d121))
+ (pin "P3" (uuid 50b0ccd1-33d6-49a2-9384-5c04e5e87001))
+ (pin "R3" (uuid b664c1e0-14ab-4d5a-a624-c8d5e798ce1d))
+ (pin "R1" (uuid b4c3643b-2daa-4422-990d-b640be6b75cc))
+ (pin "T4" (uuid 9eb2ee7e-d019-4b6b-8fbf-e8a653e90de0))
+ (pin "U4" (uuid 308c5df1-3faf-4b62-863b-bb36a3d1c8ee))
+ (pin "U2" (uuid 163c7d56-92c8-425f-aac9-5a80b9b45f12))
+ (pin "U3" (uuid 80e65801-ea6a-4152-a87b-5007165a2974))
+ (pin "V1" (uuid 49f7064b-b861-47ea-bbfc-008c8a6f2234))
+ (pin "Y3" (uuid 1d8dee31-d0b4-46f9-b315-eaa46cf88c74))
+ (pin "W1" (uuid fef085c7-8131-4e49-875f-6fea18f277e1))
+ (pin "Y4" (uuid e8ab136b-63c6-46d4-9b0d-11e6cdfb454e))
+ (pin "Y2" (uuid 341bc2a9-f1c6-4080-82dd-3290e0e14b93))
+ (pin "W3" (uuid 32eaaab1-baa4-41f1-b65b-9392ce49ae41))
+ (pin "V2" (uuid 548e50de-6210-4487-acff-7760e48b8418))
+ (pin "V3" (uuid 9fe5a9ee-8325-489c-a323-cf2e39411716))
+ (pin "B2" (uuid cf408f98-e4e3-438d-bc8c-e51331a99fe1))
+ (pin "F2" (uuid 54ce240d-b004-4885-842b-ab3958ee3a8f))
+ (pin "T2" (uuid 232f6386-407e-4c0e-8ac6-c89612fb7387))
+ (pin "W4" (uuid 77ef2872-d281-4c4a-853a-257f5dd70786))
+ (pin "C2" (uuid 9414499b-b95c-4878-8b28-db801a4632b4))
+ (pin "G2" (uuid 4ccf6629-8d4d-4cc3-bbc8-98cf747ed675))
+ (pin "R2" (uuid 9c833f44-7b64-4d09-9dd6-0425c2ea3713))
+ (pin "W5" (uuid ccc7f9a1-385d-4fee-b042-9a1031121819))
+ (pin "B4" (uuid 05ef9f2f-b523-4af2-b6a0-cf77bb414ee2))
+ (pin "N5" (uuid e36958fe-dcb8-43e6-b70a-990311667653))
+ (pin "P4" (uuid d7f7ca04-4e78-4abe-ba82-b550c9f8b621))
+ (pin "H6" (uuid 0244f9d5-ee51-4380-8d7c-cb14d1fdf96c))
+ (pin "P6" (uuid 4a41d2f3-ca2b-4280-972c-56b580d1d7d7))
+ (pin "G5" (uuid dcafae42-454f-4978-973c-01c8799c39e8))
+ (pin "H5" (uuid 381b6383-f4cd-4217-8f0b-355cc05abf7a))
+ (pin "M5" (uuid fdae8ebb-a767-46be-8185-d051469fea17))
+ (pin "A3" (uuid 0505ce7f-10bf-4a2b-b933-d81713e91ce8))
+ (pin "D2" (uuid 7668de7b-d3c1-4235-9241-70e342172b17))
+ (pin "E5" (uuid 8d552144-2045-4b64-a4a9-2dd5ae8b9ede))
+ (pin "G1" (uuid 8d62d2b6-c5b7-4f15-b30d-9e6c6db2241e))
+ (pin "H4" (uuid 97b16dff-cb56-4a65-bf69-ffeef9c4b111))
+ (pin "L3" (uuid aed8ee79-814d-4631-a39c-14b617a98f77))
+ (pin "P2" (uuid 5d22b4a0-1b03-4685-8f5d-fd4c39d1ff40))
+ (pin "R5" (uuid 7dd2d468-1dcf-4d40-9d9e-d1e0e2ff4afc))
+ (pin "U1" (uuid 9c5935fe-9c10-45d4-a185-a9706465e39c))
+ (pin "V4" (uuid 8142492f-140b-451a-8d1e-7b40246b7b18))
+ )
+)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Phy-Sun.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Phy-Sun.kicad_sch
new file mode 100644
index 0000000..27a86bf
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Phy-Sun.kicad_sch
@@ -0,0 +1,5937 @@
+(kicad_sch (version 20210126) (generator eeschema)
+
+ (paper "A3")
+
+ (title_block
+ (title "EBAZ4205 Schematic rebuild.")
+ (date "2021-02-15")
+ (rev "V004")
+ (comment 1 "Some schematic symbols have been eeditted to clear DRC errors")
+ (comment 2 "Extra PWR_FLAGS have been added to clear DRC errors")
+ (comment 3 "Kicad does not allow refs like RxxxA some some devices have been renumbered")
+ )
+
+ (lib_symbols
+ (symbol "Connector_Generic:Conn_02x07_Odd_Even" (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
+ (property "Reference" "J" (id 0) (at 1.27 10.16 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Value" "Conn_02x07_Odd_Even" (id 1) (at 1.27 -10.16 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Footprint" "" (id 2) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "connector" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Generic connector, double row, 02x07, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "Connector*:*_2x??_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "Conn_02x07_Odd_Even_1_1"
+ (rectangle (start -1.27 -4.953) (end 0 -5.207)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -7.493) (end 0 -7.747)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -2.413) (end 0 -2.667)
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+ (property "Value" "RJ45" (id 1) (at 99.06 85.979 0)
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+ (pin "10" (uuid 22758d26-92e3-444b-a778-76fa62285f66))
+ (pin "11" (uuid 3cee5910-1013-4a9c-8589-8f1beb21df50))
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+ (pin "9" (uuid 412c9a94-c5eb-4808-bfb9-e0347d78cba6))
+ )
+
+ (symbol (lib_id "ebaz4205:HST-0041SAR") (at 173.355 98.933 180) (unit 1)
+ (in_bom yes) (on_board yes)
+ (uuid 2931f120-53fa-49e1-b157-9320fb7338dc)
+ (property "Reference" "T6" (id 0) (at 173.355 118.618 0))
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+ (pin "12" (uuid 79459b95-fe21-410d-84b0-b3bb4d746aae))
+ )
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+ (symbol (lib_name "ebaz4205:IP101GA_1") (lib_id "ebaz4205:IP101GA") (at 137.16 60.579 0) (unit 1)
+ (in_bom yes) (on_board yes)
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+ )
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+ (symbol (lib_id "ebaz4205:IP101GA") (at 267.97 112.649 0) (unit 3)
+ (in_bom yes) (on_board yes)
+ (uuid 33c92f90-e5bd-40dd-8fb0-c583dd5220a5)
+ (property "Reference" "U24" (id 0) (at 267.97 70.739 0))
+ (property "Value" "IP101GA" (id 1) (at 267.97 73.279 0))
+ (property "Footprint" "" (id 2) (at 257.81 124.079 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (pin "34" (uuid a381a3e4-57a6-4495-a078-462c05662bbd))
+ )
+
+ (symbol (lib_id "ebaz4205:IP101GA") (at 344.17 75.819 0) (unit 2)
+ (in_bom yes) (on_board yes)
+ (uuid 7306240e-9ec7-4a40-bb11-bdd9d3c83dee)
+ (property "Reference" "U24" (id 0) (at 344.17 33.909 0))
+ (property "Value" "IP101GA" (id 1) (at 344.17 36.449 0))
+ (property "Footprint" "" (id 2) (at 334.01 87.249 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "7" (uuid 8678f1ee-84b7-49a3-b0a0-e72b8889ab54))
+ (pin "16" (uuid d5a5595d-9991-4c0a-967a-675f9e56172c))
+ (pin "1" (uuid 3fa6c90c-f117-459a-a87e-a1afe2cca13f))
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+ (pin "25" (uuid cae018d4-75d6-44fb-8c3f-67f1d46dcb65))
+ (pin "26" (uuid a6a3d6a5-0d59-4c09-93ff-4524e31a4c8b))
+ (pin "27" (uuid 7d3841e3-5751-4879-976b-9429b8568259))
+ (pin "42" (uuid d07718be-720e-4b5c-ad13-f0543f571bf9))
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+ (pin "48" (uuid 3bcfd5fe-0b43-487f-b004-2c093c2dce1b))
+ )
+)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/README.md b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/README.md
new file mode 100644
index 0000000..bf74676
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/README.md
@@ -0,0 +1,21 @@
+# Please note
+
+At the time of writing (Jan, 2021) you require a nightly build of KiCad to be able to view this PCB / schematic.
+
+Once KiCad v6 lands, you will be able to use stable versions.
+
+Nightly version was required because the significantly improved Altium PCB importer (bundled within pcbnew, not a standalone tool)
+isn't available in the stable builds yet.
+
+KiCad schematic capture (eeschema) has also switched to a new file format (s-expr),
+for which it was significantly easier to write a schematic generation tool (https://github.com/tpecar/nl2sch).
+
+## Getting KiCad nightly
+
+If you're on Windows, CERN provides pre-built binaries (see bottom of page for latest version)
+
+https://kicad-downloads.s3.cern.ch/index.html?prefix=windows/nightly/
+
+For Linux it depends on the distribution - for Ubuntu/Debian, the instructions are provided on the KiCad page
+
+https://kicad.org/download/ubuntu/#_nightly_development_builds
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_IO.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_IO.kicad_sch
new file mode 100644
index 0000000..aafda97
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_IO.kicad_sch
@@ -0,0 +1,5752 @@
+(kicad_sch (version 20210126) (generator eeschema)
+
+ (paper "A3")
+
+ (title_block
+ (title "EBAZ4205 Schematic rebuild.")
+ (date "2021-02-15")
+ (rev "V004")
+ (comment 1 "Some schematic symbols have been eeditted to clear DRC errors")
+ (comment 2 "Extra PWR_FLAGS have been added to clear DRC errors")
+ (comment 3 "Kicad does not allow refs like RxxxA some some devices have been renumbered")
+ )
+
+ (lib_symbols
+ (symbol "Connector_Generic:Conn_02x10_Odd_Even" (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
+ (property "Reference" "J" (id 0) (at 1.27 12.7 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Value" "Conn_02x10_Odd_Even" (id 1) (at 1.27 -15.24 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Footprint" "" (id 2) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_keywords" "connector" (id 4) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_description" "Generic connector, double row, 02x10, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)" (id 5) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "ki_fp_filters" "Connector*:*_2x??_*" (id 6) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "Conn_02x10_Odd_Even_1_1"
+ (rectangle (start -1.27 -4.953) (end 0 -5.207)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -7.493) (end 0 -7.747)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -10.033) (end 0 -10.287)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -12.573) (end 0 -12.827)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 -2.413) (end 0 -2.667)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 2.667) (end 0 2.413)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 5.207) (end 0 4.953)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 7.747) (end 0 7.493)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 10.287) (end 0 10.033)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (rectangle (start -1.27 11.43) (end 3.81 -13.97)
+ (stroke (width 0.254)) (fill (type background))
+ )
+ (rectangle (start -1.27 0.127) (end 0 -0.127)
+ (stroke (width 0.1524)) (fill (type none))
+ )
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+ )
+ (rectangle (start 3.81 2.667) (end 2.54 2.413)
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+ (stroke (width 0.1524)) (fill (type none))
+ )
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+ (stroke (width 0.1524)) (fill (type none))
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+ (rectangle (start 3.81 10.287) (end 2.54 10.033)
+ (stroke (width 0.1524)) (fill (type none))
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+ (rectangle (start 3.81 0.127) (end 2.54 -0.127)
+ (stroke (width 0.1524)) (fill (type none))
+ )
+ (pin passive line (at -5.08 10.16 0) (length 3.81)
+ (name "Pin_1" (effects (font (size 1.27 1.27))))
+ (number "1" (effects (font (size 1.27 1.27))))
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+ (pin passive line (at 7.62 0 180) (length 3.81)
+ (name "Pin_10" (effects (font (size 1.27 1.27))))
+ (number "10" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -2.54 0) (length 3.81)
+ (name "Pin_11" (effects (font (size 1.27 1.27))))
+ (number "11" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 7.62 -2.54 180) (length 3.81)
+ (name "Pin_12" (effects (font (size 1.27 1.27))))
+ (number "12" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -5.08 0) (length 3.81)
+ (name "Pin_13" (effects (font (size 1.27 1.27))))
+ (number "13" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 7.62 -5.08 180) (length 3.81)
+ (name "Pin_14" (effects (font (size 1.27 1.27))))
+ (number "14" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -7.62 0) (length 3.81)
+ (name "Pin_15" (effects (font (size 1.27 1.27))))
+ (number "15" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 7.62 -7.62 180) (length 3.81)
+ (name "Pin_16" (effects (font (size 1.27 1.27))))
+ (number "16" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -10.16 0) (length 3.81)
+ (name "Pin_17" (effects (font (size 1.27 1.27))))
+ (number "17" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 7.62 -10.16 180) (length 3.81)
+ (name "Pin_18" (effects (font (size 1.27 1.27))))
+ (number "18" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 -12.7 0) (length 3.81)
+ (name "Pin_19" (effects (font (size 1.27 1.27))))
+ (number "19" (effects (font (size 1.27 1.27))))
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+ (pin passive line (at 7.62 10.16 180) (length 3.81)
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+ (number "2" (effects (font (size 1.27 1.27))))
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+ (number "20" (effects (font (size 1.27 1.27))))
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+ (number "3" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at 7.62 7.62 180) (length 3.81)
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+ (pin passive line (at -5.08 5.08 0) (length 3.81)
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+ (number "6" (effects (font (size 1.27 1.27))))
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+ (pin passive line (at -5.08 2.54 0) (length 3.81)
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+ (number "7" (effects (font (size 1.27 1.27))))
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+ (pin passive line (at 7.62 2.54 180) (length 3.81)
+ (name "Pin_8" (effects (font (size 1.27 1.27))))
+ (number "8" (effects (font (size 1.27 1.27))))
+ )
+ (pin passive line (at -5.08 0 0) (length 3.81)
+ (name "Pin_9" (effects (font (size 1.27 1.27))))
+ (number "9" (effects (font (size 1.27 1.27))))
+ )
+ )
+ )
+ (symbol "Device:C" (pin_numbers hide) (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
+ (property "Reference" "C" (id 0) (at 0.635 2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "C" (id 1) (at 0.635 -2.54 0)
+ (effects (font (size 1.27 1.27)) (justify left))
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+ (property "Footprint" "" (id 2) (at 0.9652 -3.81 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Datasheet" "~" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (effects (font (size 1.27 1.27)) hide)
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+ )
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_Pwr.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_Pwr.kicad_sch
new file mode 100644
index 0000000..2ac487c
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/Zynq_Pwr.kicad_sch
@@ -0,0 +1,6280 @@
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/blank.kicad_wks b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/blank.kicad_wks
new file mode 100644
index 0000000..4fc330a
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/blank.kicad_wks
@@ -0,0 +1,20 @@
+(page_layout
+ (setup
+ (textsize 1.500000 1.500000)
+ (textlinewidth 0.150000)
+ (linewidth 0.150000)
+ (left_margin 8.000000)
+ (right_margin 5.000000)
+ (top_margin 5.000000)
+ (bottom_margin 5.000000)
+ )
+ (line
+ (comment "")
+ (linewidth 0.000000)
+ (start 0.000000 0.000000)
+ (end 0.000000 0.000000)
+ (repeat 1)
+ (incrx 0.000000)
+ (incry 0.000000)
+ )
+)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pcb b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pcb
new file mode 100644
index 0000000..418f1a0
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pcb
@@ -0,0 +1,129321 @@
+(kicad_pcb (version 20210126) (generator pcbnew)
+
+ (general
+ (thickness 1.12236)
+ )
+
+ (paper "A4")
+ (layers
+ (0 "F.Cu" signal "Top Layer")
+ (1 "In1.Cu" signal "MidLayer1")
+ (2 "In2.Cu" signal "MidLayer2")
+ (31 "B.Cu" signal "Bottom Layer")
+ (32 "B.Adhes" user "B.Adhesive")
+ (33 "F.Adhes" user "F.Adhesive")
+ (34 "B.Paste" user "Bottom Paste")
+ (35 "F.Paste" user "Top Paste")
+ (36 "B.SilkS" user "Bottom Overlay")
+ (37 "F.SilkS" user "Top Overlay")
+ (38 "B.Mask" user "Bottom Solder")
+ (39 "F.Mask" user "Top Solder")
+ (40 "Dwgs.User" user "Mechanical 10")
+ (41 "Cmts.User" user "User.Comments")
+ (42 "Eco1.User" user "Mechanical 11")
+ (43 "Eco2.User" user "Mechanical 12")
+ (44 "Edge.Cuts" user)
+ (45 "Margin" user)
+ (46 "B.CrtYd" user "Mechanical 16")
+ (47 "F.CrtYd" user "Mechanical 15")
+ (48 "B.Fab" user "Mechanical 14")
+ (49 "F.Fab" user "Mechanical 13")
+ (50 "User.1" user "Mechanical 1")
+ (51 "User.2" user "Mechanical 2")
+ (52 "User.3" user "Mechanical 3")
+ (53 "User.4" user "Mechanical 4")
+ (54 "User.5" user "Mechanical 5")
+ (55 "User.6" user "Mechanical 6")
+ (56 "User.7" user "Mechanical 7")
+ (57 "User.8" user "Mechanical 8")
+ (58 "User.9" user "Mechanical 9")
+ )
+
+ (setup
+ (stackup
+ (layer "F.SilkS" (type "Top Silk Screen"))
+ (layer "F.Paste" (type "Top Solder Paste"))
+ (layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
+ (layer "F.Cu" (type "copper") (thickness 0.03556))
+ (layer "dielectric 1" (type "core") (thickness 0.32004) (material "FR-4") (epsilon_r 4.8) (loss_tangent 0.02))
+ (layer "In1.Cu" (type "copper") (thickness 0.03556))
+ (layer "dielectric 2" (type "prepreg") (thickness 0.32004) (material "FR-4") (epsilon_r 4.8) (loss_tangent 0.02))
+ (layer "In2.Cu" (type "copper") (thickness 0.03556))
+ (layer "dielectric 3" (type "core") (thickness 0.32004) (material "FR-4") (epsilon_r 4.8) (loss_tangent 0.02))
+ (layer "B.Cu" (type "copper") (thickness 0.03556))
+ (layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
+ (layer "B.Paste" (type "Bottom Solder Paste"))
+ (layer "B.SilkS" (type "Bottom Silk Screen"))
+ (copper_finish "None")
+ (dielectric_constraints no)
+ )
+ (aux_axis_origin 35.3283 201.755899)
+ (grid_origin 35.3283 201.755899)
+ (pcbplotparams
+ (layerselection 0x00010fc_ffffffff)
+ (disableapertmacros false)
+ (usegerberextensions false)
+ (usegerberattributes true)
+ (usegerberadvancedattributes true)
+ (creategerberjobfile true)
+ (svguseinch false)
+ (svgprecision 6)
+ (excludeedgelayer true)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15.000000)
+ (dxfpolygonmode true)
+ (dxfimperialunits true)
+ (dxfusepcbnewfont true)
+ (psnegative false)
+ (psa4output false)
+ (plotreference true)
+ (plotvalue true)
+ (plotinvisibletext false)
+ (sketchpadsonfab false)
+ (subtractmaskfromsilk false)
+ (outputformat 1)
+ (mirror false)
+ (drillshape 1)
+ (scaleselection 1)
+ (outputdirectory "")
+ )
+ )
+
+
+ (net 0 "")
+ (net 1 "Net-(C69-Pad1)")
+ (net 2 "Net-(C71-Pad2)")
+ (net 3 "PS-DDR-A11_0")
+ (net 4 "Net-(C73-Pad2)")
+ (net 5 "U31-TDI_0")
+ (net 6 "Net-(C294-Pad2)")
+ (net 7 "Net-(C295-Pad1)")
+ (net 8 "Net-(C295-Pad2)")
+ (net 9 "Net-(C304-Pad2)")
+ (net 10 "Net-(C305-Pad2)")
+ (net 11 "Net-(C327-Pad1)")
+ (net 12 "PS-DDR-A9_0")
+ (net 13 "PS-DDR-BA2_0")
+ (net 14 "U31-TMS_0")
+ (net 15 "Net-(C333-Pad2)")
+ (net 16 "GNDADC_0")
+ (net 17 "PS-DDR-A8_0")
+ (net 18 "PS-DDR-A1_0")
+ (net 19 "PS-DDR-A3_0")
+ (net 20 "PS-DDR-A7_0")
+ (net 21 "VCCB")
+ (net 22 "VCC")
+ (net 23 "Net-(C334-Pad2)")
+ (net 24 "PS-DDR-A5_0")
+ (net 25 "PS-DDR-A6_0")
+ (net 26 "PS-DDR-BA0_0")
+ (net 27 "Net-(C362-Pad2)")
+ (net 28 "Net-(C366-Pad1)")
+ (net 29 "VCCO")
+ (net 30 "PS-DDR-WE_0")
+ (net 31 "PS-DDR-A4_0")
+ (net 32 "PS-DDR-A2_0")
+ (net 33 "VP1_0")
+ (net 34 "Net-(C372-Pad1)")
+ (net 35 "PS-DDR-ODT_0")
+ (net 36 "RESET.1")
+ (net 37 "PS-DDR-CKE_0")
+ (net 38 "PS-DDR-A0_0")
+ (net 39 "PS-DDR-CS_0")
+ (net 40 "Net-(C377-Pad2)")
+ (net 41 "PS-DDR-CAS_0")
+ (net 42 "PS-DDR-RAS_0")
+ (net 43 "Net-(C380-Pad1)")
+ (net 44 "Net-(C386-Pad1)")
+ (net 45 "Net-(C393-Pad1)")
+ (net 46 "PS-DDR-BA1_0")
+ (net 47 "VCCE")
+ (net 48 "Net-(C393-Pad2)")
+ (net 49 "XOUT.0_0")
+ (net 50 "Net-(C395-Pad2)")
+ (net 51 "U3.U12_0")
+ (net 52 "Net-(C400-Pad1)")
+ (net 53 "U3.V12_0")
+ (net 54 "U31.W20_0")
+ (net 55 "Net-(C400-Pad2)")
+ (net 56 "U3.W14_0")
+ (net 57 "U3.W13_0")
+ (net 58 "Net-(C402-Pad1)")
+ (net 59 "Net-(C625-Pad1)")
+ (net 60 "Net-(C628-Pad1)")
+ (net 61 "Net-(C659-Pad2)")
+ (net 62 "Net-(C660-Pad2)")
+ (net 63 "Net-(C1985-Pad1)")
+ (net 64 "Net-(C2285-Pad2)")
+ (net 65 "Net-(C2300-Pad2)")
+ (net 66 "GNDA")
+ (net 67 "Net-(C2303-Pad1)")
+ (net 68 "Net-(C2349-Pad2)")
+ (net 69 "Net-(C2400-Pad2)")
+ (net 70 "Net-(C2410-Pad2)")
+ (net 71 "Net-(C9997-Pad1)")
+ (net 72 "U3.F.15_0")
+ (net 73 "Net-(C9997-Pad2)")
+ (net 74 "Net-(D21-Pad2)")
+ (net 75 "Net-(D22-Pad2)")
+ (net 76 "Net-(D23-Pad2)")
+ (net 77 "Net-(DATA1-Pad5)")
+ (net 78 "Net-(DATA1-Pad6)")
+ (net 79 "Net-(DATA1-Pad7)")
+ (net 80 "Net-(DATA1-Pad8)")
+ (net 81 "Net-(DATA1-Pad9)")
+ (net 82 "unconnected-(DATA1-Pad10)")
+ (net 83 "Net-(DATA1-Pad11)")
+ (net 84 "Net-(DATA1-Pad13)")
+ (net 85 "Net-(DATA1-Pad14)")
+ (net 86 "Net-(DATA1-Pad15)")
+ (net 87 "Net-(DATA1-Pad16)")
+ (net 88 "Net-(DATA1-Pad17)")
+ (net 89 "Net-(DATA1-Pad18)")
+ (net 90 "Net-(DATA1-Pad19)")
+ (net 91 "Net-(DATA1-Pad20)")
+ (net 92 "U3.V15_0")
+ (net 93 "DDR-CK_0")
+ (net 94 "Net-(DATA2-Pad5)")
+ (net 95 "Net-(DATA2-Pad6)")
+ (net 96 "Net-(DATA2-Pad7)")
+ (net 97 "Net-(DATA2-Pad8)")
+ (net 98 "VCC6")
+ (net 99 "U31-TCK_0")
+ (net 100 "Net-(DATA2-Pad9)")
+ (net 101 "unconnected-(DATA2-Pad10)")
+ (net 102 "Net-(DATA2-Pad11)")
+ (net 103 "Net-(DATA2-Pad13)")
+ (net 104 "CLK_0")
+ (net 105 "Net-(DATA2-Pad14)")
+ (net 106 "Net-(DATA2-Pad15)")
+ (net 107 "LED.0_0")
+ (net 108 "Net-(DATA2-Pad16)")
+ (net 109 "Net-(DATA2-Pad17)")
+ (net 110 "Net-(DATA2-Pad18)")
+ (net 111 "RXCLK_0")
+ (net 112 "Net-(DATA2-Pad19)")
+ (net 113 "RXD3_0")
+ (net 114 "Net-(DATA2-Pad20)")
+ (net 115 "Net-(DATA3-Pad5)")
+ (net 116 "Net-(DATA3-Pad6)")
+ (net 117 "RXD2_0")
+ (net 118 "Net-(DATA3-Pad7)")
+ (net 119 "RXD1_0")
+ (net 120 "Net-(DATA3-Pad8)")
+ (net 121 "RXD0_0")
+ (net 122 "RXDV_0")
+ (net 123 "Net-(DATA3-Pad9)")
+ (net 124 "TXD3_0")
+ (net 125 "unconnected-(DATA3-Pad10)")
+ (net 126 "Net-(DATA3-Pad11)")
+ (net 127 "TXD1_0")
+ (net 128 "Net-(DATA3-Pad13)")
+ (net 129 "Net-(DATA3-Pad14)")
+ (net 130 "TXCLK_0")
+ (net 131 "Net-(DATA3-Pad15)")
+ (net 132 "TXD0_0")
+ (net 133 "Net-(DATA3-Pad16)")
+ (net 134 "TXD2_0")
+ (net 135 "Net-(DATA3-Pad17)")
+ (net 136 "Net-(DATA3-Pad18)")
+ (net 137 "TXEN_0")
+ (net 138 "Net-(DATA3-Pad19)")
+ (net 139 "Net-(DATA3-Pad20)")
+ (net 140 "Net-(J3-Pad3)")
+ (net 141 "DATA3-19_0")
+ (net 142 "Net-(J4-Pad1)")
+ (net 143 "DATA3-17_0")
+ (net 144 "Net-(J5-Pad3)")
+ (net 145 "DATA3-15_0")
+ (net 146 "Net-(J7-Pad4)")
+ (net 147 "Net-(J8-Pad2)")
+ (net 148 "DATA3-13_0")
+ (net 149 "Net-(J8-Pad4)")
+ (net 150 "DATA3-11_0")
+ (net 151 "Net-(J8-Pad6)")
+ (net 152 "Net-(J8-Pad8)")
+ (net 153 "DATA3-8_0")
+ (net 154 "Net-(J8-Pad10)")
+ (net 155 "DATA3-6_0")
+ (net 156 "unconnected-(J8-Pad12)")
+ (net 157 "DATA2-19_0")
+ (net 158 "unconnected-(J8-Pad14)")
+ (net 159 "Net-(LED1-Pad2)")
+ (net 160 "DATA2-17_0")
+ (net 161 "Net-(LED4-Pad2)")
+ (net 162 "DATA2-15_0")
+ (net 163 "Net-(LED6-Pad1)")
+ (net 164 "Net-(LED6-Pad2)")
+ (net 165 "DATA2-13_0")
+ (net 166 "Net-(R117-Pad1)")
+ (net 167 "DATA2-11_0")
+ (net 168 "Net-(R117-Pad2)")
+ (net 169 "Net-(R120-Pad1)")
+ (net 170 "VCCA")
+ (net 171 "DATA2-8_0")
+ (net 172 "Net-(R120-Pad2)")
+ (net 173 "DATA2-6_0")
+ (net 174 "Net-(R122-Pad1)")
+ (net 175 "DATA1-19_0")
+ (net 176 "Net-(R122-Pad2)")
+ (net 177 "Net-(R166-Pad1)")
+ (net 178 "DATA1-17_0")
+ (net 179 "Net-(R244-Pad2)")
+ (net 180 "DATA1-15_0")
+ (net 181 "Net-(R245-Pad2)")
+ (net 182 "Net-(R246-Pad2)")
+ (net 183 "DATA1-13_0")
+ (net 184 "Net-(R247-Pad2)")
+ (net 185 "DATA1-11_0")
+ (net 186 "Net-(R248-Pad2)")
+ (net 187 "DATA1-8_0")
+ (net 188 "Net-(R277-Pad2)")
+ (net 189 "Net-(R1333-Pad2)")
+ (net 190 "DATA1-6_0")
+ (net 191 "Net-(R1344-Pad1)")
+ (net 192 "Net-(R1346-Pad1)")
+ (net 193 "DATA3-20_0")
+ (net 194 "RY{slash}#BY_0")
+ (net 195 "DATA3-18_0")
+ (net 196 "Net-(R1360-Pad1)")
+ (net 197 "DATA3-16_0")
+ (net 198 "Net-(R1361-Pad1)")
+ (net 199 "DATA3-14_0")
+ (net 200 "DDR-CK#_0")
+ (net 201 "Net-(R1363-Pad1)")
+ (net 202 "Net-(R1372-Pad1)")
+ (net 203 "Net-(R1372-Pad2)")
+ (net 204 "DATA3-9_0")
+ (net 205 "Net-(R1381-Pad2)")
+ (net 206 "DATA3-7_0")
+ (net 207 "Net-(R1384-Pad1)")
+ (net 208 "DATA3-5_0")
+ (net 209 "Net-(R1384-Pad2)")
+ (net 210 "DATA2-20_0")
+ (net 211 "Net-(R1385-Pad2)")
+ (net 212 "DATA2-18_0")
+ (net 213 "Net-(R1386-Pad2)")
+ (net 214 "Net-(R1388-Pad2)")
+ (net 215 "Net-(R1391-Pad2)")
+ (net 216 "DATA2-16_0")
+ (net 217 "Net-(R1392-Pad2)")
+ (net 218 "DATA2-14_0")
+ (net 219 "Net-(R1393-Pad1)")
+ (net 220 "DATA2-9_0")
+ (net 221 "Net-(R1394-Pad2)")
+ (net 222 "DATA2-7_0")
+ (net 223 "Net-(R1396-Pad1)")
+ (net 224 "DATA2-5_0")
+ (net 225 "Net-(R1397-Pad2)")
+ (net 226 "Net-(R1400-Pad2)")
+ (net 227 "Net-(R1401-Pad2)")
+ (net 228 "DATA1-20_0")
+ (net 229 "Net-(R1404-Pad2)")
+ (net 230 "DATA1-18_0")
+ (net 231 "Net-(R1405-Pad2)")
+ (net 232 "DATA1-16_0")
+ (net 233 "Net-(R1406-Pad2)")
+ (net 234 "DATA1-14_0")
+ (net 235 "Net-(R1407-Pad2)")
+ (net 236 "U3.A17_0")
+ (net 237 "DATA1-9_0")
+ (net 238 "Net-(R1408-Pad2)")
+ (net 239 "Net-(R1409-Pad2)")
+ (net 240 "DATA1-7_0")
+ (net 241 "Net-(R1410-Pad2)")
+ (net 242 "DATA1-5_0")
+ (net 243 "Net-(R1411-Pad2)")
+ (net 244 "U12-IO1_0")
+ (net 245 "U12-IO2_0")
+ (net 246 "Net-(R1414-Pad1)")
+ (net 247 "Net-(R1417-Pad2)")
+ (net 248 "Net-(R1420-Pad1)")
+ (net 249 "Net-(R1481-Pad1)")
+ (net 250 "Net-(R1482-Pad1)")
+ (net 251 "Net-(R1493-Pad1)")
+ (net 252 "Net-(R1494-Pad1)")
+ (net 253 "U31-N16_0")
+ (net 254 "Net-(R1495-Pad1)")
+ (net 255 "Net-(R1496-Pad1)")
+ (net 256 "Net-(R1500-Pad1)")
+ (net 257 "U31-L14_0")
+ (net 258 "Net-(R1502-Pad1)")
+ (net 259 "Net-(R1503-Pad1)")
+ (net 260 "Net-(R1948-Pad2)")
+ (net 261 "U3.A.16_0")
+ (net 262 "Net-(R2336-Pad1)")
+ (net 263 "Net-(R2340-Pad2)")
+ (net 264 "Net-(R2389-Pad1)")
+ (net 265 "RESET.0")
+ (net 266 "Net-(R2430-Pad1)")
+ (net 267 "Net-(R2432-Pad1)")
+ (net 268 "unconnected-(R2434-Pad1)")
+ (net 269 "Net-(R2434-Pad2)")
+ (net 270 "unconnected-(R2435-Pad1)")
+ (net 271 "Net-(R2435-Pad2)")
+ (net 272 "Net-(R2436-Pad1)")
+ (net 273 "Net-(R2437-Pad2)")
+ (net 274 "unconnected-(R2441-Pad1)")
+ (net 275 "Net-(R2441-Pad2)")
+ (net 276 "unconnected-(R2442-Pad1)")
+ (net 277 "REST.ON_0")
+ (net 278 "MDC_0")
+ (net 279 "Net-(R2442-Pad2)")
+ (net 280 "U3.A14_0")
+ (net 281 "GND")
+ (net 282 "unconnected-(R2443-Pad1)")
+ (net 283 "Net-(R2443-Pad2)")
+ (net 284 "LED3_0")
+ (net 285 "REGOUT")
+ (net 286 "U12-IO7_0")
+ (net 287 "U12-IO6_0")
+ (net 288 "U12-IO5_0")
+ (net 289 "U12-IO4_0")
+ (net 290 "U12-IO3_0")
+ (net 291 "U12-IO0_0")
+ (net 292 "Net-(R2444-Pad1)")
+ (net 293 "unconnected-(R2444-Pad2)")
+ (net 294 "U3.V13_0")
+ (net 295 "#WE_0")
+ (net 296 "ALE_0")
+ (net 297 "CLE_0")
+ (net 298 "#CE_0")
+ (net 299 "#RE_0")
+ (net 300 "Net-(R2445-Pad1)")
+ (net 301 "Net-(R2445-Pad2)")
+ (net 302 "Net-(R2446-Pad1)")
+ (net 303 "unconnected-(R2446-Pad2)")
+ (net 304 "Net-(R2447-Pad1)")
+ (net 305 "unconnected-(R2447-Pad2)")
+ (net 306 "Net-(R2455-Pad1)")
+ (net 307 "Net-(R2456-Pad1)")
+ (net 308 "Net-(R2457-Pad2)")
+ (net 309 "REGOUT.0")
+ (net 310 "U3.A.9_0")
+ (net 311 "U3.E.12_0")
+ (net 312 "U3.D.14_0")
+ (net 313 "U3.C.17_0")
+ (net 314 "U3.A.12_0")
+ (net 315 "U3.B.15_0")
+ (net 316 "U3.F13_0")
+ (net 317 "DDR-A8_0")
+ (net 318 "DDR-A14_0")
+ (net 319 "Net-(R2461-Pad2)")
+ (net 320 "DDR-A13_0")
+ (net 321 "DDR-RESET_0")
+ (net 322 "DDR-A6_0")
+ (net 323 "DDR-A11_0")
+ (net 324 "DDR-A9_0")
+ (net 325 "Net-(R2462-Pad2)")
+ (net 326 "DDR-A7_0")
+ (net 327 "DDR-A4_0")
+ (net 328 "DDR-A1_0")
+ (net 329 "DDR-A2_0")
+ (net 330 "DDR-A5_0")
+ (net 331 "DDR-BA1_0")
+ (net 332 "DDR-A12_0")
+ (net 333 "DDR-A0_0")
+ (net 334 "DDR-A3_0")
+ (net 335 "Net-(R2463-Pad2)")
+ (net 336 "GND3")
+ (net 337 "DDR-BA2_0")
+ (net 338 "DDR-BA0_0")
+ (net 339 "Net-(R2464-Pad2)")
+ (net 340 "DDR-A10_0")
+ (net 341 "DDR-WE_0")
+ (net 342 "DDR-CS_0")
+ (net 343 "Net-(R2465-Pad2)")
+ (net 344 "DDR-CKE_0")
+ (net 345 "DDR-CAS_0")
+ (net 346 "DDR-ODT_0")
+ (net 347 "VCC8")
+ (net 348 "DDR-RAS_0")
+ (net 349 "Net-(R2466-Pad2)")
+ (net 350 "Net-(R2468-Pad1)")
+ (net 351 "VCC-DDR")
+ (net 352 "U31-A15_0")
+ (net 353 "Net-(R2539-Pad2)")
+ (net 354 "Net-(R2540-Pad1)")
+ (net 355 "Net-(R2543-Pad1)")
+ (net 356 "Net-(R2545-Pad2)")
+ (net 357 "PS-DDR-A13_0")
+ (net 358 "VCC1")
+ (net 359 "U31-D13_0")
+ (net 360 "PS-DDR-A12_0")
+ (net 361 "Net-(R2547-Pad2)")
+ (net 362 "Net-(R2551-Pad2)")
+ (net 363 "Net-(R2605-Pad1)")
+ (net 364 "PS-DDR-A14_0")
+ (net 365 "PS-DDR-A10_0")
+ (net 366 "U31-TDO_0")
+ (net 367 "Net-(R2608-Pad1)")
+ (net 368 "Net-(R2609-Pad1)")
+ (net 369 "VCCP")
+ (net 370 "IN")
+ (net 371 "DDR-DQ13_0")
+ (net 372 "DDR-DQ15_0")
+ (net 373 "DDR-DQ12_0")
+ (net 374 "DDR-UDQS#_0")
+ (net 375 "DDR-DQ14_0")
+ (net 376 "DDR-DQ11_0")
+ (net 377 "DDR-DQ9_0")
+ (net 378 "DDR-UDQS_0")
+ (net 379 "DDR-DQ10_0")
+ (net 380 "DDR-UDM_0")
+ (net 381 "DDR-DQ8_0")
+ (net 382 "DDR-DQ0_0")
+ (net 383 "DDR-LDM_0")
+ (net 384 "DDR-DQ2_0")
+ (net 385 "DDR-LDQS_0")
+ (net 386 "DDR-DQ1_0")
+ (net 387 "DDR-DQ3_0")
+ (net 388 "DDR-DQ6_0")
+ (net 389 "DDR-LDQS#_0")
+ (net 390 "DDR-DQ4_0")
+ (net 391 "DDR-DQ7_0")
+ (net 392 "DDR-DQ5_0")
+ (net 393 "Net-(R2615-Pad1)")
+ (net 394 "Net-(R2617-Pad2)")
+ (net 395 "Net-(R2618-Pad2)")
+ (net 396 "Net-(R2619-Pad2)")
+ (net 397 "Net-(R2647-Pad2)")
+ (net 398 "Net-(R3555-Pad2)")
+ (net 399 "Net-(R9995-Pad2)")
+ (net 400 "Net-(R9998-Pad1)")
+ (net 401 "unconnected-(R9998-Pad2)")
+ (net 402 "unconnected-(T6-Pad4)")
+ (net 403 "unconnected-(T6-Pad5)")
+ (net 404 "Net-(T6-Pad9)")
+ (net 405 "Net-(T6-Pad11)")
+ (net 406 "unconnected-(T6-Pad12)")
+ (net 407 "unconnected-(T6-Pad13)")
+ (net 408 "Net-(T6-Pad14)")
+ (net 409 "Net-(T6-Pad16)")
+ (net 410 "unconnected-(U12-Pad1)")
+ (net 411 "unconnected-(U12-Pad2)")
+ (net 412 "unconnected-(U12-Pad3)")
+ (net 413 "unconnected-(U12-Pad4)")
+ (net 414 "unconnected-(U12-Pad5)")
+ (net 415 "unconnected-(U12-Pad6)")
+ (net 416 "unconnected-(U12-Pad10)")
+ (net 417 "unconnected-(U12-Pad11)")
+ (net 418 "unconnected-(U12-Pad14)")
+ (net 419 "unconnected-(U12-Pad15)")
+ (net 420 "unconnected-(U12-Pad20)")
+ (net 421 "unconnected-(U12-Pad21)")
+ (net 422 "unconnected-(U12-Pad22)")
+ (net 423 "unconnected-(U12-Pad23)")
+ (net 424 "unconnected-(U12-Pad24)")
+ (net 425 "unconnected-(U12-Pad26)")
+ (net 426 "unconnected-(U12-Pad27)")
+ (net 427 "unconnected-(U12-Pad28)")
+ (net 428 "unconnected-(U12-Pad33)")
+ (net 429 "unconnected-(U12-Pad35)")
+ (net 430 "unconnected-(U12-Pad40)")
+ (net 431 "unconnected-(U12-Pad45)")
+ (net 432 "unconnected-(U12-Pad46)")
+ (net 433 "unconnected-(U12-Pad47)")
+ (net 434 "unconnected-(U24-Pad1)")
+ (net 435 "unconnected-(U24-Pad27)")
+ (net 436 "unconnected-(U24-Pad32)")
+ (net 437 "unconnected-(U24-Pad37)")
+ (net 438 "unconnected-(U24-Pad38)")
+ (net 439 "unconnected-(U24-Pad39)")
+ (net 440 "unconnected-(U24-Pad40)")
+ (net 441 "unconnected-(U24-Pad41)")
+ (net 442 "unconnected-(U24-Pad44)")
+ (net 443 "unconnected-(U31-PadA7)")
+ (net 444 "unconnected-(U31-PadA10)")
+ (net 445 "unconnected-(U31-PadA11)")
+ (net 446 "unconnected-(U31-PadB9)")
+ (net 447 "unconnected-(U31-PadB17)")
+ (net 448 "unconnected-(U31-PadC8)")
+ (net 449 "unconnected-(U31-PadC10)")
+ (net 450 "unconnected-(U31-PadC11)")
+ (net 451 "unconnected-(U31-PadD10)")
+ (net 452 "unconnected-(U31-PadD11)")
+ (net 453 "unconnected-(U31-PadD15)")
+ (net 454 "unconnected-(U31-PadE14)")
+ (net 455 "unconnected-(U31-PadE17)")
+ (net 456 "unconnected-(U31-PadE18)")
+ (net 457 "unconnected-(U31-PadF14)")
+ (net 458 "unconnected-(U31-PadF16)")
+ (net 459 "unconnected-(U31-PadF17)")
+ (net 460 "unconnected-(U31-PadG14)")
+ (net 461 "unconnected-(U31-PadG15)")
+ (net 462 "unconnected-(U31-PadG17)")
+ (net 463 "unconnected-(U31-PadG18)")
+ (net 464 "unconnected-(U31-PadH15)")
+ (net 465 "unconnected-(U31-PadJ14)")
+ (net 466 "unconnected-(U31-PadJ15)")
+ (net 467 "unconnected-(U31-PadJ16)")
+ (net 468 "unconnected-(U31-PadK14)")
+ (net 469 "unconnected-(U31-PadK16)")
+ (net 470 "unconnected-(U31-PadL15)")
+ (net 471 "unconnected-(U31-PadM14)")
+ (net 472 "unconnected-(U31-PadM15)")
+ (net 473 "unconnected-(U31-PadN15)")
+ (net 474 "unconnected-(U31-PadP1)")
+ (net 475 "unconnected-(U31-PadP3)")
+ (net 476 "unconnected-(U31-PadP14)")
+ (net 477 "unconnected-(U31-PadP15)")
+ (net 478 "unconnected-(U31-PadP16)")
+ (net 479 "unconnected-(U31-PadR1)")
+ (net 480 "unconnected-(U31-PadR2)")
+ (net 481 "unconnected-(U31-PadR3)")
+ (net 482 "unconnected-(U31-PadR14)")
+ (net 483 "unconnected-(U31-PadR16)")
+ (net 484 "unconnected-(U31-PadR17)")
+ (net 485 "unconnected-(U31-PadT1)")
+ (net 486 "unconnected-(U31-PadT2)")
+ (net 487 "unconnected-(U31-PadT4)")
+ (net 488 "unconnected-(U31-PadT5)")
+ (net 489 "unconnected-(U31-PadT9)")
+ (net 490 "unconnected-(U31-PadT10)")
+ (net 491 "unconnected-(U31-PadT11)")
+ (net 492 "unconnected-(U31-PadT12)")
+ (net 493 "unconnected-(U31-PadT14)")
+ (net 494 "unconnected-(U31-PadT15)")
+ (net 495 "unconnected-(U31-PadT16)")
+ (net 496 "unconnected-(U31-PadT17)")
+ (net 497 "unconnected-(U31-PadU2)")
+ (net 498 "unconnected-(U31-PadU3)")
+ (net 499 "unconnected-(U31-PadU4)")
+ (net 500 "unconnected-(U31-PadU5)")
+ (net 501 "unconnected-(U31-PadU7)")
+ (net 502 "unconnected-(U31-PadU8)")
+ (net 503 "unconnected-(U31-PadU9)")
+ (net 504 "unconnected-(U31-PadU10)")
+ (net 505 "unconnected-(U31-PadU17)")
+ (net 506 "unconnected-(U31-PadV1)")
+ (net 507 "unconnected-(U31-PadV2)")
+ (net 508 "unconnected-(U31-PadV3)")
+ (net 509 "unconnected-(U31-PadV5)")
+ (net 510 "unconnected-(U31-PadV6)")
+ (net 511 "unconnected-(U31-PadV7)")
+ (net 512 "unconnected-(U31-PadV8)")
+ (net 513 "unconnected-(U31-PadV10)")
+ (net 514 "unconnected-(U31-PadV11)")
+ (net 515 "unconnected-(U31-PadW1)")
+ (net 516 "unconnected-(U31-PadW3)")
+ (net 517 "unconnected-(U31-PadW4)")
+ (net 518 "unconnected-(U31-PadW5)")
+ (net 519 "unconnected-(U31-PadW6)")
+ (net 520 "unconnected-(U31-PadW8)")
+ (net 521 "unconnected-(U31-PadW9)")
+ (net 522 "unconnected-(U31-PadW10)")
+ (net 523 "unconnected-(U31-PadW11)")
+ (net 524 "unconnected-(U31-PadY1)")
+ (net 525 "unconnected-(U31-PadY2)")
+ (net 526 "unconnected-(U31-PadY3)")
+ (net 527 "unconnected-(U31-PadY4)")
+ (net 528 "unconnected-(U31-PadY6)")
+ (net 529 "unconnected-(U31-PadY7)")
+ (net 530 "unconnected-(U31-PadY8)")
+ (net 531 "unconnected-(U31-PadY9)")
+ (net 532 "unconnected-(U31-PadY11)")
+ (net 533 "unconnected-(U31-PadY12)")
+ (net 534 "unconnected-(U31-PadY13)")
+ (net 535 "unconnected-(U65-Pad5)")
+ (net 536 "unconnected-(U65-Pad6)")
+ (net 537 "unconnected-(U65-Pad8)")
+ (net 538 "unconnected-(U66-PadJ1)")
+ (net 539 "unconnected-(U66-PadJ9)")
+ (net 540 "unconnected-(U66-PadL1)")
+ (net 541 "unconnected-(U66-PadL9)")
+ (net 542 "unconnected-(U66-PadM7)")
+ (net 543 "Net-(X3-Pad2)")
+ (net 544 "unconnected-(Y2-Pad3)")
+ (net 545 "unconnected-(Y2-Pad4)")
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pro b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pro
new file mode 100644
index 0000000..c760aa0
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_pro
@@ -0,0 +1,429 @@
+{
+ "board": {
+ "design_settings": {
+ "defaults": {
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+ "copper_line_width": 0.19999999999999998,
+ "copper_text_italic": false,
+ "copper_text_size_h": 1.5,
+ "copper_text_size_v": 1.5,
+ "copper_text_thickness": 0.3,
+ "copper_text_upright": false,
+ "courtyard_line_width": 0.049999999999999996,
+ "dimension_precision": 4,
+ "dimension_units": 3,
+ "dimensions": {
+ "arrow_length": 1270000,
+ "extension_offset": 500000,
+ "keep_text_aligned": true,
+ "suppress_zeroes": false,
+ "text_position": 0,
+ "units_format": 1
+ },
+ "fab_line_width": 0.09999999999999999,
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+ "fab_text_size_h": 1.0,
+ "fab_text_size_v": 1.0,
+ "fab_text_thickness": 0.15,
+ "fab_text_upright": false,
+ "other_line_width": 0.09999999999999999,
+ "other_text_italic": false,
+ "other_text_size_h": 1.0,
+ "other_text_size_v": 1.0,
+ "other_text_thickness": 0.15,
+ "other_text_upright": false,
+ "pads": {
+ "drill": 0.762,
+ "height": 1.524,
+ "width": 1.524
+ },
+ "silk_line_width": 0.12,
+ "silk_text_italic": false,
+ "silk_text_size_h": 1.0,
+ "silk_text_size_v": 1.0,
+ "silk_text_thickness": 0.15,
+ "silk_text_upright": false,
+ "zones": {
+ "45_degree_only": false,
+ "min_clearance": 0.508
+ }
+ },
+ "diff_pair_dimensions": [],
+ "drc_exclusions": [],
+ "meta": {
+ "version": 1
+ },
+ "rule_severities": {
+ "annular_width": "error",
+ "clearance": "error",
+ "copper_edge_clearance": "error",
+ "courtyards_overlap": "error",
+ "diff_pair_gap_out_of_range": "error",
+ "diff_pair_uncoupled_length_too_long": "error",
+ "drill_out_of_range": "error",
+ "duplicate_footprints": "warning",
+ "extra_footprint": "warning",
+ "hole_clearance": "error",
+ "hole_near_hole": "error",
+ "invalid_outline": "error",
+ "item_on_disabled_layer": "error",
+ "items_not_allowed": "error",
+ "length_out_of_range": "error",
+ "malformed_courtyard": "error",
+ "microvia_drill_out_of_range": "error",
+ "missing_courtyard": "ignore",
+ "missing_footprint": "warning",
+ "net_conflict": "warning",
+ "npth_inside_courtyard": "ignore",
+ "padstack": "error",
+ "pth_inside_courtyard": "ignore",
+ "shorting_items": "error",
+ "silk_over_copper": "error",
+ "silk_overlap": "error",
+ "skew_out_of_range": "error",
+ "too_many_vias": "error",
+ "track_dangling": "warning",
+ "track_width": "error",
+ "tracks_crossing": "error",
+ "unconnected_items": "error",
+ "unresolved_variable": "error",
+ "via_dangling": "warning",
+ "zone_has_empty_net": "error",
+ "zones_intersect": "error"
+ },
+ "rules": {
+ "allow_blind_buried_vias": false,
+ "allow_microvias": false,
+ "max_error": 0.005,
+ "min_clearance": 0.0,
+ "min_copper_edge_clearance": 0.01,
+ "min_hole_clearance": 0.0,
+ "min_hole_to_hole": 0.25,
+ "min_microvia_diameter": 0.19999999999999998,
+ "min_microvia_drill": 0.09999999999999999,
+ "min_silk_clearance": 0.0,
+ "min_through_hole_diameter": 0.3,
+ "min_track_width": 0.19999999999999998,
+ "min_via_annular_width": 0.049999999999999996,
+ "min_via_diameter": 0.39999999999999997,
+ "solder_mask_clearance": 0.0,
+ "solder_mask_min_width": 0.0,
+ "solder_paste_clearance": 0.0,
+ "solder_paste_margin_ratio": 0.0
+ },
+ "track_widths": [],
+ "via_dimensions": [],
+ "zones_allow_external_fillets": false,
+ "zones_use_no_outline": true
+ },
+ "layer_presets": []
+ },
+ "boards": [],
+ "cvpcb": {
+ "equivalence_files": []
+ },
+ "erc": {
+ "erc_exclusions": [],
+ "meta": {
+ "version": 0
+ },
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+ "bus_label_syntax": "error",
+ "bus_to_bus_conflict": "error",
+ "bus_to_net_conflict": "error",
+ "different_unit_footprint": "error",
+ "different_unit_net": "error",
+ "duplicate_reference": "error",
+ "duplicate_sheet_names": "error",
+ "extra_units": "error",
+ "global_label_dangling": "warning",
+ "hier_label_mismatch": "error",
+ "label_dangling": "error",
+ "lib_symbol_issues": "warning",
+ "multiple_net_names": "error",
+ "net_not_bus_member": "error",
+ "no_connect_connected": "warning",
+ "no_connect_dangling": "warning",
+ "pin_not_connected": "error",
+ "pin_not_driven": "error",
+ "pin_to_pin": "error",
+ "power_pin_not_driven": "error",
+ "similar_labels": "error",
+ "unannotated": "error",
+ "unit_value_mismatch": "error",
+ "unresolved_variable": "error",
+ "wire_dangling": "error"
+ }
+ },
+ "libraries": {
+ "pinned_footprint_libs": [],
+ "pinned_symbol_libs": []
+ },
+ "meta": {
+ "filename": "ebaz4205.kicad_pro",
+ "version": 1
+ },
+ "net_settings": {
+ "classes": [
+ {
+ "bus_width": 12.0,
+ "clearance": 0.199898,
+ "diff_pair_gap": 0.249936,
+ "diff_pair_via_gap": 0.25,
+ "diff_pair_width": 0.199898,
+ "line_style": 0,
+ "microvia_diameter": 0.299974,
+ "microvia_drill": 0.100076,
+ "name": "Default",
+ "pcb_color": "rgba(0, 0, 0, 0.000)",
+ "schematic_color": "rgba(0, 0, 0, 0.000)",
+ "track_width": 0.249936,
+ "via_diameter": 0.8001,
+ "via_drill": 0.40005,
+ "wire_width": 6.0
+ }
+ ],
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+ "pcbnew": {
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+ "idf": "",
+ "netlist": "ebaz4205.net",
+ "specctra_dsn": "",
+ "step": "",
+ "vrml": ""
+ },
+ "page_layout_descr_file": ""
+ },
+ "schematic": {
+ "drawing": {
+ "default_bus_thickness": 12.0,
+ "default_junction_size": 36.0,
+ "default_line_thickness": 6.0,
+ "default_text_size": 50.0,
+ "default_wire_thickness": 6.0,
+ "field_names": [],
+ "intersheets_ref_prefix": "",
+ "intersheets_ref_short": false,
+ "intersheets_ref_show": false,
+ "intersheets_ref_suffix": "",
+ "junction_size_choice": 3,
+ "pin_symbol_size": 25.0,
+ "text_offset_ratio": 0.3
+ },
+ "legacy_lib_dir": "",
+ "legacy_lib_list": [],
+ "meta": {
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+ },
+ "net_format_name": "Pcbnew",
+ "page_layout_descr_file": "/home/tpecar/fpga/git/nl2ksch/blank.kicad_wks",
+ "plot_directory": "Plot-OP/",
+ "spice_adjust_passive_values": false,
+ "spice_external_command": "spice \"%I\"",
+ "subpart_first_id": 65,
+ "subpart_id_separator": 0
+ },
+ "sheets": [
+ [
+ "3ffd8c95-fcb8-4348-913d-aa766358d9cf",
+ "PHY & Sundries"
+ ],
+ [
+ "82afff9e-147b-465f-bde0-615da6815ba0",
+ "Mem & Zynq Sheet"
+ ],
+ [
+ "7371972a-f51d-443b-b695-d796796d7910",
+ "Zynq_IO Sheet"
+ ],
+ [
+ "35c92051-32ee-444d-9071-09303a907e64",
+ "Zynq Power Sheet"
+ ],
+ [
+ "1dedb3a4-1544-4eea-a6cf-6c065254caaf",
+ "IO Sheet"
+ ],
+ [
+ "3ffd8c95-fcb8-4348-913d-aa766358d9cf",
+ ""
+ ]
+ ],
+ "text_variables": {}
+}
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sch b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sch
new file mode 100644
index 0000000..5b3fbcf
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sch
@@ -0,0 +1,6334 @@
+(kicad_sch (version 20210126) (generator eeschema)
+
+ (paper "A3")
+
+ (title_block
+ (title "EBAZ4205 Schematic rebuild.")
+ (date "2021-02-15")
+ (rev "V004")
+ (comment 1 "Some schematic symbols have been eeditted to clear DRC errors")
+ (comment 2 "Extra PWR_FLAGS have been added to clear DRC errors")
+ (comment 3 "Kicad does not allow refs like RxxxA some some devices have been renumbered")
+ )
+
+ (lib_symbols
+ (symbol "Connector:TestPoint" (pin_numbers hide) (pin_names (offset 0.762) hide) (in_bom yes) (on_board yes)
+ (property "Reference" "TP" (id 0) (at 0 6.858 0)
+ (effects (font (size 1.27 1.27)))
+ )
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+ (effects (font (size 1.27 1.27)))
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
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+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "TestPoint_0_1"
+ (circle (center 0 3.302) (radius 0.762) (stroke (width 0)) (fill (type none)))
+ )
+ (symbol "TestPoint_1_1"
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+ )
+ )
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sym b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sym
new file mode 100644
index 0000000..12902df
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/ebaz4205.kicad_sym
@@ -0,0 +1,4551 @@
+(kicad_symbol_lib (version 20201005) (generator kicad_symbol_editor)
+ (symbol "ebaz4205:8P8C_LED" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
+ (property "Reference" "J" (id 0) (at -5.08 13.97 0)
+ (effects (font (size 1.27 1.27)) (justify right))
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diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/kicad/sym-lib-table b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/sym-lib-table
new file mode 100644
index 0000000..a5c393e
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/kicad/sym-lib-table
@@ -0,0 +1,4 @@
+(sym_lib_table
+ (lib (name "eec")(type "KiCad")(uri "${KIPRJMOD}/components/dram/IC_Micron_MT41K128M16JT-125 AIT K/eec.kicad_sym")(options "")(descr ""))
+ (lib (name "trafo")(type "KiCad")(uri "${KIPRJMOD}/components/eth_trafo/trafo.kicad_sym")(options "")(descr ""))
+)
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/original/README.md b/fpga/ebaz4205/doc/HW/ebaz4205/original/README.md
new file mode 100644
index 0000000..5f901b8
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/original/README.md
@@ -0,0 +1,5 @@
+Sourced from
+
+https://github.com/Elrori/EBAZ4205
+
+The design seems to have been made in Protel DXP and needs to be imported in Altium. \ No newline at end of file
diff --git a/fpga/ebaz4205/doc/HW/ebaz4205/original/ebit.pcb b/fpga/ebaz4205/doc/HW/ebaz4205/original/ebit.pcb
new file mode 100644
index 0000000..414d7f8
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/ebaz4205/original/ebit.pcb
Binary files differ
diff --git a/fpga/ebaz4205/doc/HW/prog/FT232HL_v20.5.31.pdf b/fpga/ebaz4205/doc/HW/prog/FT232HL_v20.5.31.pdf
new file mode 100644
index 0000000..a63ac08
--- /dev/null
+++ b/fpga/ebaz4205/doc/HW/prog/FT232HL_v20.5.31.pdf
Binary files differ
diff --git a/fpga/ebaz4205/doc/LICENSE b/fpga/ebaz4205/doc/LICENSE
new file mode 100644
index 0000000..1b405e8
--- /dev/null
+++ b/fpga/ebaz4205/doc/LICENSE
@@ -0,0 +1,22 @@
+The MIT License (MIT)
+
+Copyright (c) 2020 xjtuecho
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+
diff --git a/fpga/ebaz4205/doc/README.md b/fpga/ebaz4205/doc/README.md
new file mode 100644
index 0000000..6db1726
--- /dev/null
+++ b/fpga/ebaz4205/doc/README.md
@@ -0,0 +1,91 @@
+# EBAZ4205
+
+This development board was the control card of Ebit E9+ BTC miner. In mainland China, it cost about 5 dollars (<35 CNY) on the secondhand market.
+
+## Resources
+
+- [Telegram group](https://t.me/ebaz4205) general chat, quick Q&A
+- [Wiki](https://github.com/xjtuecho/EBAZ4205/wiki) FAQ, tutorials
+- [Github discussions](https://github.com/xjtuecho/EBAZ4205/discussions) troubleshooting help, projects, development
+
+## Hardware summary
+
+Hardware:
+- [PDF Schematic](/HW/ebaz4205/EBAZ4205-SCH.pdf)
+- [Altium Designer design files](/HW/ebaz4205/altium/)
+- [KiCad design files](/HW/ebaz4205/kicad/)
+- [CPU info](proc/cpuinfo)
+
+On-board linux
+- [Kernel cmdline](proc/cmdline)
+- [NAND Memory Map](proc/mtd)
+- [Linux Version](proc/version)
+
+
+The TF card socket is absent by default, you can buy and solder it by yourself if necessary. So do the UART port `J7`and the JTAG port `J8`.
+![Top layer of the board](image/01-PCB-TL.jpg)
+
+On the bottom layer of the board, diode `D24` is absent by default, which you need if you want to power the board via `J3 J4 J5`. Solder a SMC schottky diode there.
+![Bottom layer of the board](image/02-PCB-BL.jpg)
+
+XC7Z010CLG400, Dual Core Cortex A9 @ 666.66MHz and Artix-7 FPGA with 28k LEs.
+![ZYNQ](image/03-ZYNQ.jpg)
+
+256MB DDR3 Dynamic Memory.
+![DDR3](image/04-DDR3.jpg)
+
+128MB SLC NAND FLASH.
+![NAND](image/05-NAND.jpg)
+
+10/100Mbps Ethernet transceiver: IP101GA
+![PHY](image/06-PHY.jpg)
+
+BOOT Select Resistor: `R2577 and R2584`. The resistor is on `R2584` by default, which indicates boot from NAND. If you want to boot from TF card, **move** `R2584` to `R2577`.
+![BOOT](image/07-BOOT.jpg)
+
+## Powering the board
+
+If the Schottky Diode `D24` was not mounted, you can only power the board by `DATA1` `DATA2` and `DATA3` port. Voltage 5V~12V is OK, 400mA and above is necessary. The pin distance of these three ports is 2.0mm, which is not common as 2.54mm.
+
+After `D24` was mounted, we can power the board by J3 J4 J5. For convenience, J3 or J5 is recommended, which was originally for FAN power.
+
+## Reset the root password of built-in linux
+
+Use HyperTerminal or Putty to connect the TTL port, TXD RXD and GND is enough, VCC is not necessary. Power the Board, Hit `d` to enter the u-boot shell.
+
+```
+setenv nandboot "echo Copying Linux from NAND flash to RAM... && nand info && run nandroot;nand read 0x100000 0x2220000 0x300000 && fpga loadb 0 0x100000 0x300000 && nand read ${kernel_load_address} 0x300000 ${kernel_size} && nand read ${devicetree_load_address} 0x800000 ${devicetree_size}"
+run nandboot
+setenv bootargs 'console=ttyPS0,115200 root=/dev/mtdblock6 rootfstype=jffs2 noinitrd rw rootwait reboot=cold,hard emergency init=/bin/sh'
+bootm ${kernel_load_address} - ${devicetree_load_address} init=/bin/sh
+passwd
+```
+
+Use the commands above to reset the root password.
+
+## Shut down the BTC miner program
+
+After logging on with root, execute commands below to disable the BTC miner program.
+
+```
+mv /etc/rcS.d/S95cgminer.sh /etc/rcS.d/K95cgminer.sh
+reboot
+```
+
+## Set static IP address
+
+Edit configuration file: `/etc/network/interfaces`, add contents below.
+
+```
+auto eth0
+iface eth0 inet static
+address 192.168.1.205
+netmask 255.255.255.0
+gateway 192.168.1.1
+dns-nameservers 192.168.1.1
+```
+
+Enable ethernet: `ifup eth0`.
+Check ethernet status: `ethtool eth0`
+Now you can use `ssh root@192.168.1.205` to connect the built-in linux.
+Of course, you can use other IP address according to your network configuration.
diff --git a/fpga/ebaz4205/doc/image/01-PCB-TL.jpg b/fpga/ebaz4205/doc/image/01-PCB-TL.jpg
new file mode 100644
index 0000000..968cd98
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/01-PCB-TL.jpg
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diff --git a/fpga/ebaz4205/doc/image/02-PCB-BL.jpg b/fpga/ebaz4205/doc/image/02-PCB-BL.jpg
new file mode 100644
index 0000000..311d503
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/02-PCB-BL.jpg
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diff --git a/fpga/ebaz4205/doc/image/03-ZYNQ.jpg b/fpga/ebaz4205/doc/image/03-ZYNQ.jpg
new file mode 100644
index 0000000..9e32a7e
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/03-ZYNQ.jpg
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diff --git a/fpga/ebaz4205/doc/image/04-DDR3.jpg b/fpga/ebaz4205/doc/image/04-DDR3.jpg
new file mode 100644
index 0000000..b360fa2
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/04-DDR3.jpg
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diff --git a/fpga/ebaz4205/doc/image/05-NAND.jpg b/fpga/ebaz4205/doc/image/05-NAND.jpg
new file mode 100644
index 0000000..c8e7cfd
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/05-NAND.jpg
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diff --git a/fpga/ebaz4205/doc/image/06-PHY.jpg b/fpga/ebaz4205/doc/image/06-PHY.jpg
new file mode 100644
index 0000000..3652aad
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/06-PHY.jpg
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diff --git a/fpga/ebaz4205/doc/image/07-BOOT.jpg b/fpga/ebaz4205/doc/image/07-BOOT.jpg
new file mode 100644
index 0000000..e925c3c
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/07-BOOT.jpg
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diff --git a/fpga/ebaz4205/doc/image/08-STAND.jpg b/fpga/ebaz4205/doc/image/08-STAND.jpg
new file mode 100644
index 0000000..2853455
--- /dev/null
+++ b/fpga/ebaz4205/doc/image/08-STAND.jpg
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diff --git a/fpga/ebaz4205/doc/image/09-STAND.jpg b/fpga/ebaz4205/doc/image/09-STAND.jpg
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index 0000000..07dbf40
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diff --git a/fpga/ebaz4205/doc/proc/cmdline b/fpga/ebaz4205/doc/proc/cmdline
new file mode 100644
index 0000000..f15217e
--- /dev/null
+++ b/fpga/ebaz4205/doc/proc/cmdline
@@ -0,0 +1 @@
+console=ttyPS0,115200 root=/dev/mtdblock6 rootfstype=jffs2 noinitrd rw rootwait
diff --git a/fpga/ebaz4205/doc/proc/cpuinfo b/fpga/ebaz4205/doc/proc/cpuinfo
new file mode 100644
index 0000000..e9024b7
--- /dev/null
+++ b/fpga/ebaz4205/doc/proc/cpuinfo
@@ -0,0 +1,23 @@
+processor : 0
+model name : ARMv7 Processor rev 0 (v7l)
+BogoMIPS : 666.66
+Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpd32
+CPU implementer : 0x41
+CPU architecture: 7
+CPU variant : 0x3
+CPU part : 0xc09
+CPU revision : 0
+
+processor : 1
+model name : ARMv7 Processor rev 0 (v7l)
+BogoMIPS : 666.66
+Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpd32
+CPU implementer : 0x41
+CPU architecture: 7
+CPU variant : 0x3
+CPU part : 0xc09
+CPU revision : 0
+
+Hardware : Xilinx Zynq Platform
+Revision : 0003
+Serial : 0000000000000000
diff --git a/fpga/ebaz4205/doc/proc/mtd b/fpga/ebaz4205/doc/proc/mtd
new file mode 100644
index 0000000..4480fd8
--- /dev/null
+++ b/fpga/ebaz4205/doc/proc/mtd
@@ -0,0 +1,10 @@
+dev: size erasesize name
+mtd0: 00300000 00020000 "nand-fsbl-uboot"
+mtd1: 00500000 00020000 "nand-linux"
+mtd2: 00020000 00020000 "nand-device-tree"
+mtd3: 00a00000 00020000 "nand-rootfs"
+mtd4: 01000000 00020000 "nand-jffs2"
+mtd5: 00800000 00020000 "nand-bitstream"
+mtd6: 04000000 00020000 "nand-allrootfs"
+mtd7: 013e0000 00020000 "nand-release"
+mtd8: 00200000 00020000 "nand-reserve"
diff --git a/fpga/ebaz4205/doc/proc/partitions b/fpga/ebaz4205/doc/proc/partitions
new file mode 100644
index 0000000..1b76f56
--- /dev/null
+++ b/fpga/ebaz4205/doc/proc/partitions
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+major minor #blocks name
+
+ 1 0 16384 ram0
+ 1 1 16384 ram1
+ 1 2 16384 ram2
+ 1 3 16384 ram3
+ 1 4 16384 ram4
+ 1 5 16384 ram5
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+ 1 9 16384 ram9
+ 1 10 16384 ram10
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+ 1 14 16384 ram14
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+ 179 0 30578688 mmcblk0
+ 179 1 30322688 mmcblk0p1
+ 31 0 3072 mtdblock0
+ 31 1 5120 mtdblock1
+ 31 2 128 mtdblock2
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+ 31 4 16384 mtdblock4
+ 31 5 8192 mtdblock5
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+ 31 8 2048 mtdblock8
diff --git a/fpga/ebaz4205/doc/proc/version b/fpga/ebaz4205/doc/proc/version
new file mode 100644
index 0000000..61523ed
--- /dev/null
+++ b/fpga/ebaz4205/doc/proc/version
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+Linux version 4.6.0-xilinx (root@alvin) (gcc version 5.2.0 (GCC) ) #5 SMP PREEMPT Mon May 8 14:36:49 CST 2017
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-06 15:28:58 +0000