bbc-b/fpga-bbc - bbc-b fpga implementation from GH

	Commit message (Collapse)	Author	Age	Files	Lines
*	Updated T65 CPU core from ↵	Mike Stirling	2011-07-29	2	-9/+22
\| \| \| \|	https://svn.pacedev.net/repos/pace/sw/src/component/cpu/t65/ to fix BRK bug. Changed default breakpoint and watchpoint addresses to 0xFFFF.
*	Work in progress. Added PS/2 keyboard interface, hardware debugger. ↵	Mike Stirling	2011-07-29	9	-85/+967
\| \| \| \|	Interrupt test output to 6522 (remove later). Fixed error in pin assignments that blocked access to Flash chip select. Added reading sideways ROMs from external Flash (all but BASIC masked off for now).
*	Boots to "BBC Computer" message with dummy keyboard and interrupts disabled ↵	Mike Stirling	2011-07-25	4	-51/+437
\| \| \| \|	(something is keeping the interrupt permanently asserted). Need to add paged ROMs in Flash (no more room in the FPGA).
*	Register 6522 reads so that data is available outside of "phase 2" cycles, ↵	Mike Stirling	2011-07-17	1	-31/+34
\| \| \| \|	otherwise CPU can't see it
*	Work in progress: Added MOS6522 from www.fpgaarcade.com. Added simple_uart ↵	Mike Stirling	2011-07-17	6	-18/+1613
\| \| \| \|	component in "FRED" for test purposes and added alternative EHBASIC ROM for debugging
*	Fixed SRAM routing logic	Mike Stirling	2011-07-16	4	-20/+43
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*	Added top-level, PLL, MOS ROM and CRTC. CRTC seems to behave strangely ↵	Mike Stirling	2011-07-16	8	-0/+1407
\| \| \| \|	although the design is passing timing.
*	Initial commit. Some modules imported from experimental 6502 platform. ↵	Mike Stirling	2011-07-12	10	-0/+3575
	Project added for Quartus 9.1