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| author | Mike Stirling <opensource@mikestirling.co.uk> | 2011-08-07 20:24:34 +0100 |
|---|---|---|
| committer | Mike Stirling <opensource@mikestirling.co.uk> | 2011-08-07 20:24:34 +0100 |
| commit | f35c061588243ec86742416e71686113625b77be (patch) | |
| tree | 1b185a642545d4be48a664c9259013a9a4e69a14 | |
| parent | b9547b5b46ccd0546c3fc312b57dd4fd07f08a64 (diff) | |
| download | fpga-bbc-f35c061588243ec86742416e71686113625b77be.tar.gz fpga-bbc-f35c061588243ec86742416e71686113625b77be.tar.bz2 fpga-bbc-f35c061588243ec86742416e71686113625b77be.zip | |
Get rid of an inferred latch in 6522. Doesn't seem to break anything!
| -rw-r--r-- | m6522.vhd | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -602,9 +602,9 @@ begin begin
done := (t1c = x"0000");
t1c_done <= done and (phase = "11");
- if (phase = "11") then
+ --if (phase = "11") then
t1_reload_counter <= done and (r_acr(6) = '1');
- end if;
+ --end if;
end process;
p_timer1 : process
@@ -655,9 +655,9 @@ begin begin
done := (t2c = x"0000");
t2c_done <= done and (phase = "11");
- if (phase = "11") then
+ --if (phase = "11") then
t2_reload_counter <= done;
- end if;
+ --end if;
end process;
p_timer2 : process
|