diff options
author | Joel Bodenmann <joel@unormal.org> | 2012-09-29 20:56:30 +0200 |
---|---|---|
committer | Joel Bodenmann <joel@unormal.org> | 2012-09-29 20:56:30 +0200 |
commit | 30d03a620ce505fb91c5875d8185cd6d81f27b35 (patch) | |
tree | 01959f06640647d0b38bf131ea4914a21a9f860c /drivers/gdisp | |
parent | 70a168df5963d6a83f0c1893c707b42d60236f2a (diff) | |
download | uGFX-30d03a620ce505fb91c5875d8185cd6d81f27b35.tar.gz uGFX-30d03a620ce505fb91c5875d8185cd6d81f27b35.tar.bz2 uGFX-30d03a620ce505fb91c5875d8185cd6d81f27b35.zip |
replaced every LCD_XXX macro with GDISP_XXX
Diffstat (limited to 'drivers/gdisp')
-rw-r--r-- | drivers/gdisp/Nokia6610/gdisp_lld.c | 14 | ||||
-rw-r--r-- | drivers/gdisp/Nokia6610/gdisp_lld_board_olimexsam7ex256.h | 24 | ||||
-rw-r--r-- | drivers/gdisp/Nokia6610/readme.txt | 4 | ||||
-rw-r--r-- | drivers/gdisp/S6D1121/gdisp_lld.c | 32 | ||||
-rw-r--r-- | drivers/gdisp/S6D1121/readme.txt | 6 | ||||
-rw-r--r-- | drivers/gdisp/S6D1121/s6d1121_lld.c.h | 128 | ||||
-rw-r--r-- | drivers/gdisp/SSD1289/gdisp_lld.c | 2 | ||||
-rw-r--r-- | drivers/gdisp/SSD1289/readme.txt | 6 | ||||
-rw-r--r-- | drivers/gdisp/SSD1289/ssd1289_lld.c.h | 56 | ||||
-rw-r--r-- | drivers/gdisp/SSD1963/gdisp_lld.c | 110 | ||||
-rw-r--r-- | drivers/gdisp/SSD1963/gdisp_lld_panel.h | 2 | ||||
-rw-r--r-- | drivers/gdisp/SSD1963/readme.txt | 28 | ||||
-rw-r--r-- | drivers/gdisp/SSD1963/ssd1963.h | 44 |
13 files changed, 228 insertions, 228 deletions
diff --git a/drivers/gdisp/Nokia6610/gdisp_lld.c b/drivers/gdisp/Nokia6610/gdisp_lld.c index 343f2cc6..ae069e8c 100644 --- a/drivers/gdisp/Nokia6610/gdisp_lld.c +++ b/drivers/gdisp/Nokia6610/gdisp_lld.c @@ -40,12 +40,12 @@ /*===========================================================================*/
/* Controller definitions */
-#if defined(LCD_USE_GE8)
+#if defined(GDISP_USE_GE8)
#include "GE8.h"
-#elif defined(LCD_USE_GE12)
+#elif defined(GDISP_USE_GE12)
#include "GE12.h"
#else
- #error "gdispNokia6610: Either LCD_USE_GE8 or LCD_USE_GE12 must be defined depending on your controller"
+ #error "gdispNokia6610: Either GDISP_USE_GE8 or GDISP_USE_GE12 must be defined depending on your controller"
#endif
#define SCREEN_HEIGHT 132
@@ -109,7 +109,7 @@ bool_t GDISP_LLD(init)(void) { GDISP_LLD(setpin_reset)(FALSE);
chThdSleepMilliseconds(20);
- #if defined(LCD_USE_GE8)
+ #if defined(GDISP_USE_GE8)
#if 1
GDISP_LLD(write_cmd)(DISCTL); // Display control
GDISP_LLD(write_data)(0x00); // P1: 0x00 = 2 divisions, switching period=8 (default)
@@ -173,7 +173,7 @@ bool_t GDISP_LLD(init)(void) { GDISP_LLD(write_cmd)(DISON); // Turn on the display
#endif
- #elif defined(LCD_USE_GE12)
+ #elif defined(GDISP_USE_GE12)
#if 1
GDISP_LLD(write_cmd)(SLEEPOUT); // Sleep out
GDISP_LLD(write_cmd)(INVON); // Inversion on: seems to be required for this controller
@@ -575,11 +575,11 @@ void GDISP_LLD(drawpixel)(coord_t x, coord_t y, color_t color) { */
case GDISP_CONTROL_CONTRAST:
if ((unsigned)value > 100) value = (void *)100;
-#if defined(LCD_USE_GE8)
+#if defined(GDISP_USE_GE8)
GDISP_LLD(write_cmd)(VOLCTR);
GDISP_LLD(write_data)((unsigned)value);
GDISP_LLD(write_data)(3);
-#elif defined(LCD_USE_GE12)
+#elif defined(GDISP_USE_GE12)
GDISP_LLD(write_cmd)(CONTRAST);
GDISP_LLD(write_data)((unsigned)value);
#endif
diff --git a/drivers/gdisp/Nokia6610/gdisp_lld_board_olimexsam7ex256.h b/drivers/gdisp/Nokia6610/gdisp_lld_board_olimexsam7ex256.h index 897c32aa..f583a7d6 100644 --- a/drivers/gdisp/Nokia6610/gdisp_lld_board_olimexsam7ex256.h +++ b/drivers/gdisp/Nokia6610/gdisp_lld_board_olimexsam7ex256.h @@ -100,12 +100,12 @@ static __inline void GDISP_LLD(init_board)(void) { /* This code should really use the ChibiOS driver for these functions */
// Pin for backlight
- pPIOB->PIO_CODR = PIOB_LCD_BL_MASK; // Set PB20 to LOW
- pPIOB->PIO_OER = PIOB_LCD_BL_MASK; // Configure PB20 as output
+ pPIOB->PIO_CODR = PIOB_GDISP_BL_MASK; // Set PB20 to LOW
+ pPIOB->PIO_OER = PIOB_GDISP_BL_MASK; // Configure PB20 as output
// Reset pin
- pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK; // Set PA2 to HIGH
- pPIOA->PIO_OER = PIOA_LCD_RESET_MASK; // Configure PA2 as output
+ pPIOA->PIO_SODR = PIOA_GDISP_RESET_MASK; // Set PA2 to HIGH
+ pPIOA->PIO_OER = PIOA_GDISP_RESET_MASK; // Configure PA2 as output
// CS pin - this seems to be ignored
// pPIOA->PIO_SODR = BIT12; // Set PA2 to HIGH
@@ -144,11 +144,11 @@ static __inline void GDISP_LLD(init_board)(void) { */
static __inline void GDISP_LLD(setpin_reset)(bool_t state) {
if (state)
- palClearPad(IOPORT1, PIOA_LCD_RESET);
-// pPIOA->PIO_CODR = PIOA_LCD_RESET_MASK;
+ palClearPad(IOPORT1, PIOA_GDISP_RESET);
+// pPIOA->PIO_CODR = PIOA_GDISP_RESET_MASK;
else
- palSetPad(IOPORT1, PIOA_LCD_RESET);
-// pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK;
+ palSetPad(IOPORT1, PIOA_GDISP_RESET);
+// pPIOA->PIO_SODR = PIOA_GDISP_RESET_MASK;
}
/**
@@ -160,11 +160,11 @@ static __inline void GDISP_LLD(setpin_reset)(bool_t state) { */
static __inline void GDISP_LLD(setpin_backlight)(bool_t state) {
if (state)
- palSetPad(IOPORT2, PIOB_LCD_BL);
-// pPIOB->PIO_SODR = PIOB_LCD_BL_MASK;
+ palSetPad(IOPORT2, PIOB_GDISP_BL);
+// pPIOB->PIO_SODR = PIOB_GDISP_BL_MASK;
else
- palClearPad(IOPORT2, PIOB_LCD_BL);
-// pPIOB->PIO_CODR = PIOB_LCD_BL_MASK;
+ palClearPad(IOPORT2, PIOB_GDISP_BL);
+// pPIOB->PIO_CODR = PIOB_GDISP_BL_MASK;
}
/**
diff --git a/drivers/gdisp/Nokia6610/readme.txt b/drivers/gdisp/Nokia6610/readme.txt index 926f2d3f..95777866 100644 --- a/drivers/gdisp/Nokia6610/readme.txt +++ b/drivers/gdisp/Nokia6610/readme.txt @@ -4,8 +4,8 @@ To use this driver: a) #define HAL_USE_GDISP TRUE
b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
c) One (only) of:
- #define LCD_USE_GE8 /* The Epson controller */
- #define LCD_USE_GE12 /* The Philips controller */
+ #define GDISP_USE_GE8 /* The Epson controller */
+ #define GDISP_USE_GE12 /* The Philips controller */
d) If you are not using a known board then create a gdisp_lld_board.h file
and ensure it is on your include path.
Use the gdisp_lld_board_example.h file as a basis.
diff --git a/drivers/gdisp/S6D1121/gdisp_lld.c b/drivers/gdisp/S6D1121/gdisp_lld.c index 13ec0211..76fe941f 100644 --- a/drivers/gdisp/S6D1121/gdisp_lld.c +++ b/drivers/gdisp/S6D1121/gdisp_lld.c @@ -57,30 +57,30 @@ * @notapi
*/
bool_t GDISP_LLD(init)(void) {
- palSetPadMode(LCD_RST_GPIO, LCD_RST_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_RST_GPIO, GDISP_RST_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
// A Good idea to reset the module before using
- LCD_RST_LOW;
+ GDISP_RST_LOW;
s6d1121_delay(2);
- LCD_RST_HIGH; // Hardware Reset
+ GDISP_RST_HIGH; // Hardware Reset
s6d1121_delay(2);
- #ifdef LCD_USE_GPIO
+ #ifdef GDISP_USE_GPIO
// IO Default Configurations
- palSetPadMode(LCD_CS_GPIO, LCD_CS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(LCD_WR_GPIO, LCD_WR_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(LCD_RD_GPIO, LCD_RD_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(LCD_RS_GPIO, LCD_RS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(LCD_BL_GPIO, LCD_BL_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_CS_GPIO, GDISP_CS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_WR_GPIO, GDISP_WR_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_RD_GPIO, GDISP_RD_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_RS_GPIO, GDISP_RS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetPadMode(GDISP_BL_GPIO, GDISP_BL_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetGroupMode(LCD_D0_GPIO, 0x0000000F, 0, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetGroupMode(LCD_D4_GPIO, 0x0000FFF0, 0, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetGroupMode(GDISP_D0_GPIO, 0x0000000F, 0, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
+ palSetGroupMode(GDISP_D4_GPIO, 0x0000FFF0, 0, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- LCD_CS_HIGH;
- LCD_RD_HIGH;
- LCD_WR_HIGH;
- LCD_BL_LOW;
+ GDISP_CS_HIGH;
+ GDISP_RD_HIGH;
+ GDISP_WR_HIGH;
+ GDISP_BL_LOW;
- #elif defined(LCD_USE_FSMC)
+ #elif defined(GDISP_USE_FSMC)
#if defined(STM32F1XX)
/* FSMC setup. TODO: this only works for STM32F1 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
diff --git a/drivers/gdisp/S6D1121/readme.txt b/drivers/gdisp/S6D1121/readme.txt index 9db0786f..3b46562b 100644 --- a/drivers/gdisp/S6D1121/readme.txt +++ b/drivers/gdisp/S6D1121/readme.txt @@ -4,9 +4,9 @@ To use this driver: a) #define HAL_USE_GDISP TRUE
b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
c) One (only) of:
- #define LCD_USE_GPIO
- #define LCD_USE_SPI
- #define LCD_USE_FSMC
+ #define GDISP_USE_GPIO
+ #define GDISP_USE_SPI
+ #define GDISP_USE_FSMC
d) All of the following (with appropriate values):
#define SCREEN_WIDTH 320
#define SCREEN_HEIGHT 240
diff --git a/drivers/gdisp/S6D1121/s6d1121_lld.c.h b/drivers/gdisp/S6D1121/s6d1121_lld.c.h index d4ac694a..1d7ede61 100644 --- a/drivers/gdisp/S6D1121/s6d1121_lld.c.h +++ b/drivers/gdisp/S6D1121/s6d1121_lld.c.h @@ -22,107 +22,107 @@ #define S6D1121_H
// I/O assignments
-#define LCD_BL_GPIO GPIOB
-#define LCD_BL_PIN 8
+#define GDISP_BL_GPIO GPIOB
+#define GDISP_BL_PIN 8
-#define LCD_CS_GPIO GPIOD
-#define LCD_CS_PIN 7
+#define GDISP_CS_GPIO GPIOD
+#define GDISP_CS_PIN 7
-#define LCD_RS_GPIO GPIOD
-#define LCD_RS_PIN 11
+#define GDISP_RS_GPIO GPIOD
+#define GDISP_RS_PIN 11
-#define LCD_RST_GPIO GPIOD
-#define LCD_RST_PIN 10
+#define GDISP_RST_GPIO GPIOD
+#define GDISP_RST_PIN 10
-#define LCD_RD_GPIO GPIOD
-#define LCD_RD_PIN 9
+#define GDISP_RD_GPIO GPIOD
+#define GDISP_RD_PIN 9
-#define LCD_WR_GPIO GPIOD
-#define LCD_WR_PIN 8
+#define GDISP_WR_GPIO GPIOD
+#define GDISP_WR_PIN 8
-#define LCD_D0_GPIO GPIOD
-#define LCD_D4_GPIO GPIOE
+#define GDISP_D0_GPIO GPIOD
+#define GDISP_D4_GPIO GPIOE
/* all interfaces use RST via GPIO */
/* TODO: option to disable RST; assumes RST is tied high */
-#define LCD_RST_LOW palClearPad(LCD_RST_GPIO, LCD_RST_PIN)
-#define LCD_RST_HIGH palSetPad(LCD_RST_GPIO, LCD_RST_PIN)
+#define GDISP_RST_LOW palClearPad(GDISP_RST_GPIO, GDISP_RST_PIN)
+#define GDISP_RST_HIGH palSetPad(GDISP_RST_GPIO, GDISP_RST_PIN)
#define s6d1121_delay(n) halPolledDelay(MS2RTT(n));
-#if defined(LCD_USE_GPIO)
+#if defined(GDISP_USE_GPIO)
- #define LCD_CS_LOW palClearPad(LCD_CS_GPIO, LCD_CS_PIN)
- #define LCD_CS_HIGH palSetPad(LCD_CS_GPIO, LCD_CS_PIN)
+ #define GDISP_CS_LOW palClearPad(GDISP_CS_GPIO, GDISP_CS_PIN)
+ #define GDISP_CS_HIGH palSetPad(GDISP_CS_GPIO, GDISP_CS_PIN)
- #define LCD_RS_LOW palClearPad(LCD_RS_GPIO, LCD_RS_PIN)
- #define LCD_RS_HIGH palSetPad(LCD_RS_GPIO, LCD_RS_PIN)
+ #define GDISP_RS_LOW palClearPad(GDISP_RS_GPIO, GDISP_RS_PIN)
+ #define GDISP_RS_HIGH palSetPad(GDISP_RS_GPIO, GDISP_RS_PIN)
- #define LCD_RD_LOW palClearPad(LCD_RD_GPIO, LCD_RD_PIN)
- #define LCD_RD_HIGH palSetPad(LCD_RD_GPIO, LCD_RD_PIN)
+ #define GDISP_RD_LOW palClearPad(GDISP_RD_GPIO, GDISP_RD_PIN)
+ #define GDISP_RD_HIGH palSetPad(GDISP_RD_GPIO, GDISP_RD_PIN)
- #define LCD_WR_LOW palClearPad(LCD_WR_GPIO, LCD_WR_PIN)
- #define LCD_WR_HIGH palSetPad(LCD_WR_GPIO, LCD_WR_PIN)
+ #define GDISP_WR_LOW palClearPad(GDISP_WR_GPIO, GDISP_WR_PIN)
+ #define GDISP_WR_HIGH palSetPad(GDISP_WR_GPIO, GDISP_WR_PIN)
- #define LCD_BL_LOW palClearPad(LCD_BL_GPIO, LCD_BL_PIN)
- #define LCD_BL_HIGH palSetPad(LCD_BL_GPIO, LCD_BL_PIN)
+ #define GDISP_BL_LOW palClearPad(GDISP_BL_GPIO, GDISP_BL_PIN)
+ #define GDISP_BL_HIGH palSetPad(GDISP_BL_GPIO, GDISP_BL_PIN)
static inline void lld_lcddelay(void) { asm volatile ("nop"); asm volatile ("nop"); }
static inline void lld_lcdwrite(uint16_t db) {
- LCD_D4_GPIO->BSRR.W=((~db&0xFFF0)<<16)|(db&0xFFF0);
- LCD_D0_GPIO->BSRR.W=((~db&0x000F)<<16)|(db&0x000F);
- LCD_WR_LOW;
+ GDISP_D4_GPIO->BSRR.W=((~db&0xFFF0)<<16)|(db&0xFFF0);
+ GDISP_D0_GPIO->BSRR.W=((~db&0x000F)<<16)|(db&0x000F);
+ GDISP_WR_LOW;
lld_lcddelay();
- LCD_WR_HIGH;
+ GDISP_WR_HIGH;
}
static __inline uint16_t lld_lcdReadData(void) {
uint16_t value=0;
- LCD_RS_HIGH; LCD_WR_HIGH; LCD_RD_LOW;
+ GDISP_RS_HIGH; GDISP_WR_HIGH; GDISP_RD_LOW;
#ifndef STM32F4XX
// change pin mode to digital input
- LCD_DATA_PORT->CRH = 0x47444444;
- LCD_DATA_PORT->CRL = 0x47444444;
+ GDISP_DATA_PORT->CRH = 0x47444444;
+ GDISP_DATA_PORT->CRL = 0x47444444;
#endif
#ifndef STM32F4XX
// change pin mode back to digital output
- LCD_DATA_PORT->CRH = 0x33333333;
- LCD_DATA_PORT->CRL = 0x33333333;
+ GDISP_DATA_PORT->CRH = 0x33333333;
+ GDISP_DATA_PORT->CRL = 0x33333333;
#endif
- LCD_RD_HIGH;
+ GDISP_RD_HIGH;
return value;
}
static __inline uint16_t lld_lcdReadReg(uint16_t lcdReg) {
uint16_t lcdRAM;
- LCD_CS_LOW; LCD_RS_LOW;
+ GDISP_CS_LOW; GDISP_RS_LOW;
lld_lcdwrite(lcdReg);
- LCD_RS_HIGH;
+ GDISP_RS_HIGH;
lcdRAM = lld_lcdReadData();
- LCD_CS_HIGH;
+ GDISP_CS_HIGH;
return lcdRAM;
}
static void lld_lcdWriteIndex(uint16_t lcdReg) {
- LCD_RS_LOW;
+ GDISP_RS_LOW;
lld_lcdwrite(lcdReg);
- LCD_RS_HIGH;
+ GDISP_RS_HIGH;
}
static void lld_lcdWriteData(uint16_t lcdData) {
lld_lcdwrite(lcdData);
}
static void lld_lcdWriteReg(uint16_t lcdReg, uint16_t lcdRegValue) {
- LCD_CS_LOW;
+ GDISP_CS_LOW;
lld_lcdWriteIndex(lcdReg);
lld_lcdWriteData(lcdRegValue);
- LCD_CS_HIGH;
+ GDISP_CS_HIGH;
}
static __inline void lld_lcdWriteStreamStart(void) {
- LCD_CS_LOW;
+ GDISP_CS_LOW;
lld_lcdWriteIndex(0x0022);
}
static __inline void lld_lcdWriteStreamStop(void) {
- LCD_CS_HIGH;
+ GDISP_CS_HIGH;
}
static __inline void lld_lcdWriteStream(uint16_t *buffer, uint16_t size) {
uint16_t i;
@@ -138,43 +138,43 @@ /* TODO */
}
-#elif defined(LCD_USE_FSMC)
- #define LCD_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
- #define LCD_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#elif defined(GDISP_USE_FSMC)
+ #define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
+ #define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
- static __inline void lld_lcdWriteIndex(uint16_t index) { LCD_REG = index; }
- static __inline void lld_lcdWriteData(uint16_t data) { LCD_RAM = data; }
+ static __inline void lld_lcdWriteIndex(uint16_t index) { GDISP_REG = index; }
+ static __inline void lld_lcdWriteData(uint16_t data) { GDISP_RAM = data; }
static __inline void lld_lcdWriteReg(uint16_t lcdReg,uint16_t lcdRegValue) {
- LCD_REG = lcdReg;
- LCD_RAM = lcdRegValue;
+ GDISP_REG = lcdReg;
+ GDISP_RAM = lcdRegValue;
}
- static __inline uint16_t lld_lcdReadData(void) { return (LCD_RAM); }
+ static __inline uint16_t lld_lcdReadData(void) { return (GDISP_RAM); }
static __inline uint16_t lld_lcdReadReg(uint16_t lcdReg) {
- LCD_REG = lcdReg;
- return LCD_RAM;
+ GDISP_REG = lcdReg;
+ return GDISP_RAM;
}
- static __inline void lld_lcdWriteStreamStart(void) { LCD_REG = 0x0022; }
+ static __inline void lld_lcdWriteStreamStart(void) { GDISP_REG = 0x0022; }
static __inline void lld_lcdWriteStreamStop(void) {}
static __inline void lld_lcdWriteStream(uint16_t *buffer, uint16_t size) {
uint16_t i;
- for(i = 0; i < size; i++) LCD_RAM = buffer[i];
+ for(i = 0; i < size; i++) GDISP_RAM = buffer[i];
}
- static __inline void lld_lcdReadStreamStart(void) { LCD_REG = 0x0022; }
+ static __inline void lld_lcdReadStreamStart(void) { GDISP_REG = 0x0022; }
static __inline void lld_lcdReadStreamStop(void) {}
static __inline void lld_lcdReadStream(uint16_t *buffer, size_t size) {
uint16_t i;
volatile uint16_t dummy;
/* throw away first value read */
- dummy = LCD_RAM;
- for(i = 0; i < size; i++) buffer[i] = LCD_RAM;
+ dummy = GDISP_RAM;
+ for(i = 0; i < size; i++) buffer[i] = GDISP_RAM;
}
-#elif defined(LCD_USE_SPI)
- #error "gdispS6d1121: LCD_USE_SPI not implemented yet"
+#elif defined(GDISP_USE_SPI)
+ #error "gdispS6d1121: GDISP_USE_SPI not implemented yet"
#else
- #error "gdispS6d1121: No known LCD_USE_XXX has been defined"
+ #error "gdispS6d1121: No known GDISP_USE_XXX has been defined"
#endif
static void lld_lcdSetCursor(coord_t x, coord_t y) {
diff --git a/drivers/gdisp/SSD1289/gdisp_lld.c b/drivers/gdisp/SSD1289/gdisp_lld.c index 57e988bf..b8d36ab0 100644 --- a/drivers/gdisp/SSD1289/gdisp_lld.c +++ b/drivers/gdisp/SSD1289/gdisp_lld.c @@ -57,7 +57,7 @@ * @notapi
*/
bool_t GDISP_LLD(init)(void) {
- #ifdef LCD_USE_FSMC
+ #ifdef GDISP_USE_FSMC
/* FSMC setup. TODO: this only works for STM32F1 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
int FSMC_Bank = 0;
diff --git a/drivers/gdisp/SSD1289/readme.txt b/drivers/gdisp/SSD1289/readme.txt index 1b64b46d..4a70e9e2 100644 --- a/drivers/gdisp/SSD1289/readme.txt +++ b/drivers/gdisp/SSD1289/readme.txt @@ -4,9 +4,9 @@ To use this driver: a) #define HAL_USE_GDISP TRUE
b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
c) One (only) of:
- #define LCD_USE_GPIO
- #define LCD_USE_SPI
- #define LCD_USE_FSMC
+ #define GDISP_USE_GPIO
+ #define GDISP_USE_SPI
+ #define GDISP_USE_FSMC
d) All of the following (with appropriate values):
#define SCREEN_WIDTH 320
#define SCREEN_HEIGHT 240
diff --git a/drivers/gdisp/SSD1289/ssd1289_lld.c.h b/drivers/gdisp/SSD1289/ssd1289_lld.c.h index 79134239..e59b388c 100644 --- a/drivers/gdisp/SSD1289/ssd1289_lld.c.h +++ b/drivers/gdisp/SSD1289/ssd1289_lld.c.h @@ -21,15 +21,15 @@ #ifndef SSD1289_H #define SSD1289_H -#if defined(LCD_USE_GPIO) - #define Set_CS palSetPad(LCD_CMD_PORT, LCD_CS); - #define Clr_CS palClearPad(LCD_CMD_PORT, LCD_CS); - #define Set_RS palSetPad(LCD_CMD_PORT, LCD_RS); - #define Clr_RS palClearPad(LCD_CMD_PORT, LCD_RS); - #define Set_WR palSetPad(LCD_CMD_PORT, LCD_WR); - #define Clr_WR palClearPad(LCD_CMD_PORT, LCD_WR); - #define Set_RD palSetPad(LCD_CMD_PORT, LCD_RD); - #define Clr_RD palClearPad(LCD_CMD_PORT, LCD_RD); +#if defined(GDISP_USE_GPIO) + #define Set_CS palSetPad(GDISP_CMD_PORT, GDISP_CS); + #define Clr_CS palClearPad(GDISP_CMD_PORT, GDISP_CS); + #define Set_RS palSetPad(GDISP_CMD_PORT, GDISP_RS); + #define Clr_RS palClearPad(GDISP_CMD_PORT, GDISP_RS); + #define Set_WR palSetPad(GDISP_CMD_PORT, GDISP_WR); + #define Clr_WR palClearPad(GDISP_CMD_PORT, GDISP_WR); + #define Set_RD palSetPad(GDISP_CMD_PORT, GDISP_RD); + #define Clr_RD palClearPad(GDISP_CMD_PORT, GDISP_RD); extern void lld_lcdWriteGPIO(uint16_t data); extern uint16_t lld_lcdReadGPIO(void); @@ -103,7 +103,7 @@ (void)dummy; } -#elif defined(LCD_USE_FSMC) +#elif defined(GDISP_USE_FSMC) /* LCD Registers */ #define R0 0x00 #define R1 0x01 @@ -214,45 +214,45 @@ #define R193 0xC1 #define R229 0xE5 - #define LCD_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */ - #define LCD_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */ + #define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */ + #define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */ - static __inline void lld_lcdWriteIndex(uint16_t index) { LCD_REG = index; } - static __inline void lld_lcdWriteData(uint16_t data) { LCD_RAM = data; } + static __inline void lld_lcdWriteIndex(uint16_t index) { GDISP_REG = index; } + static __inline void lld_lcdWriteData(uint16_t data) { GDISP_RAM = data; } static __inline void lld_lcdWriteReg(uint16_t lcdReg,uint16_t lcdRegValue) { - LCD_REG = lcdReg; - LCD_RAM = lcdRegValue; + GDISP_REG = lcdReg; + GDISP_RAM = lcdRegValue; } - static __inline uint16_t lld_lcdReadData(void) { return (LCD_RAM); } + static __inline uint16_t lld_lcdReadData(void) { return (GDISP_RAM); } static __inline uint16_t lld_lcdReadReg(uint16_t lcdReg) { volatile uint16_t dummy; - LCD_REG = lcdReg; - dummy = LCD_RAM; - return (LCD_RAM); + GDISP_REG = lcdReg; + dummy = GDISP_RAM; + return (GDISP_RAM); } - static __inline void lld_lcdWriteStreamStart(void) { LCD_REG = 0x0022; } + static __inline void lld_lcdWriteStreamStart(void) { GDISP_REG = 0x0022; } static __inline void lld_lcdWriteStreamStop(void) {} static __inline void lld_lcdWriteStream(uint16_t *buffer, uint16_t size) { uint16_t i; - for(i = 0; i < size; i++) LCD_RAM = buffer[i]; + for(i = 0; i < size; i++) GDISP_RAM = buffer[i]; } - static __inline void lld_lcdReadStreamStart(void) { LCD_REG = 0x0022; } + static __inline void lld_lcdReadStreamStart(void) { GDISP_REG = 0x0022; } static __inline void lld_lcdReadStreamStop(void) {} static __inline void lld_lcdReadStream(uint16_t *buffer, size_t size) { uint16_t i; volatile uint16_t dummy; - dummy = LCD_RAM; /* throw away first value read */ - for(i = 0; i < size; i++) buffer[i] = LCD_RAM; + dummy = GDISP_RAM; /* throw away first value read */ + for(i = 0; i < size; i++) buffer[i] = GDISP_RAM; } -#elif defined(LCD_USE_SPI) - #error "gdispSsd1289: LCD_USE_SPI not implemented yet" +#elif defined(GDISP_USE_SPI) + #error "gdispSsd1289: GDISP_USE_SPI not implemented yet" #else - #error "gdispSsd1289: No known LCD_USE_XXX has been defined" + #error "gdispSsd1289: No known GDISP_USE_XXX has been defined" #endif static __inline void lld_lcdDelay(uint16_t us) { diff --git a/drivers/gdisp/SSD1963/gdisp_lld.c b/drivers/gdisp/SSD1963/gdisp_lld.c index a6709935..8f64c955 100644 --- a/drivers/gdisp/SSD1963/gdisp_lld.c +++ b/drivers/gdisp/SSD1963/gdisp_lld.c @@ -56,27 +56,27 @@ #include "ssd1963.h"
-#if defined(LCD_USE_FSMC)
+#if defined(GDISP_USE_FSMC)
__inline void GDISP_LLD(writeindex)(uint8_t cmd) {
- LCD_REG = cmd;
+ GDISP_REG = cmd;
}
__inline void GDISP_LLD(writereg)(uint16_t lcdReg,uint16_t lcdRegValue) {
- LCD_REG = lcdReg;
- LCD_RAM = lcdRegValue;
+ GDISP_REG = lcdReg;
+ GDISP_RAM = lcdRegValue;
}
__inline void GDISP_LLD(writedata)(uint16_t data) {
- LCD_RAM = data;
+ GDISP_RAM = data;
}
__inline uint16_t GDISP_LLD(readdata)(void) {
- return (LCD_RAM);
+ return (GDISP_RAM);
}
__inline uint8_t GDISP_LLD(readreg)(uint8_t lcdReg) {
- LCD_REG = lcdReg;
- return (LCD_RAM);
+ GDISP_REG = lcdReg;
+ return (GDISP_RAM);
}
__inline void GDISP_LLD(writestreamstart)(void) {
@@ -90,50 +90,50 @@ __inline void GDISP_LLD(readstreamstart)(void) { __inline void GDISP_LLD(writestream)(uint16_t *buffer, uint16_t size) {
uint16_t i;
for(i = 0; i < size; i++)
- LCD_RAM = buffer[i];
+ GDISP_RAM = buffer[i];
}
__inline void GDISP_LLD(readstream)(uint16_t *buffer, size_t size) {
uint16_t i;
for(i = 0; i < size; i++) {
- buffer[i] = LCD_RAM;
+ buffer[i] = GDISP_RAM;
}
}
-#elif defined(LCD_USE_GPIO)
+#elif defined(GDISP_USE_GPIO)
__inline void GDISP_LLD(writeindex)(uint8_t cmd) {
Set_CS; Set_RS; Set_WR; Clr_RD;
- palWritePort(LCD_DATA_PORT, cmd);
+ palWritePort(GDISP_DATA_PORT, cmd);
Clr_CS;
}
__inline void GDISP_LLD(writereg)(uint16_t lcdReg,uint16_t lcdRegValue) {
Set_CS; Set_RS; Set_WR; Clr_RD;
- palWritePort(LCD_DATA_PORT, lcdReg);
+ palWritePort(GDISP_DATA_PORT, lcdReg);
Clr_RS;
- palWritePort(LCD_DATA_PORT, lcdRegValue);
+ palWritePort(GDISP_DATA_PORT, lcdRegValue);
Clr_CS;
}
__inline void GDISP_LLD(writedata)(uint16_t data) {
Set_CS; Clr_RS; Set_WR; Clr_RD;
- palWritePort(LCD_DATA_PORT, data);
+ palWritePort(GDISP_DATA_PORT, data);
Clr_CS;
}
__inline uint16_t GDISP_LLD(readdata)(void) {
Set_CS; Clr_RS; Clr_WR; Set_RD;
- uint16_t data = palReadPort(LCD_DATA_PORT);
+ uint16_t data = palReadPort(GDISP_DATA_PORT);
Clr_CS;
return data;
}
__inline uint8_t GDISP_LLD(readreg)(uint8_t lcdReg) {
Set_CS; Set_RS; Clr_WR; Set_RD;
- palWritePort(LCD_DATA_PORT, lcdReg);
+ palWritePort(GDISP_DATA_PORT, lcdReg);
Clr_RS;
- uint16_t data = palReadPort(LCD_DATA_PORT);
+ uint16_t data = palReadPort(GDISP_DATA_PORT);
Clr_CS;
return data;
}
@@ -151,7 +151,7 @@ __inline void GDISP_LLD(writestream)(uint16_t *buffer, uint16_t size) { Set_CS; Clr_RS; Set_WR; Clr_RD;
for(i = 0; i < size; i++) {
Set_WR;
- palWritePort(LCD_DATA_PORT, buffer[i]);
+ palWritePort(GDISP_DATA_PORT, buffer[i]);
Clr_WR;
}
Clr_CS;
@@ -162,7 +162,7 @@ __inline void GDISP_LLD(readstream)(uint16_t *buffer, size_t size) { Set_CS; Clr_RS; Clr_WR; Set_RD;
for(i = 0; i < size; i++) {
Set_RD;
- buffer[i] = palReadPort(LCD_DATA_PORT);
+ buffer[i] = palReadPort(GDISP_DATA_PORT);
Clr_RD;
}
}
@@ -183,23 +183,23 @@ __inline void GDISP_LLD(readstream)(uint16_t *buffer, size_t size) { bool_t GDISP_LLD(init)(void) {
/* Initialise the display */
-#if defined(LCD_USE_FSMC)
+#if defined(GDISP_USE_FSMC)
#if defined(STM32F1XX) || defined(STM32F3XX)
/* FSMC setup for F1/F3 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
- #if defined(LCD_USE_DMA) && defined(LCD_DMA_STREAM)
+ #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
#error "DMA not implemented for F1/F3 Devices"
#endif
#elif defined(STM32F4XX) || defined(STM32F2XX)
/* STM32F2-F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
- #if defined(LCD_USE_DMA) && defined(LCD_DMA_STREAM)
- if (dmaStreamAllocate(LCD_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
- dmaStreamSetMemory0(LCD_DMA_STREAM, &LCD_RAM);
- dmaStreamSetMode(LCD_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
+ #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
+ if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
+ dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
+ dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
#endif
#else
#error "FSMC not implemented for this device"
@@ -225,14 +225,14 @@ bool_t GDISP_LLD(init)(void) { * This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
-#elif defined(LCD_USE_GPIO)
- IOBus busCMD = {LCD_CMD_PORT, (1 << LCD_CS) | (1 << LCD_RS) | (1 << LCD_WR) | (1 << LCD_RD), 0};
- IOBus busDATA = {LCD_CMD_PORT, 0xFFFFF, 0};
+#elif defined(GDISP_USE_GPIO)
+ IOBus busCMD = {GDISP_CMD_PORT, (1 << GDISP_CS) | (1 << GDISP_RS) | (1 << GDISP_WR) | (1 << GDISP_RD), 0};
+ IOBus busDATA = {GDISP_CMD_PORT, 0xFFFFF, 0};
palSetBusMode(&busCMD, PAL_MODE_OUTPUT_PUSHPULL);
palSetBusMode(&busDATA, PAL_MODE_OUTPUT_PUSHPULL);
#else
- #error "Please define LCD_USE_FSMC or LCD_USE_GPIO"
+ #error "Please define GDISP_USE_FSMC or GDISP_USE_GPIO"
#endif
GDISP_LLD(writeindex)(SSD1963_SOFT_RESET);
chThdSleepMicroseconds(100);
@@ -255,7 +255,7 @@ bool_t GDISP_LLD(init)(void) { chThdSleepMicroseconds(100);
/* Screen size */
- GDISP_LLD(writeindex)(SSD1963_SET_LCD_MODE);
+ GDISP_LLD(writeindex)(SSD1963_SET_GDISP_MODE);
// GDISP_LLD(writedata)(0x0000);
GDISP_LLD(writedata)(0b00011000); //Enabled dithering
GDISP_LLD(writedata)(0x0000);
@@ -270,9 +270,9 @@ bool_t GDISP_LLD(init)(void) { /* LCD Clock specs */
GDISP_LLD(writeindex)(SSD1963_SET_LSHIFT_FREQ);
- GDISP_LLD(writedata)((LCD_FPR >> 16) & 0xFF);
- GDISP_LLD(writedata)((LCD_FPR >> 8) & 0xFF);
- GDISP_LLD(writedata)(LCD_FPR & 0xFF);
+ GDISP_LLD(writedata)((GDISP_FPR >> 16) & 0xFF);
+ GDISP_LLD(writedata)((GDISP_FPR >> 8) & 0xFF);
+ GDISP_LLD(writedata)(GDISP_FPR & 0xFF);
GDISP_LLD(writeindex)(SSD1963_SET_HORI_PERIOD);
GDISP_LLD(writedata)(mHIGH(SCREEN_HSYNC_PERIOD));
@@ -299,7 +299,7 @@ bool_t GDISP_LLD(init)(void) { /* Turn on */
GDISP_LLD(writeindex)(SSD1963_SET_DISPLAY_ON);
- #if defined(LCD_USE_FSMC)
+ #if defined(GDISP_USE_FSMC)
/* FSMC delay reduced as the controller now runs at full speed */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
@@ -390,23 +390,23 @@ void GDISP_LLD(drawpixel)(coord_t x, coord_t y, color_t color) { GDISP_LLD(setwindow)(x, y, x+cx-1, y+cy-1);
GDISP_LLD(writestreamstart)();
- #if defined(LCD_USE_FSMC) && defined(LCD_USE_DMA) && defined(LCD_DMA_STREAM)
+ #if defined(GDISP_USE_FSMC) && defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
uint8_t i;
- dmaStreamSetPeripheral(LCD_DMA_STREAM, &color);
- dmaStreamSetMode(LCD_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
+ dmaStreamSetPeripheral(GDISP_DMA_STREAM, &color);
+ dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (i = area/65535; i; i--) {
- dmaStreamSetTransactionSize(LCD_DMA_STREAM, 65535);
- dmaStreamEnable(LCD_DMA_STREAM);
- dmaWaitCompletion(LCD_DMA_STREAM);
+ dmaStreamSetTransactionSize(GDISP_DMA_STREAM, 65535);
+ dmaStreamEnable(GDISP_DMA_STREAM);
+ dmaWaitCompletion(GDISP_DMA_STREAM);
}
- dmaStreamSetTransactionSize(LCD_DMA_STREAM, area%65535);
- dmaStreamEnable(LCD_DMA_STREAM);
- dmaWaitCompletion(LCD_DMA_STREAM);
+ dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area%65535);
+ dmaStreamEnable(GDISP_DMA_STREAM);
+ dmaWaitCompletion(GDISP_DMA_STREAM);
#else
uint32_t index;
for(index = 0; index < area; index++)
GDISP_LLD(writedata)(color);
- #endif //#ifdef LCD_USE_DMA
+ #endif //#ifdef GDISP_USE_DMA
}
#endif
@@ -439,19 +439,19 @@ void GDISP_LLD(drawpixel)(coord_t x, coord_t y, color_t color) { buffer += srcx + srcy * srccx;
- #if defined(LCD_USE_FSMC) && defined(LCD_USE_DMA) && defined(LCD_DMA_STREAM)
+ #if defined(GDISP_USE_FSMC) && defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
uint32_t area = cx*cy;
uint8_t i;
- dmaStreamSetPeripheral(LCD_DMA_STREAM, buffer);
- dmaStreamSetMode(LCD_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
+ dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
+ dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (i = area/65535; i; i--) {
- dmaStreamSetTransactionSize(LCD_DMA_STREAM, 65535);
- dmaStreamEnable(LCD_DMA_STREAM);
- dmaWaitCompletion(LCD_DMA_STREAM);
+ dmaStreamSetTransactionSize(GDISP_DMA_STREAM, 65535);
+ dmaStreamEnable(GDISP_DMA_STREAM);
+ dmaWaitCompletion(GDISP_DMA_STREAM);
}
- dmaStreamSetTransactionSize(LCD_DMA_STREAM, area%65535);
- dmaStreamEnable(LCD_DMA_STREAM);
- dmaWaitCompletion(LCD_DMA_STREAM);
+ dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area%65535);
+ dmaStreamEnable(GDISP_DMA_STREAM);
+ dmaWaitCompletion(GDISP_DMA_STREAM);
#else
coord_t endx, endy;
unsigned lg;
@@ -461,7 +461,7 @@ void GDISP_LLD(drawpixel)(coord_t x, coord_t y, color_t color) { for(; y < endy; y++, buffer += lg)
for(x=srcx; x < endx; x++)
GDISP_LLD(writedata)(*buffer++);
- #endif //#ifdef LCD_USE_DMA
+ #endif //#ifdef GDISP_USE_DMA
}
#endif
diff --git a/drivers/gdisp/SSD1963/gdisp_lld_panel.h b/drivers/gdisp/SSD1963/gdisp_lld_panel.h index eeb04286..36050ff4 100644 --- a/drivers/gdisp/SSD1963/gdisp_lld_panel.h +++ b/drivers/gdisp/SSD1963/gdisp_lld_panel.h @@ -47,7 +47,7 @@ #define SCREEN_VSYNC_PERIOD (SCREEN_VSYNC_PULSE + SCREEN_VSYNC_BACK_PORCH + SCREEN_HEIGHT + SCREEN_VSYNC_FRONT_PORCH) #define SCREEN_PCLK (SCREEN_HSYNC_PERIOD * SCREEN_VSYNC_PERIOD * SCREEN_FPS) -#define LCD_FPR ((SCREEN_PCLK * 1048576)/100000000) +#define GDISP_FPR ((SCREEN_PCLK * 1048576)/100000000) #endif /** @} */ diff --git a/drivers/gdisp/SSD1963/readme.txt b/drivers/gdisp/SSD1963/readme.txt index 8654d4a1..960d9a0c 100644 --- a/drivers/gdisp/SSD1963/readme.txt +++ b/drivers/gdisp/SSD1963/readme.txt @@ -4,11 +4,11 @@ To use this driver: a) #define HAL_USE_GDISP TRUE b) Any optional high level driver defines (see gdisp.h) eg: #define GDISP_NEED_MULTITHREAD TRUE c) One (only) of: - #define LCD_USE_GPIO - #define LCD_USE_FSMC + #define GDISP_USE_GPIO + #define GDISP_USE_FSMC d) If you want to use DMA (only works with FSMC): - #define LCD_USE_DMA - #define LCD_DMA_STREAM STM32_DMA2_STREAM6 //You can change the DMA channel according to your needs + #define GDISP_USE_DMA + #define GDISP_DMA_STREAM STM32_DMA2_STREAM6 //You can change the DMA channel according to your needs 2. Edit gdisp_lld_panel.h with your panel properties @@ -21,18 +21,18 @@ Example FSMC config with DMA: #define SCREEN_WIDTH 480 #define SCREEN_HEIGHT 272 -#define LCD_USE_FSMC +#define GDISP_USE_FSMC -#define LCD_USE_DMA -#define LCD_DMA_STREAM STM32_DMA2_STREAM6 +#define GDISP_USE_DMA +#define GDISP_DMA_STREAM STM32_DMA2_STREAM6 -#if defined(LCD_USE_GPIO) +#if defined(GDISP_USE_GPIO) - #define LCD_CMD_PORT GPIOC - #define LCD_DATA_PORT GPIOD + #define GDISP_CMD_PORT GPIOC + #define GDISP_DATA_PORT GPIOD - #define LCD_CS 0 - #define LCD_RS 1 - #define LCD_WR 2 - #define LCD_RD 3 + #define GDISP_CS 0 + #define GDISP_RS 1 + #define GDISP_WR 2 + #define GDISP_RD 3 #endif diff --git a/drivers/gdisp/SSD1963/ssd1963.h b/drivers/gdisp/SSD1963/ssd1963.h index 813f269b..4635981f 100644 --- a/drivers/gdisp/SSD1963/ssd1963.h +++ b/drivers/gdisp/SSD1963/ssd1963.h @@ -31,21 +31,21 @@ #include "gdisp_lld_panel.h" -#if defined(LCD_USE_GPIO) - #define Set_CS palSetPad(LCD_CMD_PORT, LCD_CS); - #define Clr_CS palClearPad(LCD_CMD_PORT, LCD_CS); - #define Set_RS palSetPad(LCD_CMD_PORT, LCD_RS); - #define Clr_RS palClearPad(LCD_CMD_PORT, LCD_RS); - #define Set_WR palSetPad(LCD_CMD_PORT, LCD_WR); - #define Clr_WR palClearPad(LCD_CMD_PORT, LCD_WR); - #define Set_RD palSetPad(LCD_CMD_PORT, LCD_RD); - #define Clr_RD palClearPad(LCD_CMD_PORT, LCD_RD); +#if defined(GDISP_USE_GPIO) + #define Set_CS palSetPad(GDISP_CMD_PORT, GDISP_CS); + #define Clr_CS palClearPad(GDISP_CMD_PORT, GDISP_CS); + #define Set_RS palSetPad(GDISP_CMD_PORT, GDISP_RS); + #define Clr_RS palClearPad(GDISP_CMD_PORT, GDISP_RS); + #define Set_WR palSetPad(GDISP_CMD_PORT, GDISP_WR); + #define Clr_WR palClearPad(GDISP_CMD_PORT, GDISP_WR); + #define Set_RD palSetPad(GDISP_CMD_PORT, GDISP_RD); + #define Clr_RD palClearPad(GDISP_CMD_PORT, GDISP_RD); #endif -#if defined(LCD_USE_FSMC) +#if defined(GDISP_USE_FSMC) /* Using FSMC A16 as RS */ - #define LCD_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */ - #define LCD_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */ + #define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */ + #define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */ #endif #define mHIGH(x) (x >> 8) @@ -86,8 +86,8 @@ #define SSD1963_SET_TEAR_SCANLINE 0x0044 #define SSD1963_GET_SCANLINE 0x0045 #define SSD1963_READ_DDB 0x00A1 -#define SSD1963_SET_LCD_MODE 0x00B0 -#define SSD1963_GET_LCD_MODE 0x00B1 +#define SSD1963_SET_GDISP_MODE 0x00B0 +#define SSD1963_GET_GDISP_MODE 0x00B1 #define SSD1963_SET_HORI_PERIOD 0x00B4 #define SSD1963_GET_HORI_PERIOD 0x00B5 #define SSD1963_SET_VERT_PERIOD 0x00B6 @@ -100,14 +100,14 @@ #define SSD1963_GET_POST_PROC 0x00BD #define SSD1963_SET_PWM_CONF 0x00BE #define SSD1963_GET_PWM_CONF 0x00BF -#define SSD1963_GET_LCD_GEN0 0x00C0 -#define SSD1963_SET_LCD_GEN0 0x00C1 -#define SSD1963_GET_LCD_GEN1 0x00C2 -#define SSD1963_SET_LCD_GEN1 0x00C3 -#define SSD1963_GET_LCD_GEN2 0x00C4 -#define SSD1963_SET_LCD_GEN2 0x00C5 -#define SSD1963_GET_LCD_GEN3 0x00C6 -#define SSD1963_SET_LCD_GEN3 0x00C7 +#define SSD1963_GET_GDISP_GEN0 0x00C0 +#define SSD1963_SET_GDISP_GEN0 0x00C1 +#define SSD1963_GET_GDISP_GEN1 0x00C2 +#define SSD1963_SET_GDISP_GEN1 0x00C3 +#define SSD1963_GET_GDISP_GEN2 0x00C4 +#define SSD1963_SET_GDISP_GEN2 0x00C5 +#define SSD1963_GET_GDISP_GEN3 0x00C6 +#define SSD1963_SET_GDISP_GEN3 0x00C7 #define SSD1963_SET_GPIO0_ROP 0x00C8 #define SSD1963_GET_GPIO0_ROP 0x00C9 #define SSD1963_SET_GPIO1_ROP 0x00CA |