Replace all inline definitions with GFXINLINE

1 files changed, 13 insertions, 13 deletions

diff --git a/boards/addons/gdisp/board_SSD1289_stm32f4discovery.h b/boards/addons/gdisp/board_SSD1289_stm32f4discovery.h
index 6198b73a..33142e83 100644
--- a/boards/addons/gdisp/board_SSD1289_stm32f4discovery.h
+++ b/boards/addons/gdisp/board_SSD1289_stm32f4discovery.h
@@ -38,7 +38,7 @@ static const PWMConfig pwmcfg = {
 	0
 };
 
-static inline void init_board(GDisplay *g) {
+static GFXINLINE void init_board(GDisplay *g) {
 
 	// As we are not using multiple displays we set g->board to NULL as we don't use it.
 	g->board = 0;
@@ -101,55 +101,55 @@ static inline void init_board(GDisplay *g) {
 	}
 }
 
-static inline void post_init_board(GDisplay *g) {
+static GFXINLINE void post_init_board(GDisplay *g) {
 	(void) g;
 }
 
-static inline void setpin_reset(GDisplay *g, bool_t state) {
+static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
 	(void) g;
 	(void) state;
 }
 
-static inline void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
 	(void) g;
     pwmEnableChannel(&PWMD3, 2, percent);
 }
 
-static inline void acquire_bus(GDisplay *g) {
+static GFXINLINE void acquire_bus(GDisplay *g) {
 	(void) g;
 }
 
-static inline void release_bus(GDisplay *g) {
+static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static inline void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static inline void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
 	(void) g;
 	GDISP_RAM = data;
 }
 
-static inline void setreadmode(GDisplay *g) {
+static GFXINLINE void setreadmode(GDisplay *g) {
 	(void) g;
 	FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0;		/* FSMC timing */
 }
 
-static inline void setwritemode(GDisplay *g) {
+static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 	FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0;		/* FSMC timing */
 }
 
-static inline uint16_t read_data(GDisplay *g) {
+static GFXINLINE uint16_t read_data(GDisplay *g) {
 	(void) g;
 	return GDISP_RAM;
 }
 
 #if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
-	static inline void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
+	static GFXINLINE void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
 		(void) g;
 		dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
 		dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
@@ -160,7 +160,7 @@ static inline uint16_t read_data(GDisplay *g) {
 		}
 	}
 
-	static inline void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
+	static GFXINLINE void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
 		(void) g;
         dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
         dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);