aboutsummaryrefslogtreecommitdiffstats
path: root/os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h
blob: 4f42a1fb3f2344c03072be1d10684d724d87a67e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
/*
    Nil RTOS - Copyright (C) 2012 Giovanni Di Sirio.

    This file is part of Nil RTOS.

    Nil RTOS is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    Nil RTOS is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
*/

/**
 * @file    STM32F3xx/niltimer.h
 * @brief   System timer header file.
 *
 * @addtogroup STM32F3_TIMER
 * @{
 */

#ifndef _CHTIMER_H_
#define _CHTIMER_H_

/*===========================================================================*/
/* Module constants.                                                         */
/*===========================================================================*/

/*===========================================================================*/
/* Module pre-compile time settings.                                         */
/*===========================================================================*/

/*===========================================================================*/
/* Derived constants and error checks.                                       */
/*===========================================================================*/

/*===========================================================================*/
/* Module data structures and types.                                         */
/*===========================================================================*/

typedef struct {
  volatile uint32_t     CR1;
  volatile uint32_t     CR2;
  volatile uint32_t     SMCR;
  volatile uint32_t     DIER;
  volatile uint32_t     SR;
  volatile uint32_t     EGR;
  volatile uint32_t     CCMR1;
  volatile uint32_t     CCMR2;
  volatile uint32_t     CCER;
  volatile uint32_t     CNT;
  volatile uint32_t     PSC;
  volatile uint32_t     ARR;
  volatile uint32_t     RCR;
  volatile uint32_t     CCR[4];
  volatile uint32_t     BDTR;
  volatile uint32_t     DCR;
  volatile uint32_t     DMAR;
  volatile uint32_t     OR;
  volatile uint32_t     CCMR3;
  volatile uint32_t     CCR5;
  volatile uint32_t     CCR6;
} local_stm32_tim_t;

/*===========================================================================*/
/* Module macros.                                                            */
/*===========================================================================*/

#define STM32F3_TIM2    ((local_stm32_tim_t *)0x40000000)

/*===========================================================================*/
/* External declarations.                                                    */
/*===========================================================================*/

/*===========================================================================*/
/* Module inline functions.                                                  */
/*===========================================================================*/

/**
 * @brief   Timer unit initialization.
 *
 * @notapi
 */
static inline void port_timer_init(void) {

  STM32F3_TIM2->ARR     = 0xFFFFFFFF;
  STM32F3_TIM2->CCMR1   = 0;
  STM32F3_TIM2->CCR[0]  = 0;
  STM32F3_TIM2->DIER    = 0;
  STM32F3_TIM2->CR2     = 0;
  STM32F3_TIM2->EGR     = 1;            /* UG, CNT initialized.             */
  STM32F3_TIM2->CR1     = 1;            /* CEN */
}

/**
 * @brief   Returns the system time.
 *
 * @return              The system time.
 *
 * @notapi
 */
static inline systime_t port_timer_get_time(void) {

  return STM32F3_TIM2->CNT;
}

/**
 * @brief   Starts the alarm.
 * @note    Makes sure that no spurious alarms are triggered after
 *          this call.
 *
 * @param[in] time      the time to be set for the first alarm
 *
 * @notapi
 */
static inline void port_timer_start_alarm(systime_t time) {

  chDbgAssert((STM32F3_TIM2->DIER & 2) == 0,
              "port_timer_start_alarm(), #1",
              "already started");

  STM32F3_TIM2->CCR[0]  = time;
  STM32F3_TIM2->SR      = 0;
  STM32F3_TIM2->DIER    = 2;            /* CC1IE */
}

/**
 * @brief   Stops the alarm interrupt.
 *
 * @notapi
 */
static inline void port_timer_stop_alarm(void) {

  chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
              "port_timer_stop_alarm(), #1",
              "not started");

  STM32F3_TIM2->DIER    = 0;
}

/**
 * @brief   Sets the alarm time.
 *
 * @param[in] time      the time to be set for the next alarm
 *
 * @notapi
 */
static inline void port_timer_set_alarm(systime_t time) {

  chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
              "port_timer_set_alarm(), #1",
              "not started");

  STM32F3_TIM2->CCR[0]  = time;
}

/**
 * @brief   Returns the current alarm time.
 *
 * @return              The currently set alarm time.
 *
 * @notapi
 */
static inline systime_t port_timer_get_alarm(void) {

  chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
              "port_timer_get_alarm(), #1",
              "not started");

  return STM32F3_TIM2->CCR[0];
}

#endif /* _CHTIMER_H_ */

/** @} */