1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
|
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file LPC8xx/hal_lld.c
* @brief LPC8xx HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
*/
#include "ch.h"
#include "hal.h"
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
/* SysTick initialization using the system clock.*/
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);
SysTick->LOAD = LPC8xx_SYSCLK / CH_FREQUENCY - 1;
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_ENABLE_Msk |
SysTick_CTRL_TICKINT_Msk;
}
/**
* @brief LPC8xx clocks and PLL initialization.
* @note This function must be invoked only after the system reset.
*
* @special
*/
void lpc8xx_clock_init(void) {
int i;
/* Enable clocks to IOCON & SWM. */
LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<18)|(1<<7));
/* System oscillator initialization.*/
#if (LPC8xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC)
// switch off pull-ups
LPC_IOCON->PIO0_8 &= ~(3<<3);
LPC_IOCON->PIO0_9 &= ~(3<<3);
// enable xtalin/xtalout
LPC_SWM->PINENABLE0 &= ~(3<<4);
LPC_SYSCON->SYSOSCCTRL = LPC8xx_SYSOSCCTRL;
LPC_SYSCON->PDRUNCFG &= ~(1<<5); /* System oscillator ON. */
for (i = 0; i<200; i++)
__NOP(); /* Stabilization delay. */
#endif
/* CLKIN initialization.*/
#if (LPC8xx_PLLCLK_SOURCE == SYSPLLCLKSEL_CLKIN)
// switch off pull-up
LPC_IOCON->PIO0_1 &= ~(3<<3);
// enable clkin
LPC_SWM->PINENABLE0 &= ~(1<<7);
#endif
/* Always set PLL clock source -
PLL IN can be a main clock source */
LPC_SYSCON->SYSPLLCLKSEL = LPC8xx_PLLCLK_SOURCE;
LPC_SYSCON->SYSPLLCLKUEN = 1;
while (!(LPC_SYSCON->SYSPLLCLKUEN & 0x01)); /* Wait Until Updated */
/* PLL initialization.*/
#if LPC8xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT
LPC_SYSCON->SYSPLLCTRL = LPC8xx_SYSPLLCTRL_MSEL | LPC8xx_SYSPLLCTRL_PSEL;
LPC_SYSCON->PDRUNCFG &= ~(1<<7); /* System PLL ON. */
while (!(LPC_SYSCON->SYSPLLSTAT & 1)) /* Wait PLL lock. */
;
#endif
#if LPC8xx_MAINCLK_SOURCE == SYSMAINCLKSEL_WDGOSC
#error "WatchDog Oscillator not configured! Dont use as main clock source"
LPC_SYSCON->WDTOSCCTRL = ??;
LPC_SYSCON->PDRUNCFG &= ~(1<<6); /* WDT OSC On */
for (i = 0; i<200; i++)
__NOP(); /* Stabilization delay. */
#endif
/* Flash wait states setting, the code takes care to not touch TBD bits.*/
LPC_FLASHCTRL->FLASHCFG = (LPC_FLASHCTRL->FLASHCFG & ~1) |
LPC8xx_FLASHCFG_FLASHTIM;
/* ABH divider initialization. Set this **before** switching Main clock
source to ensure AHB clock stays in spec */
LPC_SYSCON->SYSAHBCLKDIV = LPC8xx_SYSABHCLK_DIV;
/* Main clock source selection.*/
LPC_SYSCON->MAINCLKSEL = LPC8xx_MAINCLK_SOURCE;
LPC_SYSCON->MAINCLKUEN = 1;
while (!(LPC_SYSCON->MAINCLKUEN & 1)); /* Wait switch completion. */
/* Disable clocks to IOCON, SWM, FLASHREG & ROM. */
LPC_SYSCON->SYSAHBCLKCTRL &= ~((1<<18)|(1<<7)|(1<<3)|(1<<1));
}
/** @} */
|
