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/*
    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/
/*
   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
   aka barthess.
 */

/**
 * @file    hal_i2c.h
 * @brief   I2C Driver macros and structures.
 *
 * @addtogroup I2C
 * @{
 */

#ifndef HAL_I2C_H
#define HAL_I2C_H

#if (HAL_USE_I2C == TRUE) || defined(__DOXYGEN__)

/*===========================================================================*/
/* Driver constants.                                                         */
/*===========================================================================*/

/* TODO: To be reviewed, too STM32-centric.*/
/**
 * @name    I2C bus error conditions
 * @{
 */
#define I2C_NO_ERROR               0x00    /**< @brief No error.            */
#define I2C_BUS_ERROR              0x01    /**< @brief Bus Error.           */
#define I2C_ARBITRATION_LOST       0x02    /**< @brief Arbitration Lost.    */
#define I2C_ACK_FAILURE            0x04    /**< @brief Acknowledge Failure. */
#define I2C_OVERRUN                0x08    /**< @brief Overrun/Underrun.    */
#define I2C_PEC_ERROR              0x10    /**< @brief PEC Error in
                                                reception.                  */
#define I2C_TIMEOUT                0x20    /**< @brief Hardware timeout.    */
#define I2C_SMB_ALERT              0x40    /**< @brief SMBus Alert.         */
/** @} */

/*===========================================================================*/
/* Driver pre-compile time settings.                                         */
/*===========================================================================*/

/**
 * @brief   Enables the mutual exclusion APIs on the I2C bus.
 */
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION    TRUE
#endif

/*===========================================================================*/
/* Derived constants and error checks.                                       */
/*===========================================================================*/

/*===========================================================================*/
/* Driver data structures and types.                                         */
/*===========================================================================*/

/**
 * @brief   Driver state machine possible states.
 */
typedef enum {
  I2C_UNINIT = 0,                           /**< Not initialized.           */
  I2C_STOP = 1,                             /**< Stopped.                   */
  I2C_READY = 2,                            /**< Ready.                     */
  I2C_ACTIVE_TX = 3,                        /**< Transmitting.              */
  I2C_ACTIVE_RX = 4,                        /**< Receiving.                 */
  I2C_LOCKED = 5                            /**> Bus or driver locked.      */
} i2cstate_t;

#include "hal_i2c_lld.h"

/*===========================================================================*/
/* Driver macros.                                                            */
/*===========================================================================*/

/**
 * @brief   Wakes up the waiting thread notifying no errors.
 *
 * @param[in] i2cp      pointer to the @p I2CDriver object
 *
 * @notapi
 */
#define _i2c_wakeup_isr(i2cp) do {                                          \
  osalSysLockFromISR();                                                     \
  osalThreadResumeI(&(i2cp)->thread, MSG_OK);                               \
  osalSysUnlockFromISR();                                                   \
} while(0)

/**
 * @brief   Wakes up the waiting thread notifying errors.
 *
 * @param[in] i2cp      pointer to the @p I2CDriver object
 *
 * @notapi
 */
#define _i2c_wakeup_error_isr(i2cp) do {                                    \
  osalSysLockFromISR();                                                     \
  osalThreadResumeI(&(i2cp)->thread, MSG_RESET);                            \
  osalSysUnlockFromISR();                                                   \
} while(0)

/**
 * @brief   Wrap i2cMasterTransmitTimeout function with TIME_INFINITE timeout.
 * @api
 */
#define i2cMasterTransmit(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes)       \
  (i2cMasterTransmitTimeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes,     \
                            TIME_INFINITE))

/**
 * @brief   Wrap i2cMasterReceiveTimeout function with TIME_INFINITE timeout.
 * @api
 */
#define i2cMasterReceive(i2cp, addr, rxbuf, rxbytes)                        \
  (i2cMasterReceiveTimeout(i2cp, addr, rxbuf, rxbytes, TIME_INFINITE))

/*===========================================================================*/
/* External declarations.                                                    */
/*===========================================================================*/

#ifdef __cplusplus
extern "C" {
#endif
  void i2cInit(void);
  void i2cObjectInit(I2CDriver *i2cp);
  void i2cStart(I2CDriver *i2cp, const I2CConfig *config);
  void i2cStop(I2CDriver *i2cp);
  i2cflags_t i2cGetErrors(I2CDriver *i2cp);
  msg_t i2cMasterTransmitTimeout(I2CDriver *i2cp,
                                 i2caddr_t addr,
                                 const uint8_t *txbuf, size_t txbytes,
                                 uint8_t *rxbuf, size_t rxbytes,
                                 systime_t timeout);
  msg_t i2cMasterReceiveTimeout(I2CDriver *i2cp,
                                i2caddr_t addr,
                                uint8_t *rxbuf, size_t rxbytes,
                                systime_t timeout);
#if I2C_USE_MUTUAL_EXCLUSION == TRUE
  void i2cAcquireBus(I2CDriver *i2cp);
  void i2cReleaseBus(I2CDriver *i2cp);
#endif

#ifdef __cplusplus
}
#endif

#endif /* HAL_USE_I2C == TRUE */

#endif /* HAL_I2C_H */

/** @} */
ass="p">} long arch_do_dom0_op(dom0_op_t *op, dom0_op_t *u_dom0_op) { long ret = 0; if ( !IS_PRIV(current->domain) ) return -EPERM; switch ( op->cmd ) { case DOM0_MSR: { if ( op->u.msr.write ) { msr_cpu_mask = op->u.msr.cpu_mask; msr_addr = op->u.msr.msr; msr_lo = op->u.msr.in1; msr_hi = op->u.msr.in2; smp_call_function(write_msr_for, NULL, 1, 1); write_msr_for(NULL); } else { msr_cpu_mask = op->u.msr.cpu_mask; msr_addr = op->u.msr.msr; smp_call_function(read_msr_for, NULL, 1, 1); read_msr_for(NULL); op->u.msr.out1 = msr_lo; op->u.msr.out2 = msr_hi; copy_to_user(u_dom0_op, op, sizeof(*op)); } ret = 0; } break; case DOM0_SHADOW_CONTROL: { struct domain *d; ret = -ESRCH; d = find_domain_by_id(op->u.shadow_control.domain); if ( d != NULL ) { ret = shadow_mode_control(d, &op->u.shadow_control); put_domain(d); copy_to_user(u_dom0_op, op, sizeof(*op)); } } break; case DOM0_ADD_MEMTYPE: { ret = mtrr_add_page( op->u.add_memtype.pfn, op->u.add_memtype.nr_pfns, op->u.add_memtype.type, 1); } break; case DOM0_DEL_MEMTYPE: { ret = mtrr_del_page(op->u.del_memtype.reg, 0, 0); } break; case DOM0_READ_MEMTYPE: { unsigned long pfn; unsigned int nr_pfns; mtrr_type type; ret = -EINVAL; if ( op->u.read_memtype.reg < num_var_ranges ) { mtrr_if->get(op->u.read_memtype.reg, &pfn, &nr_pfns, &type); (void)__put_user(pfn, &u_dom0_op->u.read_memtype.pfn); (void)__put_user(nr_pfns, &u_dom0_op->u.read_memtype.nr_pfns); (void)__put_user(type, &u_dom0_op->u.read_memtype.type); ret = 0; } } break; case DOM0_MICROCODE: { extern int microcode_update(void *buf, unsigned long len); ret = microcode_update(op->u.microcode.data, op->u.microcode.length); } break; case DOM0_IOPORT_PERMISSION: { struct domain *d; unsigned int fp = op->u.ioport_permission.first_port; unsigned int np = op->u.ioport_permission.nr_ports; unsigned int p; ret = -EINVAL; if ( (fp + np) >= 65536 ) break; ret = -ESRCH; if ( unlikely((d = find_domain_by_id( op->u.ioport_permission.domain)) == NULL) ) break; ret = -ENOMEM; if ( d->arch.iobmp_mask != NULL ) { if ( (d->arch.iobmp_mask = xmalloc_array( u8, IOBMP_BYTES)) == NULL ) { put_domain(d); break; } memset(d->arch.iobmp_mask, 0xFF, IOBMP_BYTES); } ret = 0; for ( p = fp; p < (fp + np); p++ ) { if ( op->u.ioport_permission.allow_access ) clear_bit(p, d->arch.iobmp_mask); else set_bit(p, d->arch.iobmp_mask); } put_domain(d); } break; case DOM0_PHYSINFO: { dom0_physinfo_t *pi = &op->u.physinfo; pi->ht_per_core = ht_per_core; pi->cores = num_online_cpus() / ht_per_core; pi->total_pages = max_page; pi->free_pages = avail_domheap_pages(); pi->cpu_khz = cpu_khz; copy_to_user(u_dom0_op, op, sizeof(*op)); ret = 0; } break; case DOM0_GETPAGEFRAMEINFO: { struct pfn_info *page; unsigned long pfn = op->u.getpageframeinfo.pfn; domid_t dom = op->u.getpageframeinfo.domain; struct domain *d; ret = -EINVAL; if ( unlikely(pfn >= max_page) || unlikely((d = find_domain_by_id(dom)) == NULL) ) break; page = &frame_table[pfn]; if ( likely(get_page(page, d)) ) { ret = 0; op->u.getpageframeinfo.type = NOTAB; if ( (page->u.inuse.type_info & PGT_count_mask) != 0 ) { switch ( page->u.inuse.type_info & PGT_type_mask ) { case PGT_l1_page_table: op->u.getpageframeinfo.type = L1TAB; break; case PGT_l2_page_table: op->u.getpageframeinfo.type = L2TAB; break; case PGT_l3_page_table: op->u.getpageframeinfo.type = L3TAB; break; case PGT_l4_page_table: op->u.getpageframeinfo.type = L4TAB; break; } } put_page(page); } put_domain(d); copy_to_user(u_dom0_op, op, sizeof(*op)); } break; case DOM0_GETPAGEFRAMEINFO2: { #define GPF2_BATCH 128 int n,j; int num = op->u.getpageframeinfo2.num; domid_t dom = op->u.getpageframeinfo2.domain; unsigned long *s_ptr = (unsigned long*) op->u.getpageframeinfo2.array; struct domain *d; unsigned long *l_arr; ret = -ESRCH; if ( unlikely((d = find_domain_by_id(dom)) == NULL) ) break; if ( unlikely(num > 1024) ) { ret = -E2BIG; break; } l_arr = (unsigned long *)alloc_xenheap_page(); ret = 0; for( n = 0; n < num; ) { int k = ((num-n)>GPF2_BATCH)?GPF2_BATCH:(num-n); if ( copy_from_user(l_arr, &s_ptr[n], k*sizeof(unsigned long)) ) { ret = -EINVAL; break; } for( j = 0; j < k; j++ ) { struct pfn_info *page; unsigned long mfn = l_arr[j]; if ( unlikely(mfn >= max_page) ) goto e2_err; page = &frame_table[mfn]; if ( likely(get_page(page, d)) ) { unsigned long type = 0; switch( page->u.inuse.type_info & PGT_type_mask ) { case PGT_l1_page_table: type = L1TAB; break; case PGT_l2_page_table: type = L2TAB; break; case PGT_l3_page_table: type = L3TAB; break; case PGT_l4_page_table: type = L4TAB; break; } if ( page->u.inuse.type_info & PGT_pinned ) type |= LPINTAB; l_arr[j] |= type; put_page(page); } else { e2_err: l_arr[j] |= XTAB; } } if ( copy_to_user(&s_ptr[n], l_arr, k*sizeof(unsigned long)) ) { ret = -EINVAL; break; } n += j; } free_xenheap_page((unsigned long)l_arr); put_domain(d); } break; case DOM0_GETMEMLIST: { int i; struct domain *d = find_domain_by_id(op->u.getmemlist.domain); unsigned long max_pfns = op->u.getmemlist.max_pfns; unsigned long pfn; unsigned long *buffer = op->u.getmemlist.buffer; struct list_head *list_ent; ret = -EINVAL; if ( d != NULL ) { ret = 0; spin_lock(&d->page_alloc_lock); list_ent = d->page_list.next; for ( i = 0; (i < max_pfns) && (list_ent != &d->page_list); i++ ) { pfn = list_entry(list_ent, struct pfn_info, list) - frame_table; if ( put_user(pfn, buffer) ) { ret = -EFAULT; break; } buffer++; list_ent = frame_table[pfn].list.next; } spin_unlock(&d->page_alloc_lock); op->u.getmemlist.num_pfns = i; copy_to_user(u_dom0_op, op, sizeof(*op)); put_domain(d); } } break; default: ret = -ENOSYS; } return ret; } void arch_getdomaininfo_ctxt( struct vcpu *v, struct vcpu_guest_context *c) { #ifdef __i386__ /* Remove when x86_64 VMX is implemented */ #ifdef CONFIG_VMX extern void save_vmx_cpu_user_regs(struct cpu_user_regs *); #endif #endif memcpy(c, &v->arch.guest_context, sizeof(*c)); /* IOPL privileges are virtualised -- merge back into returned eflags. */ BUG_ON((c->user_regs.eflags & EF_IOPL) != 0); c->user_regs.eflags |= v->arch.iopl << 12; #ifdef __i386__ #ifdef CONFIG_VMX if ( VMX_DOMAIN(v) ) save_vmx_cpu_user_regs(&c->user_regs); #endif #endif c->flags = 0; if ( test_bit(_VCPUF_fpu_initialised, &v->vcpu_flags) ) c->flags |= VGCF_I387_VALID; if ( KERNEL_MODE(v, &v->arch.guest_context.user_regs) ) c->flags |= VGCF_IN_KERNEL; #ifdef CONFIG_VMX if (VMX_DOMAIN(v)) c->flags |= VGCF_VMX_GUEST; #endif c->pt_base = pagetable_get_paddr(v->arch.guest_table); c->vm_assist = v->domain->vm_assist; }