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-rw-r--r--testhal/STM32/STM32F4xx/EXT/Makefile8
-rw-r--r--testhal/STM32/STM32F4xx/EXT/chconf.h44
2 files changed, 41 insertions, 11 deletions
diff --git a/testhal/STM32/STM32F4xx/EXT/Makefile b/testhal/STM32/STM32F4xx/EXT/Makefile
index 83bb8fe99..4854b9300 100644
--- a/testhal/STM32/STM32F4xx/EXT/Makefile
+++ b/testhal/STM32/STM32F4xx/EXT/Makefile
@@ -69,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
USE_EXCEPTIONS_STACKSIZE = 0x400
endif
-# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+# Enables the use of FPU (no, softfp, hard).
ifeq ($(USE_FPU),)
USE_FPU = no
endif
@@ -88,7 +88,7 @@ PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../../..
# Startup files.
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
@@ -96,7 +96,7 @@ include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
# Other files (optional).
#include $(CHIBIOS)/test/rt/test.mk
@@ -212,5 +212,5 @@ ULIBS =
# End of user defines
##############################################################################
-RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
include $(RULESPATH)/rules.mk
diff --git a/testhal/STM32/STM32F4xx/EXT/chconf.h b/testhal/STM32/STM32F4xx/EXT/chconf.h
index 405149b3b..edd657ac1 100644
--- a/testhal/STM32/STM32F4xx/EXT/chconf.h
+++ b/testhal/STM32/STM32F4xx/EXT/chconf.h
@@ -28,6 +28,8 @@
#ifndef _CHCONF_H_
#define _CHCONF_H_
+#define _CHIBIOS_RT_CONF_
+
/*===========================================================================*/
/**
* @name System timers settings
@@ -325,7 +327,7 @@
*
* @note The default is @p FALSE.
*/
-#define CH_DBG_STATISTICS TRUE
+#define CH_DBG_STATISTICS FALSE
/**
* @brief Debug option, system state check.
@@ -360,9 +362,16 @@
* @details If enabled then the context switch circular trace buffer is
* activated.
*
- * @note The default is @p FALSE.
+ * @note The default is @p CH_DBG_TRACE_MASK_NONE.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_NONE.
*/
-#define CH_DBG_ENABLE_TRACE TRUE
+#define CH_DBG_TRACE_BUFFER_SIZE 128
/**
* @brief Debug option, stack checks.
@@ -427,10 +436,6 @@
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
- *
- * @note It is inserted into lock zone.
- * @note It is also invoked when the threads simply return in order to
- * terminate.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
@@ -445,12 +450,27 @@
}
/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
+/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
}
/**
@@ -460,6 +480,7 @@
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
}
/**
@@ -488,6 +509,15 @@
/* System halt code here.*/ \
}
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
/** @} */
/*===========================================================================*/