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-rw-r--r--os/hal/platforms/STM32/DMAv1/stm32_dma.c4
-rw-r--r--os/hal/platforms/STM32/DMAv1/stm32_dma.h55
-rw-r--r--os/ports/GCC/ARMCMx/crt0.c7
3 files changed, 61 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32/DMAv1/stm32_dma.c b/os/hal/platforms/STM32/DMAv1/stm32_dma.c
index 3fb1b2dc6..84e372c26 100644
--- a/os/hal/platforms/STM32/DMAv1/stm32_dma.c
+++ b/os/hal/platforms/STM32/DMAv1/stm32_dma.c
@@ -100,8 +100,8 @@ const stm32_dma_stream_t _stm32_dma_streams[STM32_DMA_STREAMS] = {
* @brief DMA ISR redirector type.
*/
typedef struct {
- stm32_dmaisr_t dma_func;
- void *dma_param;
+ stm32_dmaisr_t dma_func; /**< @brief DMA callback function. */
+ void *dma_param; /**< @brief DMA callback parameter. */
} dma_isr_redir_t;
/**
diff --git a/os/hal/platforms/STM32/DMAv1/stm32_dma.h b/os/hal/platforms/STM32/DMAv1/stm32_dma.h
index 22be4a67e..f209898d4 100644
--- a/os/hal/platforms/STM32/DMAv1/stm32_dma.h
+++ b/os/hal/platforms/STM32/DMAv1/stm32_dma.h
@@ -153,6 +153,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief Associates a peripheral data register to a DMA stream.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
* @param[in] addr value to be written in the CPAR register
@@ -166,6 +168,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief Associates a memory destination to a DMA stream.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
* @param[in] addr value to be written in the CMAR register
@@ -179,6 +183,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief Sets the number of transfers to be performed.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
* @param[in] size value to be written in the CNDTR register
@@ -192,6 +198,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief Returns the number of transfers to be performed.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
* @return The number of transfers to be performed.
@@ -203,6 +211,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief Programs the stream mode settings.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
* @param[in] mode value to be written in the CCR register
@@ -216,6 +226,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief DMA stream enable.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
*
@@ -228,6 +240,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief DMA stream disable.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
*
@@ -240,6 +254,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/**
* @brief DMA stream interrupt sources clear.
* @note This function can be invoked in both ISR or thread context.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
*
@@ -249,6 +265,45 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
*(dmastp)->ifcr = STM32_DMA_ISR_MASK << (dmastp)->ishift; \
}
+/**
+ * @brief Starts a memory to memory operation using the specified stream.
+ * @note The default transfer data mode is "byte to byte" but it can be
+ * changed by specifying extra options in the @p mode parameter.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
+ *
+ * @param[in] dmastp pointer to a stm32_dma_stream_t structure
+ * @param[in] mode value to be written in the CCR register, this value
+ * is implicitly ORed with:
+ * - @p STM32_DMA_CR_MINC
+ * - @p STM32_DMA_CR_PINC
+ * - @p STM32_DMA_CR_DIR_M2M
+ * - @p STM32_DMA_CR_EN
+ * .
+ * @param[in] src source address
+ * @param[in] dst destination address
+ * @param[in] n number of data units to copy
+ */
+#define dmaStartMemCopy(dmastp, mode, src, dst, n) { \
+ dmaStreamSetPeripheral(dmastp, src); \
+ dmaStreamSetMemory0(dmastp, dst); \
+ dmaStreamGetTransactionSize(dmastp, n); \
+ dmaStreamSetMode(dmastp, (mode) | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \
+ STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \
+}
+
+/**
+ * @brief Polled wait for DMA transfer end.
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
+ * @post After use the stream can be released using @p dmaStreamRelease().
+ *
+ * @param[in] dmastp pointer to a stm32_dma_stream_t structure
+ */
+#define dmaWaitCompletion(dmastp) \
+ while (((dmastp)->channel->CNDTR > 0) && \
+ ((dmastp)->channel->CCR & STM32_DMA_CR_EN))
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
diff --git a/os/ports/GCC/ARMCMx/crt0.c b/os/ports/GCC/ARMCMx/crt0.c
index e2cb2b3de..0737c467b 100644
--- a/os/ports/GCC/ARMCMx/crt0.c
+++ b/os/ports/GCC/ARMCMx/crt0.c
@@ -251,13 +251,14 @@ __attribute__((naked))
void ResetHandler(void) {
uint32_t psp, ctl;
- /* Process Stack initialization, it is allocated below the main stack. The
- main stack is assumed to be allocated starting from @p __ram_end__
- extending downward.*/
+ /* Process Stack initialization, it is allocated starting from the
+ symbol __process_stack_end__ and its lower limit is the symbol
+ __process_stack_base__.*/
asm volatile ("cpsid i");
psp = SYMVAL(__process_stack_end__);
asm volatile ("msr PSP, %0" : : "r" (psp));
+ /* CPU mode initialization.*/
ctl = CRT0_CONTROL_INIT;
asm volatile ("msr CONTROL, %0" : : "r" (ctl));
asm volatile ("isb");
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-16 12:08:54 +0000