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-rw-r--r--os/hal/platforms/STM32F0xx/hal_lld.c2
-rw-r--r--os/hal/platforms/STM32F4xx/hal_lld.c10
-rw-r--r--os/hal/platforms/STM32L1xx/hal_lld.c6
3 files changed, 9 insertions, 9 deletions
diff --git a/os/hal/platforms/STM32F0xx/hal_lld.c b/os/hal/platforms/STM32F0xx/hal_lld.c
index 7c5bdce8e..debc51ea3 100644
--- a/os/hal/platforms/STM32F0xx/hal_lld.c
+++ b/os/hal/platforms/STM32F0xx/hal_lld.c
@@ -101,7 +101,7 @@ void hal_lld_init(void) {
/* Reset of all peripherals.*/
rccResetAPB1(0xFFFFFFFF);
- rccResetAPB2(!RCC_APB2RSTR_DBGMCURST);
+ rccResetAPB2(~RCC_APB2RSTR_DBGMCURST);
/* SysTick initialization using the system clock.*/
SysTick->LOAD = STM32_HCLK / CH_FREQUENCY - 1;
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index 603371b2c..f72812da9 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -95,11 +95,11 @@ void hal_lld_init(void) {
/* Reset of all peripherals. AHB3 is not reseted because it could have
been initialized in the board initialization file (board.c).*/
- rccResetAHB1(!0);
- rccResetAHB2(!0);
- rccResetAHB3(!0);
- rccResetAPB1(!RCC_APB1RSTR_PWRRST);
- rccResetAPB2(!0);
+ rccResetAHB1(~0);
+ rccResetAHB2(~0);
+ rccResetAHB3(~0);
+ rccResetAPB1(~RCC_APB1RSTR_PWRRST);
+ rccResetAPB2(~0);
/* SysTick initialization using the system clock.*/
SysTick->LOAD = STM32_HCLK / CH_FREQUENCY - 1;
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c
index 607893220..529099e6a 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.c
+++ b/os/hal/platforms/STM32L1xx/hal_lld.c
@@ -94,9 +94,9 @@ static void hal_lld_backup_domain_init(void) {
void hal_lld_init(void) {
/* Reset of all peripherals.*/
- rccResetAHB(!RCC_AHBRSTR_FLITFRST);
- rccResetAPB1(!RCC_APB1RSTR_PWRRST);
- rccResetAPB2(!0);
+ rccResetAHB(~RCC_AHBRSTR_FLITFRST);
+ rccResetAPB1(~RCC_APB1RSTR_PWRRST);
+ rccResetAPB2(~0);
/* SysTick initialization using the system clock.*/
SysTick->LOAD = STM32_HCLK / CH_FREQUENCY - 1;