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-rw-r--r--os/hal/osal/chibios/osal.c7
-rw-r--r--os/hal/osal/chibios/osal.h9
-rw-r--r--os/hal/platforms/STM32/SPIv2/spi_lld.c12
-rw-r--r--os/hal/platforms/STM32/can_lld.c12
-rw-r--r--os/hal/platforms/STM32/icu_lld.c4
-rw-r--r--os/hal/platforms/STM32/pwm_lld.c6
-rw-r--r--os/hal/platforms/STM32F30x/adc_lld.c11
-rw-r--r--os/hal/platforms/STM32F30x/stm32_dma.c2
-rw-r--r--os/hal/src/adc.c15
-rw-r--r--os/hal/src/can.c12
-rw-r--r--os/hal/src/icu.c8
-rw-r--r--os/hal/src/pwm.c13
-rw-r--r--os/hal/src/serial.c4
-rw-r--r--os/hal/src/spi.c41
14 files changed, 67 insertions, 89 deletions
diff --git a/os/hal/osal/chibios/osal.c b/os/hal/osal/chibios/osal.c
index 8b0398538..65912ce7e 100644
--- a/os/hal/osal/chibios/osal.c
+++ b/os/hal/osal/chibios/osal.c
@@ -96,7 +96,7 @@ void osalSysHalt(const char *reason) {
*/
msg_t osalThreadSuspendS(thread_reference_t *trp) {
- chDbgAssert(*trp == NULL, "osalThreadSuspendS(), #1", "not NULL");
+ chDbgAssert(*trp == NULL, "not NULL");
*trp = (thread_reference_t)chThdSelf();
chSchGoSleepS(CH_STATE_SUSPENDED);
@@ -118,7 +118,7 @@ void osalThreadResumeI(thread_reference_t *trp, msg_t msg) {
if (*trp != NULL) {
chDbgAssert((*trp)->p_state == CH_STATE_SUSPENDED,
- "osalThreadResumeI(), #1", "not THD_STATE_SUSPENDED");
+ "not THD_STATE_SUSPENDED");
(*trp)->p_u.rdymsg = msg;
chSchReadyI((thread_t *)*trp);
@@ -141,8 +141,7 @@ void osalThreadResumeS(thread_reference_t *trp, msg_t msg) {
if (*trp != NULL) {
thread_t *tp = (thread_t *)*trp;
- chDbgAssert(tp->p_state == CH_STATE_SUSPENDED,
- "osalThreadResumeS(), #1", "not THD_STATE_SUSPENDED");
+ chDbgAssert(tp->p_state == CH_STATE_SUSPENDED, "not THD_STATE_SUSPENDED");
*trp = NULL;
chSchWakeupS(tp, msg);
diff --git a/os/hal/osal/chibios/osal.h b/os/hal/osal/chibios/osal.h
index 726782d8b..fa48f3aa6 100644
--- a/os/hal/osal/chibios/osal.h
+++ b/os/hal/osal/chibios/osal.h
@@ -188,8 +188,8 @@ typedef struct {
/**
* @brief Condition assertion.
- * @details If the condition check fails then the OSAL panics with the
- * specified message and halts.
+ * @details If the condition check fails then the OSAL panics with a
+ * message and halts.
* @note The condition is tested only if the @p OSAL_ENABLE_ASSERTIONS
* switch is enabled.
* @note The convention for the message is the following:<br>
@@ -198,12 +198,11 @@ typedef struct {
* comment in the code about the assertion.
*
* @param[in] c the condition to be verified to be true
- * @param[in] msg the text message
* @param[in] remark a remark string
*
* @api
*/
-#define osalDbgAssert(c, msg, remark) chDbgAssert(c, msg, remark)
+#define osalDbgAssert(c, remark) chDbgAssert(c, remark)
/**
* @brief Function parameters check.
@@ -215,7 +214,7 @@ typedef struct {
*
* @api
*/
-#define osalDbgCheck(c) chDbgCheck(c, __FUNCTION__)
+#define osalDbgCheck(c) chDbgCheck(c)
/**
* @brief I-Class state check.
diff --git a/os/hal/platforms/STM32/SPIv2/spi_lld.c b/os/hal/platforms/STM32/SPIv2/spi_lld.c
index 712d824f6..3cbcc0fc0 100644
--- a/os/hal/platforms/STM32/SPIv2/spi_lld.c
+++ b/os/hal/platforms/STM32/SPIv2/spi_lld.c
@@ -221,12 +221,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI1(FALSE);
}
#endif
@@ -237,12 +237,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #3", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #4", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI2(FALSE);
}
#endif
@@ -253,12 +253,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #5", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- osalDbgAssert(!b, "spi_lld_start(), #6", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI3(FALSE);
}
#endif
diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c
index 2febf5bc9..a53a8fe27 100644
--- a/os/hal/platforms/STM32/can_lld.c
+++ b/os/hal/platforms/STM32/can_lld.c
@@ -404,8 +404,7 @@ void can_lld_start(CANDriver *canp) {
#if STM32_CAN_USE_CAN2
if (&CAND2 == canp) {
- osalDbgAssert(CAND1.state != CAN_STOP,
- "can_lld_start(), #1", "CAN1 must be started");
+ osalDbgAssert(CAND1.state != CAN_STOP, "CAN1 must be started");
nvicEnableVector(STM32_CAN2_TX_NUMBER, STM32_CAN_CAN2_IRQ_PRIORITY);
nvicEnableVector(STM32_CAN2_RX0_NUMBER, STM32_CAN_CAN2_IRQ_PRIORITY);
@@ -447,8 +446,7 @@ void can_lld_stop(CANDriver *canp) {
if (&CAND1 == canp) {
#if STM32_CAN_USE_CAN2
- osalDbgAssert(CAND2.state == CAN_STOP,
- "can_lld_stop(), #1", "CAN2 must be stopped");
+ osalDbgAssert(CAND2.state == CAN_STOP, "CAN2 must be stopped");
#endif
CAN1->MCR = 0x00010002; /* Register reset value. */
@@ -690,12 +688,10 @@ void canSTM32SetFilters(uint32_t can2sb, uint32_t num, const CANFilter *cfp) {
(num < STM32_CAN_MAX_FILTERS));
#if STM32_CAN_USE_CAN1
- osalDbgAssert(CAND1.state == CAN_STOP,
- "canSTM32SetFilters(), #1", "invalid state");
+ osalDbgAssert(CAND1.state == CAN_STOP, "invalid state");
#endif
#if STM32_CAN_USE_CAN2
- osalDbgAssert(CAND2.state == CAN_STOP,
- "canSTM32SetFilters(), #2", "invalid state");
+ osalDbgAssert(CAND2.state == CAN_STOP, "invalid state");
#endif
can_lld_set_filters(can2sb, num, cfp);
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c
index 149231aa3..73699c637 100644
--- a/os/hal/platforms/STM32/icu_lld.c
+++ b/os/hal/platforms/STM32/icu_lld.c
@@ -392,7 +392,7 @@ void icu_lld_start(ICUDriver *icup) {
osalDbgAssert((icup->config->channel == ICU_CHANNEL_1) ||
(icup->config->channel == ICU_CHANNEL_2),
- "icu_lld_start(), #1", "invalid input");
+ "invalid input");
if (icup->state == ICU_STOP) {
/* Clock activation and timer reset.*/
@@ -469,7 +469,7 @@ void icu_lld_start(ICUDriver *icup) {
psc = (icup->clock / icup->config->frequency) - 1;
osalDbgAssert((psc <= 0xFFFF) &&
((psc + 1) * icup->config->frequency) == icup->clock,
- "icu_lld_start(), #1", "invalid frequency");
+ "invalid frequency");
icup->tim->PSC = (uint16_t)psc;
icup->tim->ARR = 0xFFFF;
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index a8850924f..c3109beee 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -488,9 +488,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
/* Timer configuration.*/
psc = (pwmp->clock / pwmp->config->frequency) - 1;
- chDbgAssert((psc <= 0xFFFF) &&
- ((psc + 1) * pwmp->config->frequency) == pwmp->clock,
- "pwm_lld_start(), #1", "invalid frequency");
+ osalDbgAssert((psc <= 0xFFFF) &&
+ ((psc + 1) * pwmp->config->frequency) == pwmp->clock,
+ "invalid frequency");
pwmp->tim->PSC = (uint16_t)psc;
pwmp->tim->ARR = (uint16_t)(pwmp->period - 1);
pwmp->tim->CR2 = pwmp->config->cr2;
diff --git a/os/hal/platforms/STM32F30x/adc_lld.c b/os/hal/platforms/STM32F30x/adc_lld.c
index 768420c52..d516cf21b 100644
--- a/os/hal/platforms/STM32F30x/adc_lld.c
+++ b/os/hal/platforms/STM32F30x/adc_lld.c
@@ -147,14 +147,12 @@ static void adc_lld_analog_off(ADCDriver *adcp) {
*/
static void adc_lld_calibrate(ADCDriver *adcp) {
- osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN_0, "adc_lld_calibrate(), #1",
- "invalid register state");
+ osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN_0, "invalid register state");
adcp->adcm->CR |= ADC_CR_ADCAL;
while ((adcp->adcm->CR & ADC_CR_ADCAL) != 0)
;
#if STM32_ADC_DUAL_MODE
- osalDbgAssert(adcp->adcs->CR == ADC_CR_ADVREGEN_0, "adc_lld_calibrate(), #2",
- "invalid register state");
+ osalDbgAssert(adcp->adcs->CR == ADC_CR_ADVREGEN_0, "invalid register state");
adcp->adcs->CR |= ADC_CR_ADCAL;
while ((adcp->adcs->CR & ADC_CR_ADCAL) != 0)
;
@@ -377,7 +375,7 @@ void adc_lld_start(ADCDriver *adcp) {
STM32_ADC_ADC12_DMA_IRQ_PRIORITY,
(stm32_dmaisr_t)adc_lld_serve_dma_interrupt,
(void *)adcp);
- osalDbgAssert(!b, "adc_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableADC12(FALSE);
}
#endif /* STM32_ADC_USE_ADC1 */
@@ -389,7 +387,7 @@ void adc_lld_start(ADCDriver *adcp) {
STM32_ADC_ADC34_DMA_IRQ_PRIORITY,
(stm32_dmaisr_t)adc_lld_serve_dma_interrupt,
(void *)adcp);
- osalDbgAssert(!b, "adc_lld_start(), #2", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableADC34(FALSE);
}
#endif /* STM32_ADC_USE_ADC2 */
@@ -459,7 +457,6 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
const ADCConversionGroup *grpp = adcp->grpp;
osalDbgAssert(!STM32_ADC_DUAL_MODE || ((grpp->num_channels & 1) == 0),
- "adc_lld_start_conversion(), #1",
"odd number of channels in dual mode");
/* Calculating control registers values.*/
diff --git a/os/hal/platforms/STM32F30x/stm32_dma.c b/os/hal/platforms/STM32F30x/stm32_dma.c
index 430a9f667..eb73f1b37 100644
--- a/os/hal/platforms/STM32F30x/stm32_dma.c
+++ b/os/hal/platforms/STM32F30x/stm32_dma.c
@@ -427,7 +427,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
/* Check if the streams is not taken.*/
osalDbgAssert((dma_streams_mask & (1 << dmastp->selfindex)) != 0,
- "dmaStreamRelease(), #1", "not allocated");
+ "not allocated");
/* Disables the associated IRQ vector.*/
nvicDisableVector(dmastp->vector);
diff --git a/os/hal/src/adc.c b/os/hal/src/adc.c
index ccc11574a..e6d8d8075 100644
--- a/os/hal/src/adc.c
+++ b/os/hal/src/adc.c
@@ -102,7 +102,7 @@ void adcStart(ADCDriver *adcp, const ADCConfig *config) {
osalSysLock();
osalDbgAssert((adcp->state == ADC_STOP) || (adcp->state == ADC_READY),
- "adcStart(), #1", "invalid state");
+ "invalid state");
adcp->config = config;
adc_lld_start(adcp);
adcp->state = ADC_READY;
@@ -122,7 +122,7 @@ void adcStop(ADCDriver *adcp) {
osalSysLock();
osalDbgAssert((adcp->state == ADC_STOP) || (adcp->state == ADC_READY),
- "adcStop(), #1", "invalid state");
+ "invalid state");
adc_lld_stop(adcp);
adcp->state = ADC_STOP;
osalSysUnlock();
@@ -183,7 +183,7 @@ void adcStartConversionI(ADCDriver *adcp,
osalDbgAssert((adcp->state == ADC_READY) ||
(adcp->state == ADC_COMPLETE) ||
(adcp->state == ADC_ERROR),
- "adcStartConversionI(), #1", "not ready");
+ "not ready");
adcp->samples = samples;
adcp->depth = depth;
@@ -207,9 +207,8 @@ void adcStopConversion(ADCDriver *adcp) {
osalDbgCheck(adcp != NULL);
osalSysLock();
- osalDbgAssert((adcp->state == ADC_READY) ||
- (adcp->state == ADC_ACTIVE),
- "adcStopConversion(), #1", "invalid state");
+ osalDbgAssert((adcp->state == ADC_READY) || (adcp->state == ADC_ACTIVE),
+ "invalid state");
if (adcp->state != ADC_READY) {
adc_lld_stop_conversion(adcp);
adcp->grpp = NULL;
@@ -236,7 +235,7 @@ void adcStopConversionI(ADCDriver *adcp) {
osalDbgAssert((adcp->state == ADC_READY) ||
(adcp->state == ADC_ACTIVE) ||
(adcp->state == ADC_COMPLETE),
- "adcStopConversionI(), #1", "invalid state");
+ "invalid state");
if (adcp->state != ADC_READY) {
adc_lld_stop_conversion(adcp);
@@ -277,7 +276,7 @@ msg_t adcConvert(ADCDriver *adcp,
msg_t msg;
osalSysLock();
- osalDbgAssert(adcp->thread == NULL, "adcConvert(), #1", "already waiting");
+ osalDbgAssert(adcp->thread == NULL, "already waiting");
adcStartConversionI(adcp, grpp, samples, depth);
msg = osalThreadSuspendS(&adcp->thread);
osalSysUnlock();
diff --git a/os/hal/src/can.c b/os/hal/src/can.c
index 9a352ddd1..ed5c43f87 100644
--- a/os/hal/src/can.c
+++ b/os/hal/src/can.c
@@ -104,7 +104,7 @@ void canStart(CANDriver *canp, const CANConfig *config) {
osalDbgAssert((canp->state == CAN_STOP) ||
(canp->state == CAN_STARTING) ||
(canp->state == CAN_READY),
- "canStart(), #1", "invalid state");
+ "invalid state");
while (canp->state == CAN_STARTING)
osalThreadSleepS(1);
if (canp->state == CAN_STOP) {
@@ -128,7 +128,7 @@ void canStop(CANDriver *canp) {
osalSysLock();
osalDbgAssert((canp->state == CAN_STOP) || (canp->state == CAN_READY),
- "canStop(), #1", "invalid state");
+ "invalid state");
can_lld_stop(canp);
canp->state = CAN_STOP;
osalQueueWakeupAllI(&canp->rxqueue, MSG_RESET);
@@ -168,7 +168,7 @@ msg_t canTransmit(CANDriver *canp,
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
- "canTransmit(), #1", "invalid state");
+ "invalid state");
while ((canp->state == CAN_SLEEP) || !can_lld_is_tx_empty(canp, mailbox)) {
msg_t msg = osalQueueGoSleepTimeoutS(&canp->txqueue, timeout);
if (msg != MSG_OK) {
@@ -213,7 +213,7 @@ msg_t canReceive(CANDriver *canp,
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
- "canReceive(), #1", "invalid state");
+ "invalid state");
while ((canp->state == CAN_SLEEP) || !can_lld_is_rx_nonempty(canp, mailbox)) {
msg_t msg = osalQueueGoSleepTimeoutS(&canp->rxqueue, timeout);
if (msg != MSG_OK) {
@@ -245,7 +245,7 @@ void canSleep(CANDriver *canp) {
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
- "canSleep(), #1", "invalid state");
+ "invalid state");
if (canp->state == CAN_READY) {
can_lld_sleep(canp);
canp->state = CAN_SLEEP;
@@ -268,7 +268,7 @@ void canWakeup(CANDriver *canp) {
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
- "canWakeup(), #1", "invalid state");
+ "invalid state");
if (canp->state == CAN_SLEEP) {
can_lld_wakeup(canp);
canp->state = CAN_READY;
diff --git a/os/hal/src/icu.c b/os/hal/src/icu.c
index 401c0e04c..291b6df9a 100644
--- a/os/hal/src/icu.c
+++ b/os/hal/src/icu.c
@@ -89,7 +89,7 @@ void icuStart(ICUDriver *icup, const ICUConfig *config) {
osalSysLock();
osalDbgAssert((icup->state == ICU_STOP) || (icup->state == ICU_READY),
- "icuStart(), #1", "invalid state");
+ "invalid state");
icup->config = config;
icu_lld_start(icup);
icup->state = ICU_READY;
@@ -109,7 +109,7 @@ void icuStop(ICUDriver *icup) {
osalSysLock();
osalDbgAssert((icup->state == ICU_STOP) || (icup->state == ICU_READY),
- "icuStop(), #1", "invalid state");
+ "invalid state");
icu_lld_stop(icup);
icup->state = ICU_STOP;
osalSysUnlock();
@@ -127,7 +127,7 @@ void icuEnable(ICUDriver *icup) {
osalDbgCheck(icup != NULL);
osalSysLock();
- osalDbgAssert(icup->state == ICU_READY, "icuEnable(), #1", "invalid state");
+ osalDbgAssert(icup->state == ICU_READY, "invalid state");
icu_lld_enable(icup);
icup->state = ICU_WAITING;
osalSysUnlock();
@@ -147,7 +147,7 @@ void icuDisable(ICUDriver *icup) {
osalSysLock();
osalDbgAssert((icup->state == ICU_READY) || (icup->state == ICU_WAITING) ||
(icup->state == ICU_ACTIVE) || (icup->state == ICU_IDLE),
- "icuDisable(), #1", "invalid state");
+ "invalid state");
icu_lld_disable(icup);
icup->state = ICU_READY;
osalSysUnlock();
diff --git a/os/hal/src/pwm.c b/os/hal/src/pwm.c
index bde512176..dfbe32df3 100644
--- a/os/hal/src/pwm.c
+++ b/os/hal/src/pwm.c
@@ -94,7 +94,7 @@ void pwmStart(PWMDriver *pwmp, const PWMConfig *config) {
osalSysLock();
osalDbgAssert((pwmp->state == PWM_STOP) || (pwmp->state == PWM_READY),
- "pwmStart(), #1", "invalid state");
+ "invalid state");
pwmp->config = config;
pwmp->period = config->period;
pwm_lld_start(pwmp);
@@ -115,7 +115,7 @@ void pwmStop(PWMDriver *pwmp) {
osalSysLock();
osalDbgAssert((pwmp->state == PWM_STOP) || (pwmp->state == PWM_READY),
- "pwmStop(), #1", "invalid state");
+ "invalid state");
pwm_lld_stop(pwmp);
pwmp->state = PWM_STOP;
osalSysUnlock();
@@ -141,8 +141,7 @@ void pwmChangePeriod(PWMDriver *pwmp, pwmcnt_t period) {
osalDbgCheck(pwmp != NULL);
osalSysLock();
- osalDbgAssert(pwmp->state == PWM_READY,
- "pwmChangePeriod(), #1", "invalid state");
+ osalDbgAssert(pwmp->state == PWM_READY, "invalid state");
pwmChangePeriodI(pwmp, period);
osalSysUnlock();
}
@@ -168,8 +167,7 @@ void pwmEnableChannel(PWMDriver *pwmp,
osalDbgCheck((pwmp != NULL) && (channel < PWM_CHANNELS));
osalSysLock();
- osalDbgAssert(pwmp->state == PWM_READY,
- "pwmEnableChannel(), #1", "not ready");
+ osalDbgAssert(pwmp->state == PWM_READY, "not ready");
pwm_lld_enable_channel(pwmp, channel, width);
osalSysUnlock();
}
@@ -193,8 +191,7 @@ void pwmDisableChannel(PWMDriver *pwmp, pwmchannel_t channel) {
osalDbgCheck((pwmp != NULL) && (channel < PWM_CHANNELS));
osalSysLock();
- osalDbgAssert(pwmp->state == PWM_READY,
- "pwmDisableChannel(), #1", "not ready");
+ osalDbgAssert(pwmp->state == PWM_READY, "not ready");
pwm_lld_disable_channel(pwmp, channel);
osalSysUnlock();
}
diff --git a/os/hal/src/serial.c b/os/hal/src/serial.c
index 0b9d5b41d..4b1fd17d5 100644
--- a/os/hal/src/serial.c
+++ b/os/hal/src/serial.c
@@ -154,7 +154,7 @@ void sdStart(SerialDriver *sdp, const SerialConfig *config) {
osalSysLock();
osalDbgAssert((sdp->state == SD_STOP) || (sdp->state == SD_READY),
- "sdStart(), #1", "invalid state");
+ "invalid state");
sd_lld_start(sdp, config);
sdp->state = SD_READY;
osalSysUnlock();
@@ -175,7 +175,7 @@ void sdStop(SerialDriver *sdp) {
osalSysLock();
osalDbgAssert((sdp->state == SD_STOP) || (sdp->state == SD_READY),
- "sdStop(), #1", "invalid state");
+ "invalid state");
sd_lld_stop(sdp);
sdp->state = SD_STOP;
oqResetI(&sdp->oqueue);
diff --git a/os/hal/src/spi.c b/os/hal/src/spi.c
index cd7124bd3..f47ed0527 100644
--- a/os/hal/src/spi.c
+++ b/os/hal/src/spi.c
@@ -98,7 +98,7 @@ void spiStart(SPIDriver *spip, const SPIConfig *config) {
osalSysLock();
osalDbgAssert((spip->state == SPI_STOP) || (spip->state == SPI_READY),
- "spiStart(), #1", "invalid state");
+ "invalid state");
spip->config = config;
spi_lld_start(spip);
spip->state = SPI_READY;
@@ -120,7 +120,7 @@ void spiStop(SPIDriver *spip) {
osalSysLock();
osalDbgAssert((spip->state == SPI_STOP) || (spip->state == SPI_READY),
- "spiStop(), #1", "invalid state");
+ "invalid state");
spi_lld_stop(spip);
spip->state = SPI_STOP;
osalSysUnlock();
@@ -138,7 +138,7 @@ void spiSelect(SPIDriver *spip) {
osalDbgCheck(spip != NULL);
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY, "spiSelect(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiSelectI(spip);
osalSysUnlock();
}
@@ -156,7 +156,7 @@ void spiUnselect(SPIDriver *spip) {
osalDbgCheck(spip != NULL);
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY, "spiUnselect(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiUnselectI(spip);
osalSysUnlock();
}
@@ -179,7 +179,7 @@ void spiStartIgnore(SPIDriver *spip, size_t n) {
osalDbgCheck((spip != NULL) && (n > 0));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY, "spiStartIgnore(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiStartIgnoreI(spip, n);
osalSysUnlock();
}
@@ -207,8 +207,7 @@ void spiStartExchange(SPIDriver *spip, size_t n,
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL) && (txbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY,
- "spiStartExchange(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiStartExchangeI(spip, n, txbuf, rxbuf);
osalSysUnlock();
}
@@ -233,7 +232,7 @@ void spiStartSend(SPIDriver *spip, size_t n, const void *txbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY, "spiStartSend(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiStartSendI(spip, n, txbuf);
osalSysUnlock();
}
@@ -258,8 +257,7 @@ void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY,
- "spiStartReceive(), #1", "not ready");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
spiStartReceiveI(spip, n, rxbuf);
osalSysUnlock();
}
@@ -284,10 +282,8 @@ void spiIgnore(SPIDriver *spip, size_t n) {
osalDbgCheck((spip != NULL) && (n > 0));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY,
- "spiIgnore(), #1", "not ready");
- osalDbgAssert(spip->config->end_cb == NULL,
- "spiIgnore(), #2", "has callback");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
+ osalDbgAssert(spip->config->end_cb == NULL, "has callback");
spiStartIgnoreI(spip, n);
_spi_wait_s(spip);
osalSysUnlock();
@@ -318,9 +314,8 @@ void spiExchange(SPIDriver *spip, size_t n,
(rxbuf != NULL) && (txbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY, "spiExchange(), #1", "not ready");
- osalDbgAssert(spip->config->end_cb == NULL,
- "spiExchange(), #2", "has callback");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
+ osalDbgAssert(spip->config->end_cb == NULL, "has callback");
spiStartExchangeI(spip, n, txbuf, rxbuf);
_spi_wait_s(spip);
osalSysUnlock();
@@ -347,10 +342,8 @@ void spiSend(SPIDriver *spip, size_t n, const void *txbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY,
- "spiSend(), #1", "not ready");
- osalDbgAssert(spip->config->end_cb == NULL,
- "spiSend(), #2", "has callback");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
+ osalDbgAssert(spip->config->end_cb == NULL, "has callback");
spiStartSendI(spip, n, txbuf);
_spi_wait_s(spip);
osalSysUnlock();
@@ -377,10 +370,8 @@ void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL));
osalSysLock();
- osalDbgAssert(spip->state == SPI_READY,
- "spiReceive(), #1", "not ready");
- osalDbgAssert(spip->config->end_cb == NULL,
- "spiReceive(), #2", "has callback");
+ osalDbgAssert(spip->state == SPI_READY, "not ready");
+ osalDbgAssert(spip->config->end_cb == NULL, "has callback");
spiStartReceiveI(spip, n, rxbuf);
_spi_wait_s(spip);
osalSysUnlock();
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 00:24:27 +0000