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-rw-r--r--os/hal/platforms/LPC11xx/hal_lld.h10
-rw-r--r--os/hal/platforms/LPC11xx/spi_lld.c28
-rw-r--r--os/hal/platforms/LPC11xx/spi_lld.h6
3 files changed, 28 insertions, 16 deletions
diff --git a/os/hal/platforms/LPC11xx/hal_lld.h b/os/hal/platforms/LPC11xx/hal_lld.h
index 1d9941ba3..f94b058fd 100644
--- a/os/hal/platforms/LPC11xx/hal_lld.h
+++ b/os/hal/platforms/LPC11xx/hal_lld.h
@@ -101,7 +101,7 @@
/*===========================================================================*/
/**
- * @brief Calculated SYSOSCCTRL setting.
+ * @brief Calculated SYSOSCCTRL setting.
*/
#if (SYSOSCCLK < 18000000) || defined(__DOXYGEN__)
#define LPC11xx_SYSOSCCTRL 0
@@ -110,7 +110,7 @@
#endif
/**
- * @brief PLL input clock frequency.
+ * @brief PLL input clock frequency.
*/
#if (LPC11xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC) || defined(__DOXYGEN__)
#define LPC11xx_SYSPLLCLKIN SYSOSCCLK
@@ -131,7 +131,7 @@
#endif
/**
- * @brief PSEL mask in SYSPLLCTRL register.
+ * @brief PSEL mask in SYSPLLCTRL register.
*/
#if (LPC11xx_SYSPLL_DIV == 2) || defined(__DOXYGEN__)
#define LPC11xx_SYSPLLCTRL_PSEL (0 << 5)
@@ -146,7 +146,7 @@
#endif
/**
- * @brief CCP frequency.
+ * @brief CCP frequency.
*/
#define LPC11xx_SYSPLLCCO (LPC11xx_SYSPLLCLKIN * LPC11xx_SYSPLL_MUL * \
LPC11xx_SYSPLL_DIV)
@@ -181,7 +181,7 @@
#endif
/**
- * @brief Flash wait states.
+ * @brief Flash wait states.
*/
#if (LPC11xx_SYSCLK <= 20000000) || defined(__DOXYGEN__)
#define LPC11xx_FLASHCFG_FLASHTIM 0
diff --git a/os/hal/platforms/LPC11xx/spi_lld.c b/os/hal/platforms/LPC11xx/spi_lld.c
index 8c826cf9e..47766088c 100644
--- a/os/hal/platforms/LPC11xx/spi_lld.c
+++ b/os/hal/platforms/LPC11xx/spi_lld.c
@@ -64,10 +64,16 @@ static void ssp_fifo_preload(SPIDriver *spip) {
while(((ssp->SR & SR_TNF) != 0) && (n > 0)) {
if (spip->spd_txptr != NULL) {
- if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT)
- ssp->DR = *(uint16_t *)spip->spd_txptr++;
- else
- ssp->DR = *(uint8_t *)spip->spd_txptr++;
+ if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) {
+ const uint16_t *p = spip->spd_txptr;
+ ssp->DR = *p++;
+ spip->spd_txptr = p;
+ }
+ else {
+ const uint8_t *p = spip->spd_txptr;
+ ssp->DR = *p++;
+ spip->spd_txptr = p;
+ }
}
else
ssp->DR = 0xFFFFFFFF;
@@ -92,10 +98,16 @@ static void spi_serve_interrupt(SPIDriver *spip) {
ssp->ICR = ICR_RT | ICR_ROR;
while ((ssp->SR & SR_RNE) != 0) {
if (spip->spd_rxptr != NULL) {
- if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT)
- *(uint16_t *)spip->spd_rxptr++ = ssp->DR;
- else
- *(uint8_t *)spip->spd_rxptr++ = ssp->DR;
+ if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) {
+ uint16_t *p = spip->spd_rxptr;
+ *p++ = ssp->DR;
+ spip->spd_rxptr = p;
+ }
+ else {
+ uint8_t *p = spip->spd_rxptr;
+ *p++ = ssp->DR;
+ spip->spd_rxptr = p;
+ }
}
else
(void)ssp->DR;
diff --git a/os/hal/platforms/LPC11xx/spi_lld.h b/os/hal/platforms/LPC11xx/spi_lld.h
index 7b6374172..e0525387a 100644
--- a/os/hal/platforms/LPC11xx/spi_lld.h
+++ b/os/hal/platforms/LPC11xx/spi_lld.h
@@ -35,7 +35,7 @@
/*===========================================================================*/
/**
- * @brief Hardware FIFO depth.
+ * @brief Hardware FIFO depth.
*/
#define LPC11xx_SSP_FIFO_DEPTH 8
@@ -163,7 +163,7 @@
#endif
/**
- * @brief SCK0 signal selector.
+ * @brief SCK0 signal selector.
*/
#if !defined(LPC11xx_SPI_SCK0_SELECTOR) || defined(__DOXYGEN__)
#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
@@ -284,7 +284,7 @@ struct SPIDriver {
*/
LPC_SSP_TypeDef *spd_ssp;
/**
- * @brief Number of bytes yet to be received.
+ * @brief Number of bytes yet to be received.
*/
uint32_t spd_rxcnt;
/**