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-rw-r--r--os/hal/platforms/SPC563Mxx/hal_lld.h4
-rw-r--r--os/hal/platforms/SPC563Mxx/platform.mk4
-rw-r--r--os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h16
-rw-r--r--os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c32
-rw-r--r--os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h105
5 files changed, 63 insertions, 98 deletions
diff --git a/os/hal/platforms/SPC563Mxx/hal_lld.h b/os/hal/platforms/SPC563Mxx/hal_lld.h
index bda58ed00..e7d532945 100644
--- a/os/hal/platforms/SPC563Mxx/hal_lld.h
+++ b/os/hal/platforms/SPC563Mxx/hal_lld.h
@@ -186,7 +186,7 @@
/**
* @brief PLL output clock.
*/
-#define SPC5_PLLCLK ((EXTCLK / (SPC5_CLK_PREDIV + 1)) * SPC5_CLK_MFD)
+#define SPC5_PLLCLK ((SPC5_XOSC_CLK / (SPC5_CLK_PREDIV + 1)) * SPC5_CLK_MFD)
#if (SPC5_PLLCLK < 256000000) || (SPC5_PLLCLK > 512000000)
#error "VCO frequency out of the acceptable range (256...512)"
@@ -198,7 +198,7 @@
#if !SPC5_CLK_BYPASS || defined(__DOXYGEN__)
#define SPC5_SYSCLK (SPC5_PLLCLK / (1 << (SPC5_CLK_RFD + 1)))
#else
-#define SPC5_SYSCLK EXTCLK
+#define SPC5_SYSCLK SPC5_XOSC_CLK
#endif
#if (SPC5_SYSCLK > 80000000) && !SPC5_ALLOW_OVERCLOCK
diff --git a/os/hal/platforms/SPC563Mxx/platform.mk b/os/hal/platforms/SPC563Mxx/platform.mk
index d70bad232..04e9a9739 100644
--- a/os/hal/platforms/SPC563Mxx/platform.mk
+++ b/os/hal/platforms/SPC563Mxx/platform.mk
@@ -1,9 +1,9 @@
# List of all the SPC56x platform files.
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/SPC563Mxx/hal_lld.c \
${CHIBIOS}/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c \
- ${CHIBIOS}/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
+ ${CHIBIOS}/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/platforms/SPC563Mxx \
${CHIBIOS}/os/hal/platforms/SPC5xx/ESCI_v1 \
- ${CHIBIOS}/os/hal/platforms/SPC5xx/SIUL_v1
+ ${CHIBIOS}/os/hal/platforms/SPC5xx/SIU_v1
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
index 6eb250249..b79a2cef9 100644
--- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
+++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
@@ -171,42 +171,42 @@ typedef struct {
/**
* @brief I/O port A identifier.
*/
-#define PA 0
+#define PORT_A 0
/**
* @brief I/O port B identifier.
*/
-#define PB 1
+#define PORT_B 1
/**
* @brief I/O port C identifier.
*/
-#define PC 2
+#define PORT_C 2
/**
* @brief I/O port D identifier.
*/
-#define PD 3
+#define PORT_D 3
/**
* @brief I/O port E identifier.
*/
-#define PE 4
+#define PORT_E 4
/**
* @brief I/O port F identifier.
*/
-#define PF 5
+#define PORT_F 5
/**
* @brief I/O port G identifier.
*/
-#define PG 6
+#define PORT_G 6
/**
* @brief I/O port H identifier.
*/
-#define PH 7
+#define PORT_H 7
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
diff --git a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c
index 8cd8b2bd3..5619ed4e0 100644
--- a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c
+++ b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c
@@ -13,8 +13,8 @@
*/
/**
- * @file SPC5xx/SIUL_v1/pal_lld.c
- * @brief SPC5xx SIU/SIUL low level driver code.
+ * @file SPC5xx/SIU_v1/pal_lld.c
+ * @brief SPC5xx SIU low level driver code.
*
* @addtogroup PAL
* @{
@@ -63,34 +63,6 @@ static const unsigned system_pins[] = {SPC5_SIU_SYSTEM_PINS};
void _pal_lld_init(const PALConfig *config) {
unsigned i;
-#if defined(SPC5_SIU_PCTL)
- /* SIUL clock gating if present.*/
- halSPCSetPeripheralClockMode(SPC5_SIU_PCTL,
- SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
-#endif
-
- /* Initialize PCR registers for undefined pads.*/
- for (i = 0; i < SPC5_SIU_NUM_PCRS; i++) {
-#if defined(SPC5_SIU_SYSTEM_PINS)
- /* Handling the case where some SIU pins are not meant to be reprogrammed,
- for example JTAG pins.*/
- unsigned j;
- for (j = 0; j < sizeof system_pins; j++) {
- if (i == system_pins[j])
- goto skip;
- }
- SIU.PCR[i].R = config->default_mode;
-skip:
- ;
-#else
- SIU.PCR[i].R = config->default_mode;
-#endif
- }
-
- /* Initialize PADSEL registers.*/
- for (i = 0; i < SPC5_SIU_NUM_PADSELS; i++)
- SIU.PSMI[i].R = config->padsels[i];
-
/* Initialize PCR registers for defined pads.*/
i = 0;
while (config->inits[i].pcr_value != 0) {
diff --git a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h
index 32b54d260..fac86c48f 100644
--- a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h
+++ b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h
@@ -13,8 +13,8 @@
*/
/**
- * @file SPC5xx/SIUL_v1/pal_lld.h
- * @brief SPC5xx SIU/SIUL low level driver header.
+ * @file SPC5xx/SIU_v1/pal_lld.h
+ * @brief SPC5xx SIU low level driver header.
*
* @addtogroup PAL
* @{
@@ -39,17 +39,19 @@
#undef PAL_MODE_OUTPUT_OPENDRAIN
/**
- * @name SIU/SIUL-specific PAL modes
+ * @name SIU-specific PAL modes
* @{
*/
-#define PAL_SPC5_SMC (1U << 14)
-#define PAL_SPC5_APC (1U << 13)
-#define PAL_SPC5_PA_MASK (3U << 10)
+#define PAL_SPC5_PA_MASK (15U << 10)
#define PAL_SPC5_PA(n) ((n) << 10)
#define PAL_SPC5_OBE (1U << 9)
#define PAL_SPC5_IBE (1U << 8)
+#define PAL_SPC5_DSC_10PF (0U << 6)
+#define PAL_SPC5_DSC_20PF (1U << 6)
+#define PAL_SPC5_DSC_30PF (2U << 6)
+#define PAL_SPC5_DSC_50PF (3U << 6)
#define PAL_SPC5_ODE (1U << 5)
-#define PAL_SPC5_SRC (1U << 2)
+#define PAL_SPC5_HYS (1U << 4)
#define PAL_SPC5_WPE (1U << 1)
#define PAL_SPC5_WPS (1U << 0)
/** @} */
@@ -85,11 +87,6 @@
#define PAL_MODE_INPUT_PULLDOWN (PAL_SPC5_IBE |PAL_SPC5_WPE)
/**
- * @brief Analog input mode.
- */
-#define PAL_MODE_INPUT_ANALOG PAL_SPC5_APC
-
-/**
* @brief Push-pull output pad.
*/
#define PAL_MODE_OUTPUT_PUSHPULL (PAL_SPC5_IBE | PAL_SPC5_OBE)
@@ -128,11 +125,6 @@
typedef uint16_t ioportmask_t;
/**
- * @brief Digital I/O modes.
- */
-typedef uint16_t iomode_t;
-
-/**
* @brief Port Identifier.
* @details This type can be a scalar or some kind of pointer, do not make
* any assumption about it, use the provided macros when populating
@@ -141,6 +133,11 @@ typedef uint16_t iomode_t;
typedef uint32_t ioportid_t;
/**
+ * @brief Digital I/O modes.
+ */
+typedef uint16_t iomode_t;
+
+/**
* @brief SIU/SIUL register initializer type.
*/
typedef struct {
@@ -159,9 +156,7 @@ typedef struct {
* architecture dependent, fields.
*/
typedef struct {
- iomode_t default_mode;
const spc_siu_init_t *inits;
- const uint8_t *padsels;
} PALConfig;
/*===========================================================================*/
@@ -169,44 +164,42 @@ typedef struct {
/*===========================================================================*/
/**
- * @brief I/O port A identifier.
- */
-#define PA 0
-
-/**
- * @brief I/O port B identifier.
- */
-#define PB 1
-
-/**
- * @brief I/O port C identifier.
- */
-#define PC 2
-
-/**
- * @brief I/O port D identifier.
- */
-#define PD 3
-
-/**
- * @brief I/O port E identifier.
- */
-#define PE 4
-
-/**
- * @brief I/O port F identifier.
- */
-#define PF 5
-
-/**
- * @brief I/O port G identifier.
- */
-#define PG 6
-
-/**
- * @brief I/O port H identifier.
+ * @name Port identifiers
+ * @{
*/
-#define PH 7
+#define PORT0 0
+#define PORT1 1
+#define PORT2 2
+#define PORT3 3
+#define PORT4 4
+#define PORT5 5
+#define PORT6 6
+#define PORT7 7
+#define PORT8 8
+#define PORT9 9
+#define PORT10 10
+#define PORT11 11
+#define PORT12 12
+#define PORT13 13
+#define PORT14 14
+#define PORT15 15
+#define PORT16 16
+#define PORT17 17
+#define PORT18 18
+#define PORT19 19
+#define PORT20 20
+#define PORT21 21
+#define PORT22 22
+#define PORT23 23
+#define PORT24 24
+#define PORT25 25
+#define PORT26 26
+#define PORT27 27
+#define PORT28 28
+#define PORT29 29
+#define PORT30 30
+#define PORT31 31
+/** @} */
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 00:32:51 +0000