diff options
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/platforms/STM32/TIMv1/st_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/TIMv1/st_lld.h | 6 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/adc_lld.c | 13 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/adc_lld.h | 8 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/stm32_registry.h | 4 |
5 files changed, 13 insertions, 22 deletions
diff --git a/os/hal/platforms/STM32/TIMv1/st_lld.c b/os/hal/platforms/STM32/TIMv1/st_lld.c index debfde38f..eb97866cd 100644 --- a/os/hal/platforms/STM32/TIMv1/st_lld.c +++ b/os/hal/platforms/STM32/TIMv1/st_lld.c @@ -116,7 +116,7 @@ void st_lld_init(void) { STM32_TIM2->CR1 = TIM_CR1_CEN;
/* IRQ enabled.*/
- nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY);
+ nvicEnableVector(STM32_TIM2_NUMBER, STM32_ST_IRQ_PRIORITY);
#endif
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
@@ -129,7 +129,7 @@ void st_lld_init(void) { SysTick_CTRL_TICKINT_Msk;
/* IRQ enabled.*/
- nvicSetSystemHandlerPriority(SysTick_IRQn, ST_TIMER_PRIORITY);
+ nvicSetSystemHandlerPriority(SysTick_IRQn, STM32_ST_IRQ_PRIORITY);
#endif
}
diff --git a/os/hal/platforms/STM32/TIMv1/st_lld.h b/os/hal/platforms/STM32/TIMv1/st_lld.h index 78929cac5..09f95bd9e 100644 --- a/os/hal/platforms/STM32/TIMv1/st_lld.h +++ b/os/hal/platforms/STM32/TIMv1/st_lld.h @@ -42,10 +42,10 @@ * @{
*/
/**
- * @brief SysTick timer priority.
+ * @brief SysTick timer IRQ priority.
*/
-#if !defined(ST_TIMER_PRIORITY) || defined(__DOXYGEN__)
-#define ST_TIMER_PRIORITY 8
+#if !defined(STM32_ST_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_ST_IRQ_PRIORITY 8
#endif
/** @} */
diff --git a/os/hal/platforms/STM32F0xx/adc_lld.c b/os/hal/platforms/STM32F0xx/adc_lld.c index 5fa419679..932366184 100644 --- a/os/hal/platforms/STM32F0xx/adc_lld.c +++ b/os/hal/platforms/STM32F0xx/adc_lld.c @@ -102,10 +102,10 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) { *
* @isr
*/
-CH_IRQ_HANDLER(Vector70) {
+OSAL_IRQ_HANDLER(Vector70) {
uint32_t isr;
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
isr = ADC1->ISR;
ADC1->ISR = isr;
@@ -127,7 +127,7 @@ CH_IRQ_HANDLER(Vector70) { }
}
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif
@@ -156,12 +156,11 @@ void adc_lld_init(void) { /* The shared vector is initialized on driver initialization and never
disabled.*/
- nvicEnableVector(ADC1_COMP_IRQn,
- CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));
+ nvicEnableVector(ADC1_COMP_IRQn, STM32_ADC_IRQ_PRIORITY);
/* Calibration procedure.*/
rccEnableADC1(FALSE);
- chDbgAssert(ADC1->CR == 0, "adc_lld_init(), #1", "invalid register state");
+ osalDbgAssert(ADC1->CR == 0, "invalid register state");
ADC1->CR |= ADC_CR_ADCAL;
while (ADC1->CR & ADC_CR_ADCAL)
;
@@ -186,7 +185,7 @@ void adc_lld_start(ADCDriver *adcp) { STM32_ADC_ADC1_DMA_IRQ_PRIORITY,
(stm32_dmaisr_t)adc_lld_serve_rx_interrupt,
(void *)adcp);
- chDbgAssert(!b, "adc_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
rccEnableADC1(FALSE);
#if STM32_ADCSW == STM32_ADCSW_HSI14
diff --git a/os/hal/platforms/STM32F0xx/adc_lld.h b/os/hal/platforms/STM32F0xx/adc_lld.h index 411e31581..635dcefaa 100644 --- a/os/hal/platforms/STM32F0xx/adc_lld.h +++ b/os/hal/platforms/STM32F0xx/adc_lld.h @@ -264,17 +264,13 @@ struct ADCDriver { /**
* @brief Waiting thread.
*/
- Thread *thread;
+ thread_reference_t thread;
#endif
#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
-#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
* @brief Mutex protecting the peripheral.
*/
- Mutex mutex;
-#elif CH_USE_SEMAPHORES
- Semaphore semaphore;
-#endif
+ mutex_t mutex;
#endif /* ADC_USE_MUTUAL_EXCLUSION */
#if defined(ADC_DRIVER_EXT_FIELDS)
ADC_DRIVER_EXT_FIELDS
diff --git a/os/hal/platforms/STM32F0xx/stm32_registry.h b/os/hal/platforms/STM32F0xx/stm32_registry.h index 5139beeaf..94d12567e 100644 --- a/os/hal/platforms/STM32F0xx/stm32_registry.h +++ b/os/hal/platforms/STM32F0xx/stm32_registry.h @@ -35,10 +35,6 @@ */
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
-#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
- STM32_DMA_STREAM_ID_MSK(1, 2))
-#define STM32_ADC1_DMA_CHN 0x00000000
-
#define STM32_HAS_ADC2 FALSE
#define STM32_HAS_ADC3 FALSE
#define STM32_HAS_ADC4 FALSE
|