diff options
Diffstat (limited to 'os/hal')
-rw-r--r-- | os/hal/ports/STM32/LLD/mac_lld.c | 8 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/mac_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/STM32/STM32F1xx/stm32_dma.c | 6 |
3 files changed, 11 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/LLD/mac_lld.c b/os/hal/ports/STM32/LLD/mac_lld.c index 9f1b5e3db..daddf27b6 100644 --- a/os/hal/ports/STM32/LLD/mac_lld.c +++ b/os/hal/ports/STM32/LLD/mac_lld.c @@ -83,8 +83,10 @@ static uint32_t tb[STM32_MAC_TRANSMIT_BUFFERS][BUFFER_SIZE]; * @param[in] macp pointer to the @p MACDriver object
* @param[in] reg register number
* @param[in] value new register value
+ *
+ * @notapi
*/
-static void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) {
+void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) {
ETH->MACMIIDR = value;
ETH->MACMIIAR = macp->phyaddr | (reg << 6) | MACMIIDR_CR |
@@ -100,8 +102,10 @@ static void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) { * @param[in] reg register number
*
* @return The PHY register content.
+ *
+ * @notapi
*/
-static uint32_t mii_read(MACDriver *macp, uint32_t reg) {
+uint32_t mii_read(MACDriver *macp, uint32_t reg) {
ETH->MACMIIAR = macp->phyaddr | (reg << 6) | MACMIIDR_CR | ETH_MACMIIAR_MB;
while ((ETH->MACMIIAR & ETH_MACMIIAR_MB) != 0)
diff --git a/os/hal/ports/STM32/LLD/mac_lld.h b/os/hal/ports/STM32/LLD/mac_lld.h index bde7e0345..34b724e07 100644 --- a/os/hal/ports/STM32/LLD/mac_lld.h +++ b/os/hal/ports/STM32/LLD/mac_lld.h @@ -328,6 +328,8 @@ extern MACDriver ETHD1; #ifdef __cplusplus
extern "C" {
#endif
+ void mii_write(MACDriver *macp, uint32_t reg, uint32_t value);
+ uint32_t mii_read(MACDriver *macp, uint32_t reg);
void mac_lld_init(void);
void mac_lld_start(MACDriver *macp);
void mac_lld_stop(MACDriver *macp);
diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_dma.c b/os/hal/ports/STM32/STM32F1xx/stm32_dma.c index 63e7c0778..4d1428a0f 100644 --- a/os/hal/ports/STM32/STM32F1xx/stm32_dma.c +++ b/os/hal/ports/STM32/STM32F1xx/stm32_dma.c @@ -475,7 +475,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { dma_streams_mask &= ~(1 << dmastp->selfindex);
/* Disables the associated IRQ vector.*/
-#if !(STM32_HAS_DMA2 && !defined(STM32F10X_CL)) || defined(__DOXYGEN__)
+#if !(STM32_HAS_DMA2 && !defined(STM32F10X_CL))
nvicDisableVector(dmastp->vector);
#else
/* Check unless it is 10 or 11 stream. If yes, make additional check before
@@ -483,10 +483,10 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { if (dmastp->selfindex < 10)
nvicDisableVector(dmastp->vector);
else {
- if (dma_streams_mask & (3 << 10) == 0)
+ if ((dma_streams_mask & (3 << 10)) == 0)
nvicDisableVector(dmastp->vector);
}
-#endif/* STM32_HAS_DMA2 && !STM32F10X_CL */
+#endif /* STM32_HAS_DMA2 && !STM32F10X_CL */
/* Shutting down clocks that are no more required, if any.*/
if ((dma_streams_mask & STM32_DMA1_STREAMS_MASK) == 0)
|