aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/boards/ST_NUCLEO64_F334R8
diff options
context:
space:
mode:
Diffstat (limited to 'os/hal/boards/ST_NUCLEO64_F334R8')
-rw-r--r--os/hal/boards/ST_NUCLEO64_F334R8/board.h5
-rw-r--r--os/hal/boards/ST_NUCLEO64_F334R8/board.mk4
-rw-r--r--os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg2
3 files changed, 6 insertions, 5 deletions
diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/board.h b/os/hal/boards/ST_NUCLEO64_F334R8/board.h
index 6d3f655d8..0ffd7dc6a 100644
--- a/os/hal/boards/ST_NUCLEO64_F334R8/board.h
+++ b/os/hal/boards/ST_NUCLEO64_F334R8/board.h
@@ -30,7 +30,6 @@
/*
* Board oscillators-related settings.
* NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 0U
@@ -39,9 +38,11 @@
#define STM32_LSEDRV (3U << 3U)
#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 0U
+#define STM32_HSECLK 8000000U
#endif
+#define STM32_HSE_BYPASS
+
/*
* MCU type as defined in the ST header.
*/
diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/board.mk b/os/hal/boards/ST_NUCLEO64_F334R8/board.mk
index d64bad82b..3a85457ae 100644
--- a/os/hal/boards/ST_NUCLEO64_F334R8/board.mk
+++ b/os/hal/boards/ST_NUCLEO64_F334R8/board.mk
@@ -1,5 +1,5 @@
# List of all the board related files.
-BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO64_F334R8/board.c
+BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F334R8/board.c
# Required include directories
-BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO64_F334R8
+BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F334R8
diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg
index 58e44c048..888551ba5 100644
--- a/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg
+++ b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg
@@ -12,7 +12,7 @@
<board_id>ST_NUCLEO64_F334R8</board_id>
<board_functions></board_functions>
<subtype>STM32F334x8</subtype>
- <clocks HSEFrequency="0" HSEBypass="false" LSEFrequency="0"
+ <clocks HSEFrequency="8000000" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>
<GPIOA>