diff options
-rw-r--r-- | os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c | 2 | ||||
-rw-r--r-- | os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h | 7 | ||||
-rw-r--r-- | os/hal/ports/STM32/STM32F7xx/stm32_registry.h | 2 |
3 files changed, 10 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c index bc3f599a4..390f00fdd 100644 --- a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c +++ b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c @@ -345,6 +345,7 @@ void ext_lld_exti_irq_enable(void) { nvicEnableVector(OTG_HS_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
nvicEnableVector(TAMP_STAMP_IRQn, STM32_EXT_EXTI21_IRQ_PRIORITY);
nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI22_IRQ_PRIORITY);
+ nvicEnableVector(LPTIM1_IRQn, STM32_EXT_EXTI23_IRQ_PRIORITY);
}
/**
@@ -368,6 +369,7 @@ void ext_lld_exti_irq_disable(void) { nvicDisableVector(OTG_HS_WKUP_IRQn);
nvicDisableVector(TAMP_STAMP_IRQn);
nvicDisableVector(RTC_WKUP_IRQn);
+ nvicDisableVector(LPTIM1_IRQn);
}
#endif /* HAL_USE_EXT */
diff --git a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h index 5c33f5f83..5094be774 100644 --- a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h +++ b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h @@ -136,6 +136,13 @@ #if !defined(STM32_EXT_EXTI22_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_EXT_EXTI22_IRQ_PRIORITY 6
#endif
+
+/**
+ * @brief EXTI23 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI23_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI23_IRQ_PRIORITY 6
+#endif
/** @} */
/*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h index 197012490..c119308b6 100644 --- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h @@ -145,7 +145,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 24
-#define STM32_EXTI_IMR_MASK 0
+#define STM32_EXTI_IMR_MASK 0xFF000000
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
|