aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--docs/reports/STM32F407-168-GCC.txt6
-rw-r--r--os/ports/GCC/ARMCMx/LPC11xx/cmparams.h5
-rw-r--r--os/ports/GCC/ARMCMx/LPC13xx/cmparams.h5
-rw-r--r--os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h5
-rw-r--r--os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h7
-rw-r--r--os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h5
-rw-r--r--os/ports/GCC/ARMCMx/chcore.h5
-rw-r--r--os/ports/IAR/ARMCMx/LPC11xx/cmparams.h5
-rw-r--r--os/ports/IAR/ARMCMx/LPC13xx/cmparams.h5
-rw-r--r--os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h5
-rw-r--r--os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h5
-rw-r--r--os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h5
-rw-r--r--os/ports/IAR/ARMCMx/chcore.h7
-rw-r--r--os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h5
-rw-r--r--os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h5
-rw-r--r--os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h5
-rw-r--r--os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h5
-rw-r--r--os/ports/RVCT/ARMCMx/chcore.h5
-rw-r--r--readme.txt2
19 files changed, 86 insertions, 11 deletions
diff --git a/docs/reports/STM32F407-168-GCC.txt b/docs/reports/STM32F407-168-GCC.txt
index 9b2702146..7069e8d0e 100644
--- a/docs/reports/STM32F407-168-GCC.txt
+++ b/docs/reports/STM32F407-168-GCC.txt
@@ -6,10 +6,10 @@ Settings: SYSCLK=168, ACR=0x705 (5 wait states)
*** ChibiOS/RT test suite
***
*** Kernel: 2.3.4unstable
-*** Compiled: Nov 6 2011 - 12:43:29
+*** Compiled: Nov 13 2011 - 12:07:02
*** Compiler: GCC 4.6.0
-*** Architecture: ARMv7-M
-*** Core Variant: Cortex-M3
+*** Architecture: ARMv7-ME
+*** Core Variant: Cortex-M4
*** Port Info: Advanced kernel mode
*** Platform: STM32F4 High Performance & DSP
*** Test Board: ST STM32F4-Discovery
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h
index 4016e6aa1..89520b96d 100644
--- a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h
+++ b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 2
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h
index ee49e5de9..2da699460 100644
--- a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h
+++ b/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h
index 02d07e73d..a61698008 100644
--- a/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h
+++ b/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h
index 96ea09ff8..338fd5363 100644
--- a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h
+++ b/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h
@@ -35,7 +35,7 @@
/**
* @brief Cortex core model.
*/
-#define CORTEX_MODEL CORTEX_M3
+#define CORTEX_MODEL CORTEX_M4
/**
* @brief Systick unit presence.
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU TRUE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h
index e21f9cdd2..c545b07fa 100644
--- a/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h
+++ b/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h
index 944094925..9db7c816a 100644
--- a/os/ports/GCC/ARMCMx/chcore.h
+++ b/os/ports/GCC/ARMCMx/chcore.h
@@ -50,8 +50,9 @@
#include "cmparams.h"
/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
+ (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
#warning "untested Cortex-M model"
#else
#error "unknown or unsupported Cortex-M model"
diff --git a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h
index 2b66fbf4a..284d6cecf 100644
--- a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h
+++ b/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 2
diff --git a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h
index 1e970e72a..439768f84 100644
--- a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h
+++ b/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
diff --git a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h
index 8f9795822..74a7fe232 100644
--- a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h
+++ b/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h
index 733c952d5..de175091d 100644
--- a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h
+++ b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU TRUE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h
index e4012ef82..491417957 100644
--- a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h
+++ b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h
index c3e91cc02..9572a48c8 100644
--- a/os/ports/IAR/ARMCMx/chcore.h
+++ b/os/ports/IAR/ARMCMx/chcore.h
@@ -50,9 +50,10 @@
#include "cmparams.h"
/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
-#error "untested Cortex-M model, manually remove this check in chcore.h"
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
+ (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
+#error "untested Cortex-M model"
#else
#error "unknown or unsupported Cortex-M model"
#endif
diff --git a/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h b/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h
index 7289af9e7..63f22c0a0 100644
--- a/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h
+++ b/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 2
diff --git a/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h b/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h
index e484d7aad..46af8fc4e 100644
--- a/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h
+++ b/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
diff --git a/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h
index 2bd7715a4..67f0fb969 100644
--- a/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h
+++ b/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h
index b43bbd92a..a6617e33d 100644
--- a/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h
+++ b/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h
@@ -48,6 +48,11 @@
#define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h
index 7c4e82613..08b3a2ccb 100644
--- a/os/ports/RVCT/ARMCMx/chcore.h
+++ b/os/ports/RVCT/ARMCMx/chcore.h
@@ -50,8 +50,9 @@
#include "cmparams.h"
/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
+ (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
#warning "untested Cortex-M model"
#else
#error "unknown or unsupported Cortex-M model"
diff --git a/readme.txt b/readme.txt
index 842946621..3adb886b9 100644
--- a/readme.txt
+++ b/readme.txt
@@ -84,6 +84,8 @@
(backported to 2.2.8).
- FIX: Fixed broken TIM8 support in STM32 PWM driver (bug 3418620).
- FIX: Fixed halconf.h file corrupted in some STM32 demos (bug 3418626).
+- NEW: Removed the warning about the "untested M4 platform", now it is
+ tested and officially supported.
- NEW: Reorganized the STM32F1xx hal_lld_xxx.h files in order to distribute
the capability macros into the appropriate file (previously those were all
in the common hal_lld.h).