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-rw-r--r--demos/PPC-SPC563M-GCC/mcuconf.h1
-rw-r--r--demos/PPC-SPC564A-GCC/mcuconf.h1
-rw-r--r--os/hal/platforms/SPC563Mxx/hal_lld.c3
-rw-r--r--os/hal/platforms/SPC563Mxx/hal_lld.h16
-rw-r--r--os/hal/platforms/SPC564Axx/hal_lld.c3
-rw-r--r--os/hal/platforms/SPC564Axx/hal_lld.h16
-rw-r--r--testhal/SPC563Mxx/ADC/mcuconf.h1
-rw-r--r--testhal/SPC563Mxx/ICU-PWM/mcuconf.h1
-rw-r--r--testhal/SPC563Mxx/SPI/mcuconf.h1
-rw-r--r--testhal/SPC564Axx/ICU-PWM/mcuconf.h1
-rw-r--r--testhal/SPC564Axx/SPI/mcuconf.h1
11 files changed, 45 insertions, 0 deletions
diff --git a/demos/PPC-SPC563M-GCC/mcuconf.h b/demos/PPC-SPC563M-GCC/mcuconf.h
index 25998d626..3c66a670d 100644
--- a/demos/PPC-SPC563M-GCC/mcuconf.h
+++ b/demos/PPC-SPC563M-GCC/mcuconf.h
@@ -45,6 +45,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* EDMA driver settings.
diff --git a/demos/PPC-SPC564A-GCC/mcuconf.h b/demos/PPC-SPC564A-GCC/mcuconf.h
index 1b970f09e..85b92ddd9 100644
--- a/demos/PPC-SPC564A-GCC/mcuconf.h
+++ b/demos/PPC-SPC564A-GCC/mcuconf.h
@@ -45,6 +45,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* EDMA driver settings.
diff --git a/os/hal/platforms/SPC563Mxx/hal_lld.c b/os/hal/platforms/SPC563Mxx/hal_lld.c
index 22979e61b..5eb36bdd4 100644
--- a/os/hal/platforms/SPC563Mxx/hal_lld.c
+++ b/os/hal/platforms/SPC563Mxx/hal_lld.c
@@ -95,6 +95,9 @@ void hal_lld_init(void) {
INTC.CPR.R = 0;
INTC.IACKR.R = (uint32_t)_vectors;
+ /* eMIOS initialization.*/
+ EMIOS.MCR.R = (1U << 26) | SPC5_EMIOS_GPRE; /* GPREN and GPRE. */
+
/* EDMA initialization.*/
edmaInit();
}
diff --git a/os/hal/platforms/SPC563Mxx/hal_lld.h b/os/hal/platforms/SPC563Mxx/hal_lld.h
index eec53fd5a..705b94201 100644
--- a/os/hal/platforms/SPC563Mxx/hal_lld.h
+++ b/os/hal/platforms/SPC563Mxx/hal_lld.h
@@ -169,6 +169,13 @@
BIUCR_BFEN)
#endif
+/**
+ * @brief eMIOS global prescaler value.
+ */
+#if !defined(SPC5_EMIOS_GPRE_VALUE) || defined(__DOXYGEN__)
+#define SPC5_EMIOS_GPRE_VALUE 20
+#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -193,6 +200,10 @@
#error "invalid SPC5_CLK_RFD value specified"
#endif
+#if (SPC5_EMIOS_GPRE_VALUE < 1) || (SPC5_EMIOS_GPRE_VALUE > 256)
+#error "invalid SPC5_EMIOS_GPRE_VALUE value specified"
+#endif
+
/**
* @brief PLL input divider.
*/
@@ -239,6 +250,11 @@
#define SPC5_FLASH_WS (BIUCR_APC_3 | BIUCR_RWSC_3 | BIUCR_WWSC_1)
#endif
+/**
+ * @brief eMIOS global prescaler setting.
+ */
+#define SPC5_EMIOS_GPRE (SPC5_EMIOS_GPRE_VALUE << 8)
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/platforms/SPC564Axx/hal_lld.c b/os/hal/platforms/SPC564Axx/hal_lld.c
index f6b220c85..4c665ee25 100644
--- a/os/hal/platforms/SPC564Axx/hal_lld.c
+++ b/os/hal/platforms/SPC564Axx/hal_lld.c
@@ -107,6 +107,9 @@ void hal_lld_init(void) {
INTC.CPR.R = 0;
INTC.IACKR.R = (uint32_t)_vectors;
+ /* eMIOS initialization.*/
+ EMIOS.MCR.R = (1U << 26) | SPC5_EMIOS_GPRE; /* GPREN and GPRE. */
+
/* EDMA initialization.*/
edmaInit();
}
diff --git a/os/hal/platforms/SPC564Axx/hal_lld.h b/os/hal/platforms/SPC564Axx/hal_lld.h
index 62df1df45..093400f7b 100644
--- a/os/hal/platforms/SPC564Axx/hal_lld.h
+++ b/os/hal/platforms/SPC564Axx/hal_lld.h
@@ -169,6 +169,13 @@
BIUCR_BFEN)
#endif
+/**
+ * @brief eMIOS global prescaler value.
+ */
+#if !defined(SPC5_EMIOS_GPRE_VALUE) || defined(__DOXYGEN__)
+#define SPC5_EMIOS_GPRE_VALUE 20
+#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -193,6 +200,10 @@
#error "invalid SPC5_CLK_RFD value specified"
#endif
+#if (SPC5_EMIOS_GPRE_VALUE < 1) || (SPC5_EMIOS_GPRE_VALUE > 256)
+#error "invalid SPC5_EMIOS_GPRE_VALUE value specified"
+#endif
+
/**
* @brief PLL input divider.
*/
@@ -250,6 +261,11 @@
#define SPC5_RAM_WS 0x40000000
#endif
+/**
+ * @brief eMIOS global prescaler setting.
+ */
+#define SPC5_EMIOS_GPRE (SPC5_EMIOS_GPRE_VALUE << 8)
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h
index aed689be2..2b9eab471 100644
--- a/testhal/SPC563Mxx/ADC/mcuconf.h
+++ b/testhal/SPC563Mxx/ADC/mcuconf.h
@@ -45,6 +45,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* EDMA driver settings.
diff --git a/testhal/SPC563Mxx/ICU-PWM/mcuconf.h b/testhal/SPC563Mxx/ICU-PWM/mcuconf.h
index be3ee85cf..ed51129f4 100644
--- a/testhal/SPC563Mxx/ICU-PWM/mcuconf.h
+++ b/testhal/SPC563Mxx/ICU-PWM/mcuconf.h
@@ -43,6 +43,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* ADC driver settings.
diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h
index 261b44d88..364ad6aab 100644
--- a/testhal/SPC563Mxx/SPI/mcuconf.h
+++ b/testhal/SPC563Mxx/SPI/mcuconf.h
@@ -45,6 +45,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* EDMA driver settings.
diff --git a/testhal/SPC564Axx/ICU-PWM/mcuconf.h b/testhal/SPC564Axx/ICU-PWM/mcuconf.h
index a2e46cd16..1dfce4d27 100644
--- a/testhal/SPC564Axx/ICU-PWM/mcuconf.h
+++ b/testhal/SPC564Axx/ICU-PWM/mcuconf.h
@@ -43,6 +43,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* ADC driver settings.
diff --git a/testhal/SPC564Axx/SPI/mcuconf.h b/testhal/SPC564Axx/SPI/mcuconf.h
index d73ae8b74..1762945e5 100644
--- a/testhal/SPC564Axx/SPI/mcuconf.h
+++ b/testhal/SPC564Axx/SPI/mcuconf.h
@@ -45,6 +45,7 @@
BIUCR_IPFEN | \
BIUCR_PFLIM_ON_MISS | \
BIUCR_BFEN)
+#define SPC5_EMIOS_GPRE_VALUE 20
/*
* EDMA driver settings.