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-rw-r--r--os/hal/platforms/STM32F37x/adc_lld.h4
-rw-r--r--testhal/STM32F37x/SDADC/Makefile2
-rw-r--r--testhal/STM32F37x/SDADC/main.c6
3 files changed, 6 insertions, 6 deletions
diff --git a/os/hal/platforms/STM32F37x/adc_lld.h b/os/hal/platforms/STM32F37x/adc_lld.h
index c984dc24a..6d4fcb504 100644
--- a/os/hal/platforms/STM32F37x/adc_lld.h
+++ b/os/hal/platforms/STM32F37x/adc_lld.h
@@ -661,8 +661,8 @@ struct ADCDriver {
#define SDADC_CONFR_GAIN_0P5X (7U << 20)
#define SDADC_CONFR_SE_MASK (3U << 26)
#define SDADC_CONFR_SE_DIFF (0U << 26)
-#define SDADC_CONFR_SE_SE_OFF (1U << 26)
-#define SDADC_CONFR_SE_SE_ZV (3U << 26)
+#define SDADC_CONFR_SE_OFFSET (1U << 26)
+#define SDADC_CONFR_SE_ZERO_VOLT (3U << 26)
#define SDADC_CONFR_COMMON_MASK (3U << 30)
#define SDADC_CONFR_COMMON_VSSSD (0U << 30)
#define SDADC_CONFR_COMMON_VDDSD2 (1U << 30)
diff --git a/testhal/STM32F37x/SDADC/Makefile b/testhal/STM32F37x/SDADC/Makefile
index 0090b317a..782a3b3d7 100644
--- a/testhal/STM32F37x/SDADC/Makefile
+++ b/testhal/STM32F37x/SDADC/Makefile
@@ -5,7 +5,7 @@
# Compiler options here.
ifeq ($(USE_OPT),)
- USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c
index 90b722183..4b3e69df4 100644
--- a/testhal/STM32F37x/SDADC/main.c
+++ b/testhal/STM32F37x/SDADC/main.c
@@ -54,7 +54,7 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
/*
* ADC conversion group.
* Mode: Linear buffer, 8 samples of 1 channel, SW triggered.
- * Channels: ADC_IN6P.
+ * Channels: ADC_IN5P.
*/
static const ADCConversionGroup adcgrpcfg1 = {
FALSE,
@@ -63,14 +63,14 @@ static const ADCConversionGroup adcgrpcfg1 = {
adcerrorcallback,
.u.sdadc = {
SDADC_CR2_JSWSTART, /* CR2 */
- SDADC_JCHGR_CH(6), /* JCHGR */
+ SDADC_JCHGR_CH(5), /* JCHGR */
{ /* CONFxR[3]*/
SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_DIFF | SDADC_CONFR_COMMON_VSSSD,
0,
0
},
{ /* CONFCHR[2]*/
- SDADC_CONFCHR1_CH6(0),
+ SDADC_CONFCHR1_CH5(0),
0
}
}