diff options
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/ch.ewp | 1764 | ||||
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/ch.eww | 10 | ||||
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/chconf.h | 535 | ||||
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/halconf.h | 342 | ||||
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/main.c | 75 | ||||
| -rw-r--r-- | demos/STM8S-STM8S105-DISCOVERY-IAR/mcuconf.h | 52 | ||||
| -rw-r--r-- | os/ports/IAR/STM8/chcore.c | 55 | ||||
| -rw-r--r-- | os/ports/IAR/STM8/chcore.h | 339 | ||||
| -rw-r--r-- | os/ports/IAR/STM8/chcore_stm8.s | 57 | ||||
| -rw-r--r-- | os/ports/IAR/STM8/chtypes.h | 83 | ||||
| -rw-r--r-- | os/ports/IAR/STM8/port.dox | 95 | ||||
| -rw-r--r-- | readme.txt | 2 |
12 files changed, 3409 insertions, 0 deletions
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.ewp b/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.ewp new file mode 100644 index 000000000..c6a474004 --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.ewp @@ -0,0 +1,1764 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
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+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chmempools.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chmsg.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chmtx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chqueues.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chregistry.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chschd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chsys.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chthreads.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\kernel\src\chvt.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>platform</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\hal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\hal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\pal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\pal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\serial_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\serial_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\spi_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\spi_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\stm8s.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\hal\platforms\STM8S\stm8s_type.h</name>
+ </file>
+ </group>
+ <group>
+ <name>port</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\ports\IAR\STM8\chcore.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\ports\IAR\STM8\chcore.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\ports\IAR\STM8\chcore_stm8.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\os\ports\IAR\STM8\chtypes.h</name>
+ </file>
+ </group>
+ </group>
+ <file>
+ <name>$PROJ_DIR$\chconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\halconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\main.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\mcuconf.h</name>
+ </file>
+</project>
+
+
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.eww b/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/ch.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\ch.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/chconf.h b/demos/STM8S-STM8S105-DISCOVERY-IAR/chconf.h new file mode 100644 index 000000000..b7180026d --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/chconf.h @@ -0,0 +1,535 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 100
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 10
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_MEMCORE.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 128
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW FALSE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES FALSE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS FALSE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT FALSE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES FALSE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP FALSE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/halconf.h b/demos/STM8S-STM8S105-DISCOVERY-IAR/halconf.h new file mode 100644 index 000000000..c9b3ad25a --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/halconf.h @@ -0,0 +1,342 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the TM subsystem.
+ */
+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
+#define HAL_USE_TM FALSE
+#endif
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/main.c b/demos/STM8S-STM8S105-DISCOVERY-IAR/main.c new file mode 100644 index 000000000..86cea3893 --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/main.c @@ -0,0 +1,75 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*
+ * LEDs blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread1, 64);
+static msg_t Thread1(void *arg) {
+
+ (void)arg;
+ chRegSetThreadName("blinker");
+ while (TRUE) {
+ palClearPad(GPIOD, PD_LD10);
+ chThdSleepMilliseconds(500);
+ palSetPad(GPIOD, PD_LD10);
+ chThdSleepMilliseconds(500);
+ }
+}
+
+/*
+ * Application entry point.
+ */
+void main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the serial driver 1 using the driver default configuration.
+ */
+ sdStart(&SD2, NULL);
+
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ /*
+ * Normal main() thread activity.
+ */
+ while (TRUE) {
+ if (palReadPad(GPIOG, 0) == PAL_LOW)
+ /*TestThread(&SD2)*/;
+ if (palReadPad(GPIOG, 1) == PAL_LOW)
+ sdWriteTimeout(&SD2, "Hello World!\r\n", 14, TIME_INFINITE);
+ chThdSleepMilliseconds(1000);
+ }
+}
diff --git a/demos/STM8S-STM8S105-DISCOVERY-IAR/mcuconf.h b/demos/STM8S-STM8S105-DISCOVERY-IAR/mcuconf.h new file mode 100644 index 000000000..cdab55872 --- /dev/null +++ b/demos/STM8S-STM8S105-DISCOVERY-IAR/mcuconf.h @@ -0,0 +1,52 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM8 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ */
+
+/*
+ * HAL general settings.
+ */
+#define STM8S_NO_CLOCK_INIT FALSE
+#define STM8S_HSI_ENABLED FALSE
+#define STM8S_LSI_ENABLED TRUE
+#define STM8S_HSE_ENABLED TRUE
+#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE
+#define STM8S_HSI_DIVIDER CLK_HSI_DIV1
+#define STM8S_CPU_DIVIDER CLK_CPU_DIV1
+#define STM8S_CAN_DIVIDER_VALUE 1
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM8S_SERIAL_USE_UART1 FALSE
+#define STM8S_SERIAL_USE_UART2 TRUE
+#define STM8S_SERIAL_USE_UART3 FALSE
+
+/*
+ * SPI driver system settings.
+ */
+#define STM8S_SPI_USE_SPI TRUE
+#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt()
diff --git a/os/ports/IAR/STM8/chcore.c b/os/ports/IAR/STM8/chcore.c new file mode 100644 index 000000000..6f7d32b30 --- /dev/null +++ b/os/ports/IAR/STM8/chcore.c @@ -0,0 +1,55 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file cosmic/STM8/chcore.c
+ * @brief STM8 (Cosmic) architecture port code.
+ *
+ * @addtogroup STM8_COSMIC_CORE
+ * @{
+ */
+
+#include "ch.h"
+
+__tiny ReadyList rlist;
+
+/**
+ * @brief Thread start code.
+ */
+__task void _port_thread_start(void) {
+ chSysUnlock();
+ asm("popw x");
+}
+
+/**
+ * @brief Halts the system.
+ * @details This function is invoked by the operating system when an
+ * unrecoverable error is detected (for example because a programming
+ * error in the application code that triggers an assertion while in
+ * debug mode).
+ */
+void port_halt(void) {
+
+ port_disable();
+ while (TRUE) {
+ }
+}
+
+/** @} */
diff --git a/os/ports/IAR/STM8/chcore.h b/os/ports/IAR/STM8/chcore.h new file mode 100644 index 000000000..72bfd4b11 --- /dev/null +++ b/os/ports/IAR/STM8/chcore.h @@ -0,0 +1,339 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file cosmic/STM8/chcore.h
+ * @brief STM8 (Cosmic) architecture port macros and structures.
+ *
+ * @addtogroup STM8_COSMIC_CORE
+ * @{
+ */
+
+#ifndef _CHCORE_H_
+#define _CHCORE_H_
+
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
+/*===========================================================================*/
+/* Port configurable parameters. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the use of the WFI instruction in the idle thread loop.
+ */
+#ifndef STM8_ENABLE_WFI_IDLE
+#define STM8_ENABLE_WFI_IDLE FALSE
+#endif
+
+/*===========================================================================*/
+/* Port exported info. */
+/*===========================================================================*/
+
+/**
+ * @brief Unique macro for the implemented architecture.
+ */
+#define CH_ARCHITECTURE_STM8
+
+/**
+ * @brief Name of the implemented architecture.
+ */
+#define CH_ARCHITECTURE_NAME "STM8"
+
+/**
+ * @brief Name of the compiler supported by this port.
+ */
+#define CH_COMPILER_NAME "IAR"
+
+/**
+ * @brief Port-specific information string.
+ */
+#define CH_PORT_INFO "None"
+
+/*===========================================================================*/
+/* Port implementation part. */
+/*===========================================================================*/
+
+/**
+ * @brief Base type for stack alignment.
+ * @note No alignment constraints so uint8_t.
+ */
+typedef uint8_t stkalign_t;
+
+/**
+ * @brief Generic STM8 function pointer.
+ * @note It is used to allocate the proper size for return addresses in
+ * context-related structures.
+ */
+typedef void (*stm8func_t)(void);
+
+/**
+ * @brief Interrupt saved context.
+ * @details This structure represents the stack frame saved during a
+ * preemption-capable interrupt handler.
+ * @note The structure requires one dummy field at its start because the
+ * stack is handled as preincremented/postdecremented.
+ */
+struct extctx {
+ uint8_t _next;
+ uint16_t w3;
+ uint16_t w2;
+ uint16_t w1;
+ uint16_t w0;
+ uint8_t cc;
+ uint8_t a;
+ uint16_t x;
+ uint16_t y;
+ uint8_t pce;
+ uint8_t pch;
+ uint8_t pcl;
+};
+
+/**
+ * @brief System saved context.
+ * @details This structure represents the inner stack frame during a context
+ * switching..
+ * @note The structure requires one dummy field at its start because the
+ * stack is handled as preincremented/postdecremented.
+ */
+struct intctx {
+ uint8_t _next;
+ uint16_t w7;
+ uint16_t w6;
+ uint16_t w5;
+ uint16_t w4;
+ stm8func_t pc; /* Function pointer sized return address. */
+};
+
+/**
+ * @brief Platform dependent part of the @p Thread structure.
+ * @details This structure usually contains just the saved stack pointer
+ * defined as a pointer to a @p intctx structure.
+ */
+struct context {
+ struct intctx *sp;
+};
+
+/**
+ * @brief Start context.
+ * @details This context is the stack organization for the trampoline code
+ * @p _port_thread_start().
+ */
+struct stm8_startctx {
+ uint8_t saved_vreg[8]; // saved virtual registers to restore
+ uint8_t _next;
+ stm8func_t ts; /* Trampoline address. */
+ void *arg; /* Thread argument. */
+ stm8func_t pc; /* Thread function address. */
+ stm8func_t ret; /* chThdExit() address. */
+};
+
+/**
+ * @brief Platform dependent part of the @p chThdCreateI() API.
+ * @details This code usually setup the context switching frame represented
+ * by an @p intctx structure.
+ */
+#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
+ struct stm8_startctx *scp; \
+ scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize - \
+ sizeof(struct stm8_startctx)); \
+ scp->ts = (stm8func_t)_port_thread_start; \
+ scp->arg = (void *)arg; \
+ scp->pc = (stm8func_t)pf; \
+ scp->ret = (stm8func_t)chThdExit; \
+ tp->p_ctx.sp = (struct intctx *)scp; \
+}
+
+/**
+ * @brief Stack size for the system idle thread.
+ * @details This size depends on the idle thread implementation, usually
+ * the idle thread should take no more space than those reserved
+ * by @p PORT_INT_REQUIRED_STACK.
+ */
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 0
+#endif
+
+/**
+ * @brief Per-thread stack overhead for interrupts servicing.
+ * @details This is a safe value, you may trim it down after reading the
+ * right size in the map file.
+ */
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 48
+#endif
+
+/**
+ * @brief Enforces a correct alignment for a stack area size value.
+ */
+#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
+
+/**
+ * @brief Computes the thread working area global size.
+ */
+#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
+ (sizeof(struct intctx) - 1) + \
+ (sizeof(struct extctx) - 1) + \
+ (n) + (PORT_INT_REQUIRED_STACK))
+
+/**
+ * @brief Static working area allocation.
+ * @details This macro is used to allocate a static thread working area
+ * aligned as both position and size.
+ */
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
+
+/**
+ * @brief IRQ prologue code.
+ * @details This macro must be inserted at the start of all IRQ handlers
+ * enabled to invoke system APIs.
+ */
+#define PORT_IRQ_PROLOGUE()
+
+/**
+ * @brief IRQ epilogue code.
+ * @details This macro must be inserted at the end of all IRQ handlers
+ * enabled to invoke system APIs.
+ */
+#define PORT_IRQ_EPILOGUE() { \
+ dbg_check_lock(); \
+ if (chSchIsPreemptionRequired()) \
+ chSchDoReschedule(); \
+ dbg_check_unlock(); \
+}
+
+/**
+ * @brief IRQ handler function declaration.
+ * @note @p id can be a function name or a vector number depending on the
+ * port implementation.
+ */
+#define PORT_IRQ_HANDLER(id) \
+ _Pragma(VECTOR_ID((id)+2)) __interrupt void vector##id(void)
+
+/**
+ * @brief Port-related initialization code.
+ * @note None in this port.
+ */
+#define port_init()
+
+/**
+ * @brief Kernel-lock action.
+ * @note Implemented as global interrupts disable.
+ */
+#define port_lock() asm("sim")
+
+/**
+ * @brief Kernel-unlock action.
+ * @note Implemented as global interrupts enable.
+ */
+#define port_unlock() asm("rim")
+
+/**
+ * @brief Kernel-lock action from an interrupt handler.
+ * @note This function is empty in this port.
+ */
+#define port_lock_from_isr()
+
+/**
+ * @brief Kernel-unlock action from an interrupt handler.
+ * @note This function is empty in this port.
+ */
+#define port_unlock_from_isr()
+
+/**
+ * @brief Disables all the interrupt sources.
+ * @note Implemented as global interrupts disable.
+ * @note Of course non-maskable interrupt sources are not included.
+ */
+#define port_disable() asm("sim")
+
+/**
+ * @brief Disables the interrupt sources that are not supposed to preempt
+ * the kernel.
+ * @note Same as @p port_disable() in this port, there is no difference
+ * between the two states.
+ */
+#define port_suspend() asm("sim")
+
+/**
+ * @brief Enables all the interrupt sources.
+ * @note Implemented as global interrupt enable.
+ */
+#define port_enable() asm("rim")
+
+/**
+ * @brief Enters an architecture-dependent halt mode.
+ * @note Implemented with the specific "wfi" instruction.
+ */
+#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
+#define port_wait_for_interrupt() asm("wfi")
+#else
+#define port_wait_for_interrupt()
+#endif
+
+/**
+ * @brief Performs a context switch between two threads.
+ * @details This is the most critical code in any port, this function
+ * is responsible for the context switch between 2 threads.
+ * @note Implemented as a call to a low level assembler routine.
+ *
+ * @param ntp the thread to be switched in
+ * @param otp the thread to be switched out
+ */
+#define port_switch(ntp, otp) _port_switch(otp)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void _port_switch(Thread *otp);
+ __task void _port_thread_start(void);
+ void port_halt(void);
+#ifdef __cplusplus
+}
+#endif
+
+/*===========================================================================*/
+/* Scheduler captured code. */
+/*===========================================================================*/
+
+#define PORT_OPTIMIZED_RLIST_VAR
+#define PORT_OPTIMIZED_RLIST_EXT
+#define PORT_OPTIMIZED_READYLIST_STRUCT
+
+typedef struct {
+ ThreadsQueue r_queue;
+ tprio_t r_prio;
+ Thread *r_current;
+#if CH_USE_REGISTRY
+ Thread *r_newer;
+ Thread *r_older;
+#endif
+ /* End of the fields shared with the Thread structure.*/
+#if CH_TIME_QUANTUM > 0
+ cnt_t r_preempt;
+#endif
+} ReadyList;
+
+extern __tiny ReadyList rlist;
+
+#endif /* _CHCORE_H_ */
+
+/** @} */
diff --git a/os/ports/IAR/STM8/chcore_stm8.s b/os/ports/IAR/STM8/chcore_stm8.s new file mode 100644 index 000000000..0db99bea5 --- /dev/null +++ b/os/ports/IAR/STM8/chcore_stm8.s @@ -0,0 +1,57 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+; Get definitions for virtual registers used by the compiler
+#include "vregs.inc"
+
+ SECTION .near_func.text:code
+ EXTERN rlist
+
+/*
+ * Performs a context switch between two threads.
+ */
+ PUBLIC _port_switch
+_port_switch:
+ push ?b8
+ push ?b9
+ push ?b10
+ push ?b11
+ push ?b12
+ push ?b13
+ push ?b14
+ push ?b15
+
+ ldw y,sp
+ ldw (5,x),y
+ ldw x, rlist + 5
+ ldw x,(5,x)
+ ldw sp,x
+
+ pop ?b15
+ pop ?b14
+ pop ?b13
+ pop ?b12
+ pop ?b11
+ pop ?b10
+ pop ?b9
+ pop ?b8
+ ret
+
+ END
diff --git a/os/ports/IAR/STM8/chtypes.h b/os/ports/IAR/STM8/chtypes.h new file mode 100644 index 000000000..a7f2d423b --- /dev/null +++ b/os/ports/IAR/STM8/chtypes.h @@ -0,0 +1,83 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file IAR/STM8/chtypes.h
+ * @brief STM8 (IAR) port system types.
+ *
+ * @addtogroup STM8_IAR_CORE
+ * @{
+ */
+
+#ifndef _CHTYPES_H_
+#define _CHTYPES_H_
+
+#define __need_NULL
+#define __need_size_t
+#include <stddef.h>
+
+#if !defined(_STDINT_H) && !defined(__STDINT_H_)
+#include <stdint.h>
+#endif
+
+typedef int8_t bool_t; /**< Fast boolean type. */
+typedef uint8_t tmode_t; /**< Thread flags. */
+typedef uint8_t tstate_t; /**< Thread state. */
+typedef uint8_t trefs_t; /**< Thread references counter. */
+typedef uint8_t tslices_t; /**< Thread time slices counter. */
+typedef uint8_t tprio_t; /**< Thread priority. */
+typedef int16_t msg_t; /**< Inter-thread message. */
+typedef int8_t eventid_t; /**< Event Id. */
+typedef uint8_t eventmask_t; /**< Events mask. */
+typedef uint16_t systime_t; /**< System time. */
+typedef int8_t cnt_t; /**< Resources counter. */
+
+/**
+ * @brief Inline function modifier.
+ */
+#define INLINE inline
+
+/**
+ * @brief ROM constant modifier.
+ * @note Uses the "const" keyword in this port.
+ */
+#define ROMCONST const
+
+/**
+ * @brief Packed structure modifier (within).
+ * @note Empty in this port.
+ */
+#define PACK_STRUCT_STRUCT
+
+/**
+ * @brief Packed structure modifier (before).
+ * @note Empty in this port.
+ */
+#define PACK_STRUCT_BEGIN
+
+/**
+ * @brief Packed structure modifier (after).
+ * @note Empty in this port.
+ */
+#define PACK_STRUCT_END
+
+#endif /* _CHTYPES_H_ */
+
+/** @} */
diff --git a/os/ports/IAR/STM8/port.dox b/os/ports/IAR/STM8/port.dox new file mode 100644 index 000000000..47fd9d7f4 --- /dev/null +++ b/os/ports/IAR/STM8/port.dox @@ -0,0 +1,95 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @defgroup STM8_IAR STM8
+ * @details STM8 port for the Cosmic C compiler.
+ *
+ * @section STM8_IAR_INTRO Introduction
+ * This port supports all STM8 8 bits MCUs.
+ *
+ * @section STM8_IAR_STATES Mapping of the System States in the STM8 port
+ * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
+ * port:
+ * - <b>Init</b>. This state is represented by the startup code and the
+ * initialization code before @p chSysInit() is executed. It has not a
+ * special hardware state associated.
+ * - <b>Normal</b>. This is the state the system has after executing
+ * @p chSysInit(). Interrupts are enabled.
+ * - <b>Suspended</b>. Interrupts are disabled.
+ * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
+ * Suspended state because there are no fast interrupts in this architecture.
+ * - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
+ * loop.
+ * - <b>S-Locked</b>. Interrupts are disabled.
+ * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
+ * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
+ * order to formally change state because this may change).
+ * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
+ * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
+ * - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
+ * maskable interrupt sources that can be associated to this state.
+ * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
+ * .
+ * @section STM8_IAR_NOTES The STM8 port notes
+ * - The STM8 does not have a dedicated interrupt stack, make sure to reserve
+ * enough stack space for interrupts in each thread stack. This can be done
+ * by modifying the @p INT_REQUIRED_STACK macro into
+ * <b>./os/ports/cosmic/STM8/chcore.h</b>.
+ * - The kernel currently supports only the small memory model so the
+ * kernel files should be loaded in the first 64K. Note that this is not
+ * a problem because upper addresses can be used by the user code, the
+ * kernel can context switch code running there.
+ * - The configuration option @p CH_OPTIMIZE_SPEED is not currently supported
+ * because the missing support of the @p inline "C" keyword in the
+ * compiler.
+ * .
+ * @ingroup cosmic
+ */
+
+/**
+ * @defgroup STM8_IAR_CONF Configuration Options
+ * @details STM8 Configuration Options. The STM8 port allows some
+ * architecture-specific configurations settings that can be overridden
+ * by redefining them in @p chconf.h. Usually there is no need to change
+ * the default values.
+ * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
+ * used by the interrupt handlers.<br>
+ * The default for this value is @p 48, this space is allocated for each
+ * thread so be careful in order to not waste precious RAM space.
+ * .
+ * @ingroup STM8_IAR
+ */
+
+/**
+ * @defgroup STM8_IAR_CORE Core Port Implementation
+ * @details STM8 specific port code, structures and macros.
+ *
+ * @ingroup STM8_IAR
+ */
+
+ /**
+ * @defgroup STM8_IAR_STARTUP Startup Support
+ * @details ChibiOS/RT doed not provide startup files for the STM8, there
+ * are no special startup requirement so the normal toolchain-provided
+ * startup files can be used.
+ *
+ * @ingroup STM8_IAR
+ */
diff --git a/readme.txt b/readme.txt index cbb5fdf1b..277645838 100644 --- a/readme.txt +++ b/readme.txt @@ -161,6 +161,8 @@ 3484947)(backported to 2.4.1).
- FIX: Fixed various minor documentation errors (bug 3484942)(backported
to 2.4.1).
+- NEW: Added an experimental and unsupported STM8 port for the IAR compiler,
+ contributed by "king2".
- NEW: Updated STM8 header files to latest versions from ST.
- NEW: Reorganized the STM32 EXT driver to have a sub-platform specific
part containing all the ISR related code, this has been necessary because
|