diff options
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c | 16 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h | 6 | ||||
| -rw-r--r-- | readme.txt | 2 |
3 files changed, 13 insertions, 11 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c index 5d670d14f..3dda5fbea 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c @@ -677,10 +677,10 @@ void gpt_lld_start(GPTDriver *gptp) { "invalid frequency");
/* Timer configuration.*/
- gptp->tim->CR1 = 0; /* Initially stopped. */
- gptp->tim->CR2 = gptp->config->cr2;
- gptp->tim->PSC = psc; /* Prescaler value. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->CR1 = 0; /* Initially stopped. */
+ gptp->tim->CR2 = gptp->config->cr2;
+ gptp->tim->PSC = psc; /* Prescaler value. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
gptp->tim->DIER = gptp->config->dier & /* DMA-related DIER bits. */
~STM32_TIM_DIER_IRQ_MASK;
}
@@ -695,9 +695,9 @@ void gpt_lld_start(GPTDriver *gptp) { void gpt_lld_stop(GPTDriver *gptp) {
if (gptp->state == GPT_READY) {
- gptp->tim->CR1 = 0; /* Timer disabled. */
+ gptp->tim->CR1 = 0; /* Timer disabled. */
gptp->tim->DIER = 0; /* All IRQs disabled. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
#if STM32_GPT_USE_TIM1
if (&GPTD1 == gptp) {
@@ -819,7 +819,7 @@ void gpt_lld_stop(GPTDriver *gptp) { */
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->ARR = (uint32_t)interval; /* Time constant. */
gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
gptp->tim->CNT = 0; /* Reset counter. */
@@ -861,7 +861,7 @@ void gpt_lld_stop_timer(GPTDriver *gptp) { */
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->ARR = (uint32_t)interval; /* Time constant. */
gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
gptp->tim->SR = 0; /* Clear pending IRQs. */
gptp->tim->CR1 = STM32_TIM_CR1_OPM | STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN;
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h index 16762f38a..f453243cb 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h @@ -541,8 +541,8 @@ struct GPTDriver { *
* @notapi
*/
-#define gpt_lld_change_interval(gptp, interval) \
- ((gptp)->tim->ARR = (uint32_t)((interval) - 1))
+#define gpt_lld_change_interval(gptp, interval) \
+ ((gptp)->tim->ARR = (uint32_t)(interval))
/**
* @brief Returns the interval of GPT peripheral.
@@ -553,7 +553,7 @@ struct GPTDriver { *
* @notapi
*/
-#define gpt_lld_get_interval(gptp) ((gptcnt_t)(gptp)->tim->ARR + 1)
+#define gpt_lld_get_interval(gptp) ((gptcnt_t)(gptp)->tim->ARR)
/**
* @brief Returns the counter value of GPT peripheral.
diff --git a/readme.txt b/readme.txt index 1ca42108f..62ced9c97 100644 --- a/readme.txt +++ b/readme.txt @@ -166,6 +166,8 @@ dependencies and configuration directories. This makes possible
to have multiple non-conflicting makefiles in the same project.
Updated the various platform.mk implementing "smart build" mode.
+- HAL: Fixed more instances of bug #843 (bug #914)(backported to 17.6.4
+ and 16.1.10).
- HAL: Fixed Clock selection for SDMMC2 missing in STM32F7 HAL (bug #913).
- HAL: Fixed STM32 SDMMCv1 driver not setting DMA channel properly for SDCD2
instance (bug #912)(backported to 17.6.4).
|