diff options
| -rw-r--r-- | os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.c | 37 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h | 7 |
4 files changed, 31 insertions, 17 deletions
diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c index 9e2811bc2..6ada01818 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c @@ -702,7 +702,7 @@ void icu_lld_start(ICUDriver *icup) { /* Set eMIOS Clock.*/
#if SPC5_ICU_USE_EMIOS
- active_emios_clock(icup, NULL);
+ icu_active_emios_clock(icup);
#endif
}
diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c index 5be0e81de..7db39f46e 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c @@ -686,7 +686,7 @@ void pwm_lld_start(PWMDriver *pwmp) { /* Set eMIOS Clock.*/
#if SPC5_PWM_USE_EMIOS
- active_emios_clock(NULL, pwmp);
+ pwm_active_emios_clock(pwmp);
#endif
}
diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.c b/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.c index d5c984434..c37c22e25 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.c +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.c @@ -66,34 +66,43 @@ void decrease_emios_active_channels() { emios_active_channels--;
}
-void active_emios_clock(ICUDriver *icup, PWMDriver *pwmp) {
+#if HAL_USE_ICU
+void icu_active_emios_clock(ICUDriver *icup) {
/* If this is the first Channel activated then the eMIOS0 is enabled.*/
if (emios_active_channels == 1) {
SPC5_EMIOS_ENABLE_CLOCK();
/* Disable all unified channels.*/
- if (icup != NULL) {
- icup->emiosp->MCR.B.GPREN = 0;
- icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS_GPRE_VALUE);
- icup->emiosp->MCR.R |= EMIOSMCR_GPREN;
+ icup->emiosp->MCR.B.GPREN = 0;
+ icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS_GPRE_VALUE);
+ icup->emiosp->MCR.R |= EMIOSMCR_GPREN;
- icup->emiosp->MCR.B.GTBE = 1U;
+ icup->emiosp->MCR.B.GTBE = 1U;
- icup->emiosp->UCDIS.R = 0xFFFFFFFF;
+ icup->emiosp->UCDIS.R = 0xFFFFFFFF;
- } else if (pwmp != NULL) {
- pwmp->emiosp->MCR.B.GPREN = 0;
- pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS_GPRE_VALUE);
- pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN;
+ }
+}
+#endif
- pwmp->emiosp->MCR.B.GTBE = 1U;
+#if HAL_USE_PWM
+void pwm_active_emios_clock(PWMDriver *pwmp) {
+ /* If this is the first Channel activated then the eMIOS0 is enabled.*/
+ if (emios_active_channels == 1) {
+ SPC5_EMIOS_ENABLE_CLOCK();
+
+ /* Disable all unified channels.*/
+ pwmp->emiosp->MCR.B.GPREN = 0;
+ pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS_GPRE_VALUE);
+ pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN;
- pwmp->emiosp->UCDIS.R = 0xFFFFFFFF;
+ pwmp->emiosp->MCR.B.GTBE = 1U;
- }
+ pwmp->emiosp->UCDIS.R = 0xFFFFFFFF;
}
}
+#endif
void deactive_emios_clock() {
/* If it is the last active channels then the eMIOS0 is disabled.*/
diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h b/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h index 97bff1ce9..f1f08695b 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h @@ -105,7 +105,12 @@ void reset_emios_active_channels(void); uint32_t get_emios_active_channels(void);;
void increase_emios_active_channels(void);
void decrease_emios_active_channels(void);
-void active_emios_clock(ICUDriver *icup, PWMDriver *pwmp);
+#if HAL_USE_ICU
+void icu_active_emios_clock(ICUDriver *icup);
+#endif
+#if HAL_USE_PWM
+void pwm_active_emios_clock(PWMDriver *pwmp);
+#endif
void deactive_emios_clock(void);
#endif /* HAL_USE_ICU || HAL_USE_PWM */
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