diff options
-rw-r--r-- | os/hal/platforms/STM8/spi_lld.c | 18 | ||||
-rw-r--r-- | readme.txt | 2 | ||||
-rw-r--r-- | testhal/STM8/SPI/ChibiOS-RT.stw | 16 | ||||
-rw-r--r-- | testhal/STM8/SPI/cosmic/cosmic.stp | 1942 | ||||
-rw-r--r-- | testhal/STM8/SPI/cosmic/vectors.c | 106 | ||||
-rw-r--r-- | testhal/STM8/SPI/demo/chconf.h | 507 | ||||
-rw-r--r-- | testhal/STM8/SPI/demo/halconf.h | 173 | ||||
-rw-r--r-- | testhal/STM8/SPI/demo/main.c | 85 | ||||
-rw-r--r-- | testhal/STM8/SPI/demo/mcuconf.h | 46 | ||||
-rw-r--r-- | testhal/STM8/SPI/raisonance/raisonance.stp | 1958 |
10 files changed, 4841 insertions, 12 deletions
diff --git a/os/hal/platforms/STM8/spi_lld.c b/os/hal/platforms/STM8/spi_lld.c index 9f7c057a3..e929f4b69 100644 --- a/os/hal/platforms/STM8/spi_lld.c +++ b/os/hal/platforms/STM8/spi_lld.c @@ -87,18 +87,12 @@ CH_IRQ_HANDLER(10) { goto exit_isr;
}
}
- /* Loading the DR register like it is a FIFO with depth>1 in order to
- handle the case where the shift register is empty too.*/
- while ((SPI->SR & SPI_SR_TXE) != 0) {
+ /* Loading the DR register.*/
+ if ((SPI->SR & SPI_SR_TXE) != 0) {
if (SPID1.spd_txptr != NULL)
SPI->DR = *SPID1.spd_txptr++;
else
SPI->DR = 0xFF;
- if (--SPID1.spd_txcnt == 0) {
- /* Stops just the TX interrupt source.*/
- SPI->ICR &= ~SPI_ICR_TXEI;
- break;
- }
}
exit_isr:
@@ -132,11 +126,11 @@ void spi_lld_init(void) { void spi_lld_start(SPIDriver *spip) {
/* Clock activation.*/
- CLK->PCKENR1 |= CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
+ CLK->PCKENR1 |= CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
/* Configuration.*/
- SPI->CR2 = SPI_CR2_SSI;
- SPI->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_SPE;
+ SPI->CR2 = 0;
+ SPI->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR | SPI_CR1_SPE;
}
/**
@@ -156,7 +150,7 @@ void spi_lld_stop(SPIDriver *spip) { SPI->ICR = 0;
/* Clock de-activation.*/
- CLK->PCKENR1 &= ~CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
+ CLK->PCKENR1 &= (uint8_t)~CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
}
/**
diff --git a/readme.txt b/readme.txt index 294040abc..499120652 100644 --- a/readme.txt +++ b/readme.txt @@ -58,6 +58,7 @@ | +--coverage/ - Code coverage project.
+--testhal/ - HAL integration test demos.
+--STM32/ - STM32 HAL demos.
+ +--STM8/ - STM8 HAL demos.
*****************************************************************************
*** Releases ***
@@ -66,6 +67,7 @@ *** 2.1.3 ***
- FIX: DMA not initialized under some conditions (bug 3099701).
- NEW: Added an SPI driver to the STM8 platform support.
+- NEW: Added a simple STM8 SPI demo under ./testhal/STM8/SPI.
- CHANGE: Renamed most of the STM8 HAL settings macro names in order to
make names more consistent.
NOTE: ****** Make sure to use a mcuconf.h file taken from ******
diff --git a/testhal/STM8/SPI/ChibiOS-RT.stw b/testhal/STM8/SPI/ChibiOS-RT.stw new file mode 100644 index 000000000..a6630271a --- /dev/null +++ b/testhal/STM8/SPI/ChibiOS-RT.stw @@ -0,0 +1,16 @@ +; STMicroelectronics Workspace file
+
+[Version]
+Keyword=ST7Workspace-V0.7
+
+[Project0]
+Filename=cosmic\cosmic.stp
+Dependencies=
+
+[Project1]
+Filename=raisonance\raisonance.stp
+Dependencies=
+[Options]
+ActiveProject=cosmic
+ActiveConfig=Release
+AddSortedElements=0
diff --git a/testhal/STM8/SPI/cosmic/cosmic.stp b/testhal/STM8/SPI/cosmic/cosmic.stp new file mode 100644 index 000000000..e6e5a3a6a --- /dev/null +++ b/testhal/STM8/SPI/cosmic/cosmic.stp @@ -0,0 +1,1942 @@ +; STMicroelectronics Project file
+
+[Version]
+Keyword=ST7Project
+Number=1.3
+
+[Project]
+Name=cosmic
+Toolset=STM8 Cosmic
+
+[Config]
+0=Config.0
+1=Config.1
+
+[Config.0]
+ConfigName=Debug
+Target=$(ProjectSFile).elf
+OutputFolder=Debug
+Debug=$(TargetFName)
+
+[Config.1]
+ConfigName=Release
+Target=$(ProjectSFile).elf
+OutputFolder=Release
+Debug=$(TargetFName)
+
+[Root]
+ElemType=Project
+PathName=cosmic
+Child=Root.Source Files
+Config.0=Root.Config.0
+Config.1=Root.Config.1
+
+[Root.Config.0]
+Settings.0.0=Root.Config.0.Settings.0
+Settings.0.1=Root.Config.0.Settings.1
+Settings.0.2=Root.Config.0.Settings.2
+Settings.0.3=Root.Config.0.Settings.3
+Settings.0.4=Root.Config.0.Settings.4
+Settings.0.5=Root.Config.0.Settings.5
+Settings.0.6=Root.Config.0.Settings.6
+Settings.0.7=Root.Config.0.Settings.7
+Settings.0.8=Root.Config.0.Settings.8
+
+[Root.Config.1]
+Settings.1.0=Root.Config.1.Settings.0
+Settings.1.1=Root.Config.1.Settings.1
+Settings.1.2=Root.Config.1.Settings.2
+Settings.1.3=Root.Config.1.Settings.3
+Settings.1.4=Root.Config.1.Settings.4
+Settings.1.5=Root.Config.1.Settings.5
+Settings.1.6=Root.Config.1.Settings.6
+Settings.1.7=Root.Config.1.Settings.7
+Settings.1.8=Root.Config.1.Settings.8
+
+[Root.Config.0.Settings.0]
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+String.100.0=ST Assembler Linker
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+String.101.0=STM8 Cosmic
+String.102.0=C:\Programmi\COSMIC\CXSTM8_32K
+String.103.0=
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+
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\ No newline at end of file diff --git a/testhal/STM8/SPI/cosmic/vectors.c b/testhal/STM8/SPI/cosmic/vectors.c new file mode 100644 index 000000000..e9a5ad450 --- /dev/null +++ b/testhal/STM8/SPI/cosmic/vectors.c @@ -0,0 +1,106 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief Exception handler type.
+ */
+typedef void @far @interrupt (*interrupt_handler_t)(void);
+
+/*
+ * Various external symbols.
+ */
+void _stext(void);
+@far @interrupt void vector10(void);
+@far @interrupt void vector13(void);
+@far @interrupt void vector17(void);
+@far @interrupt void vector18(void);
+@far @interrupt void vector20(void);
+@far @interrupt void vector21(void);
+
+/**
+ * @brief Exception vector type.
+ */
+typedef struct {
+ uint8_t ev_instruction;
+ interrupt_handler_t ev_handler;
+} exception_vector_t;
+
+/**
+ * @brief Undefined interrupt handler.
+ * @note It should never be invoked.
+ */
+@far @interrupt static void vector (void)
+{
+ return;
+}
+
+/**
+ * @brief Exceptions table.
+ */
+exception_vector_t const _vectab[] = {
+ {0x82, (interrupt_handler_t)_stext}, /* reset */
+ {0x82, vector}, /* trap */
+ {0x82, vector}, /* vector0 */
+ {0x82, vector}, /* vector1 */
+ {0x82, vector}, /* vector2 */
+ {0x82, vector}, /* vector3 */
+ {0x82, vector}, /* vector4 */
+ {0x82, vector}, /* vector5 */
+ {0x82, vector}, /* vector6 */
+ {0x82, vector}, /* vector7 */
+ {0x82, vector}, /* vector8 */
+ {0x82, vector}, /* vector9 */
+#if CH_HAL_USE_SPI && STM8_SPI_USE_SPI
+ {0x82, vector10},
+#else
+ {0x82, vector}, /* vector10 */
+#endif
+ {0x82, vector}, /* vector11 */
+ {0x82, vector}, /* vector12 */
+ {0x82, vector13}, /* vector13 */
+ {0x82, vector}, /* vector14 */
+ {0x82, vector}, /* vector15 */
+ {0x82, vector}, /* vector16 */
+#if CH_HAL_USE_SERIAL && STM8_SERIAL_USE_UART1
+ {0x82, vector17}, /* vector17 */
+ {0x82, vector18}, /* vector18 */
+#else
+ {0x82, vector}, /* vector17 */
+ {0x82, vector}, /* vector18 */
+#endif
+ {0x82, vector}, /* vector19 */
+#if CH_HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3)
+ {0x82, vector20}, /* vector20 */
+ {0x82, vector21}, /* vector21 */
+#else
+ {0x82, vector}, /* vector20 */
+ {0x82, vector}, /* vector21 */
+#endif
+ {0x82, vector}, /* vector22 */
+ {0x82, vector}, /* vector23 */
+ {0x82, vector}, /* vector24 */
+ {0x82, vector}, /* vector25 */
+ {0x82, vector}, /* vector26 */
+ {0x82, vector}, /* vector27 */
+ {0x82, vector}, /* vector28 */
+ {0x82, vector}, /* vector29 */
+};
diff --git a/testhal/STM8/SPI/demo/chconf.h b/testhal/STM8/SPI/demo/chconf.h new file mode 100644 index 000000000..12b5c9e15 --- /dev/null +++ b/testhal/STM8/SPI/demo/chconf.h @@ -0,0 +1,507 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters. */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 100
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 10
+#endif
+
+/**
+ * @brief Nested locks.
+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ * operations is allowed.<br>
+ * For performance and code size reasons the recommended setting
+ * is to leave this option disabled.<br>
+ * You may use this option if you need to merge ChibiOS/RT with
+ * external libraries that require nested lock/unlock operations.
+ *
+ * @note T he default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS FALSE
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_COREMEM.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 128
+#endif
+
+/*===========================================================================*/
+/* Performance options. */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED FALSE
+#endif
+
+/**
+ * @brief Exotic optimization.
+ * @details If defined then a CPU register is used as storage for the global
+ * @p currp variable. Caching this variable in a register greatly
+ * improves both space and time OS efficiency. A side effect is that
+ * one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster context switch.
+ *
+ * @note This option is only usable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ * -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ * documentation only.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options. */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM8/SPI/demo/halconf.h b/testhal/STM8/SPI/demo/halconf.h new file mode 100644 index 000000000..2783110fc --- /dev/null +++ b/testhal/STM8/SPI/demo/halconf.h @@ -0,0 +1,173 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+/*
+ * HAL configuration file, this file allows to enable or disable the various
+ * device drivers from your application. You may also use this file in order
+ * to override the device drivers default settings.
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/*
+ * Uncomment the following line in order to include a mcu-related
+ * settings file. This file can be used to include platform specific
+ * header files or to override the low level drivers settings.
+ */
+#include "mcuconf.h"
+
+/*===========================================================================*/
+/* PAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
+#define CH_HAL_USE_PAL TRUE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
+#define CH_HAL_USE_ADC FALSE
+#endif
+
+/*
+ * Default ADC settings overrides (uncomment to override).
+ */
+/*#define ADC_USE_WAIT TRUE*/
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
+#define CH_HAL_USE_CAN FALSE
+#endif
+
+/*
+ * Default CAN settings overrides (uncomment to override).
+ */
+/*#define CAN_USE_SLEEP_MODE TRUE*/
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
+#define CH_HAL_USE_MAC FALSE
+#endif
+
+/*===========================================================================*/
+/* PWM driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
+#define CH_HAL_USE_PWM FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define CH_HAL_USE_SERIAL FALSE
+#endif
+
+/*
+ * Default SERIAL settings overrides (uncomment to override).
+ */
+/*#define SERIAL_DEFAULT_BITRATE 38400*/
+#define SERIAL_BUFFERS_SIZE 16
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
+#define CH_HAL_USE_SPI TRUE
+#endif
+
+/*
+ * Default SPI settings overrides (uncomment to override).
+ */
+/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define CH_HAL_USE_MMC_SPI FALSE
+#endif
+
+/*
+ * Default MMC_SPI settings overrides (uncomment to override).
+ */
+/*#define MMC_SECTOR_SIZE 512*/
+/*#define MMC_NICE_WAITING TRUE*/
+/*#define MMC_POLLING_INTERVAL 10*/
+/*#define MMC_POLLING_DELAY 10*/
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__)
+#define CH_HAL_USE_UART FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM8/SPI/demo/main.c b/testhal/STM8/SPI/demo/main.c new file mode 100644 index 000000000..d73d8d2ab --- /dev/null +++ b/testhal/STM8/SPI/demo/main.c @@ -0,0 +1,85 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*
+ * SPI configuration (8MHz, CPHA=0, CPOL=0, MSb first).
+ */
+static ROMCONST SPIConfig spicfg = {
+ NULL,
+ GPIOD,
+ PD_LD10,
+ 0
+};
+
+/*
+ * Transmit data.
+ */
+static ROMCONST uint8_t digits[32] = {
+ 0x24, 0xAF, 0xE0, 0xA2, 0x2B, 0x32, 0x30, 0xA7,
+ 0x20, 0x22, 0x21, 0x38, 0x74, 0xA8, 0x70, 0x71,
+ 0x04, 0x8F, 0xC0, 0x82, 0x0B, 0x12, 0x10, 0x87,
+ 0x00, 0x02, 0x01, 0x18, 0x54, 0x88, 0x50, 0x51
+};
+
+/*
+ * Receive buffer.
+ */
+static uint8_t buffer[32];
+
+/*
+ * Entry point.
+ */
+void main(void) {
+
+ /*
+ * Board/HAL initialization.
+ */
+ hwinit();
+
+ /*
+ * OS initialization.
+ */
+ chSysInit();
+
+ /*
+ * Activates the SPI driver 1 using the driver default configuration.
+ */
+ spiStart(&SPID1, &spicfg);
+
+ /*
+ * Normal main() thread activity.
+ */
+ while (TRUE) {
+ volatile uint8_t b;
+
+ chThdSleepMilliseconds(1000);
+ /* Exchanging data, if the pins MISO and MOSI are connected then the
+ transmitted data is received back into the buffer. On the
+ STM8S-Discovery board the pins are CN2-9 and CN2-10.*/
+ spiSelect(&SPID1);
+ spiExchange(&SPID1, sizeof(digits), digits, buffer);
+ /* Polled transfers test.*/
+ b = spiPolledExchange(&SPID1, 0x55);
+ b = spiPolledExchange(&SPID1, 0xAA);
+ spiUnselect(&SPID1);
+ }
+}
diff --git a/testhal/STM8/SPI/demo/mcuconf.h b/testhal/STM8/SPI/demo/mcuconf.h new file mode 100644 index 000000000..70aae8849 --- /dev/null +++ b/testhal/STM8/SPI/demo/mcuconf.h @@ -0,0 +1,46 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM8 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ */
+
+/*
+ * HAL general settings.
+ */
+#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI
+#define STM8_HSI_DIVIDER CLK_HSI_DIV1
+#define STM8_CPU_DIVIDER CLK_CPU_DIV1
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM8_SERIAL_USE_UART1 FALSE
+#define STM8_SERIAL_USE_UART2 TRUE
+#define STM8_SERIAL_USE_UART3 FALSE
+
+/*
+ * SPI driver system settings.
+ */
+#define STM8_SPI_USE_SPI TRUE
+#define STM8_SPI_ERROR_HOOK(spip) chSysHalt()
diff --git a/testhal/STM8/SPI/raisonance/raisonance.stp b/testhal/STM8/SPI/raisonance/raisonance.stp new file mode 100644 index 000000000..003420b04 --- /dev/null +++ b/testhal/STM8/SPI/raisonance/raisonance.stp @@ -0,0 +1,1958 @@ +; STMicroelectronics Project file
+
+[Version]
+Keyword=ST7Project
+Number=1.3
+
+[Project]
+Name=raisonance
+Toolset=Raisonance
+
+[Config]
+0=Config.0
+1=Config.1
+
+[Config.0]
+ConfigName=Debug
+Target=$(ProjectSFile).elf
+OutputFolder=Debug
+Debug=$(TargetFName)
+
+[Config.1]
+ConfigName=Release
+Target=$(ProjectSFile).elf
+OutputFolder=Release
+Debug=$(TargetFName)
+
+[Root]
+ElemType=Project
+PathName=raisonance
+Child=Root.Source Files
+Config.0=Root.Config.0
+Config.1=Root.Config.1
+
+[Root.Config.0]
+Settings.0.0=Root.Config.0.Settings.0
+Settings.0.1=Root.Config.0.Settings.1
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+Settings.0.5=Root.Config.0.Settings.5
+Settings.0.6=Root.Config.0.Settings.6
+Settings.0.7=Root.Config.0.Settings.7
+Settings.0.8=Root.Config.0.Settings.8
+
+[Root.Config.1]
+Settings.1.0=Root.Config.1.Settings.0
+Settings.1.1=Root.Config.1.Settings.1
+Settings.1.2=Root.Config.1.Settings.2
+Settings.1.3=Root.Config.1.Settings.3
+Settings.1.4=Root.Config.1.Settings.4
+Settings.1.5=Root.Config.1.Settings.5
+Settings.1.6=Root.Config.1.Settings.6
+Settings.1.7=Root.Config.1.Settings.7
+Settings.1.8=Root.Config.1.Settings.8
+
+[Root.Config.0.Settings.0]
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+
+[Root.Config.0.Settings.2]
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