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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-07-11 11:59:23 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-07-11 11:59:23 +0000 |
commit | 2ab5ce68ba6f7913fe63b2905f8065327d769b79 (patch) | |
tree | e92906be8a4367f19c0cfde66553051c7f3965ce /tools | |
parent | dbfb5a1f70e69a3f412f2a69f528bf398633c10f (diff) | |
download | ChibiOS-2ab5ce68ba6f7913fe63b2905f8065327d769b79.tar.gz ChibiOS-2ab5ce68ba6f7913fe63b2905f8065327d769b79.tar.bz2 ChibiOS-2ab5ce68ba6f7913fe63b2905f8065327d769b79.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4458 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'tools')
-rw-r--r-- | tools/gencfg/lib/libstm32f4xx.ftl | 70 | ||||
-rw-r--r-- | tools/gencfg/processors/boards/stm32f4xx/templates/board.h.ftl | 46 |
2 files changed, 85 insertions, 31 deletions
diff --git a/tools/gencfg/lib/libstm32f4xx.ftl b/tools/gencfg/lib/libstm32f4xx.ftl index 9ede34c2c..2a541606d 100644 --- a/tools/gencfg/lib/libstm32f4xx.ftl +++ b/tools/gencfg/lib/libstm32f4xx.ftl @@ -53,6 +53,76 @@ const ADCGroupConfig ${grpcfg_name} = { [#else]
${group.@error_callback[0]?string?trim},
[/#if]
+ /* CR1 register initialization value.*/
+ [#local resolution = group.@resolution[0]?word_list[0]?number /]
+ [#local cr1 = "ADC_CR1_RESOLUTION_N(" + resolution?string + ")" /]
+ [#local discnum = group.@discontinuous_number[0]?word_list[0]?number /]
+ [#local cr1 = cr1 + " | ADC_CR1_DISCNUM_N(" + (discnum - 1)?string + ")" /]
+ [#if group.@discontinuous_mode[0]?string == "true"]
+ [#local cr1 = cr1 + " | ADC_CR1_DISCEN" /]
+ [/#if]
+ ${cr1},
+ /* CR2 register initialization value.*/
+ [#local exten = group.@trigger_mode[0]?word_list[0]?number /]
+ [#local cr2 = "ADC_CR1_EXTEN_N(" + exten?string + ")" /]
+ [#local extsel = group.@trigger_source[0]?word_list[0]?number /]
+ [#local cr2 = cr2 + " | ADC_CR1_EXSEL_N(" + extsel?string + ")" /]
+ [#if group.@alignment[0]?word_list[0]?number != 0]
+ [#local cr2 = cr2 + " | ADC_CR2_ALIGN" /]
+ [/#if]
+ ${cr2},
+ /* Channels sample time settings.*/
+ [#local smpr1 = "" /]
+ [#local smpr2 = "" /]
+ [#list group.sample_time.* as input]
+ [#local sinput = input?node_name]
+ [#if input_index < 9]
+ [#local smpr2 = smpr2 + "ADC_SMPR2_SMP_" + input?node_name +
+ "(" + input?string + ") | " /]
+ [#elseif input_index == 9]
+ [#local smpr2 = smpr2 + "ADC_SMPR2_SMP_" + input?node_name +
+ "(" + input?string + ")," /]
+ [#elseif input_index < 18]
+ [#local smpr1 = smpr1 + "ADC_SMPR1_SMP_" + input?node_name +
+ "(" + input?string + ") | " /]
+ [#else]
+ [#local smpr1 = smpr1 + "ADC_SMPR1_SMP_" + input?node_name +
+ "(" + input?string + ")," /]
+ [/#if]
+ [/#list]
+ [@utils.FormatStringAsText " " " " smpr1 80 /]
+ [@utils.FormatStringAsText " " " " smpr2 80 /]
+ /* Channels sequence.*/
+ [#local sqr1 = "ADC_SQR1_NUM_CH(" + group.channels_sequence?size + ")" /]
+ [#local sqr2 = "" /]
+ [#local sqr3 = "" /]
+ [#list group.channels_sequence.channel as channel]
+ [#if channel_index <= 5]
+ [#local sqr3 = sqr3 + "ADC_SQR3_SQ" + (channel_index + 1) +
+ "_N(" + channel + ")" /]
+ [#if channel_has_next && channel_index < 5]
+ [#local sqr3 = sqr3 + " | " /]
+ [/#if]
+ [#elseif channel_index <= 11]
+ [#local sqr2 = sqr2 + "ADC_SQR2_SQ" + (channel_index + 1) +
+ "_N(" + channel + ")" /]
+ [#if channel_has_next && channel_index < 11]
+ [#local sqr2 = sqr2 + " | " /]
+ [/#if]
+ [#else]
+ [#local sqr1 = sqr1 + " | ADC_SQR2_SQ" + (channel_index + 1) +
+ "_N(" + channel + ")" /]
+ [/#if]
+ [/#list]
+ [#-- SQR2 could be empty.--]
+ [#if sqr2 == ""]
+ [#local sqr2 = "0" /]
+ [/#if]
+ [#local sqr1 = sqr1 + "," /]
+ [#local sqr2 = sqr2 + "," /]
+ [@utils.FormatStringAsText " " " " sqr1 80 /]
+ [@utils.FormatStringAsText " " " " sqr2 80 /]
+ [@utils.FormatStringAsText " " " " sqr3 80 /]
};
[/#list]
[/#macro]
diff --git a/tools/gencfg/processors/boards/stm32f4xx/templates/board.h.ftl b/tools/gencfg/processors/boards/stm32f4xx/templates/board.h.ftl index 3a6881fc4..dccb8782f 100644 --- a/tools/gencfg/processors/boards/stm32f4xx/templates/board.h.ftl +++ b/tools/gencfg/processors/boards/stm32f4xx/templates/board.h.ftl @@ -86,15 +86,13 @@ */
[#list doc1.board.ports.* as port]
[#assign port_name = port?node_name?upper_case /]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
[#if name?length == 0]
[#assign name = pin_name /]
[/#if]
-#define ${(port_name + "_" + name)?right_pad(27, " ")} ${pinidx?string}
- [#assign pinidx = pinidx + 1 /]
+#define ${(port_name + "_" + name)?right_pad(27, " ")} ${pin_index?string}
[/#list]
[/#list]
@@ -126,7 +124,6 @@ * ${port_name} setup:
*
[#-- Generating pin descriptions inside the comment.--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -147,14 +144,12 @@ [#else]
[#assign desc = "Analog" /]
[/#if]
- * P${(port?node_name[4..] + pinidx?string)?right_pad(3, " ")} - ${name?right_pad(26, " ")}(${desc?lower_case}).
- [#assign pinidx = pinidx + 1 /]
+ * P${(port?node_name[4..] + pin_index?string)?right_pad(3, " ")} - ${name?right_pad(26, " ")}(${desc?lower_case}).
[/#list]
*/
[#--
-- Generating MODER register value.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -171,22 +166,20 @@ [#else]
[#assign out = "PIN_MODE_ANALOG(" + port_name + "_" + name + ")" /]
[/#if]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_MODER (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if pinidx < 15]
+ [#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[#--
-- Generating OTYPER register value.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -199,22 +192,20 @@ ${line + ")"} [#else]
[#assign out = "PIN_OTYPE_OPENDRAIN(" + port_name + "_" + name + ")" /]
[/#if]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_OTYPER (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if pinidx < 15]
+ [#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[#--
-- Generating SPEEDR register value.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -231,22 +222,20 @@ ${line + ")"} [#else]
[#assign out = "PIN_OSPEED_100M(" + port_name + "_" + name + ")" /]
[/#if]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_OSPEEDR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if pinidx < 15]
+ [#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[#--
-- Generating PUPDR register value.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -261,22 +250,20 @@ ${line + ")"} [#else]
[#assign out = "PIN_PUPDR_PULLDOWN(" + port_name + "_" + name + ")" /]
[/#if]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_PUPDR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if pinidx < 15]
+ [#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[#--
-- Generating ODR register value.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -289,22 +276,20 @@ ${line + ")"} [#else]
[#assign out = "PIN_ODR_HIGH(" + port_name + "_" + name + ")" /]
[/#if]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_ODR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if pinidx < 15]
+ [#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[#--
-- Generating AFRx registers values.
--]
- [#assign pinidx = 0 /]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
@@ -313,19 +298,18 @@ ${line + ")"} [/#if]
[#assign alternate = pin.@Alternate[0]?trim /]
[#assign out = "PIN_AFIO_AF(" + port_name + "_" + name + ", " + alternate + ")" /]
- [#if pinidx == 0]
+ [#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_AFRL (" + out /]
- [#elseif pinidx == 8]
+ [#elseif pin_index == 8]
[#assign line = "#define VAL_" + port_name + "_AFRH (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
- [#if (pinidx == 7) || (pinidx == 15)]
+ [#if (pin_index == 7) || (pin_index == 15)]
${line + ")"}
[#else]
${(line + " |")?right_pad(76, " ") + "\\"}
[/#if]
- [#assign pinidx = pinidx + 1 /]
[/#list]
[/#list]
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