diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-16 18:43:53 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-16 18:43:53 +0000 |
| commit | 28af17c090856082986e46a153fc58e7061a632f (patch) | |
| tree | 0fb30a87e2860f30ff0f7ea144fe1da822c7f54c /testhal | |
| parent | ab2d0948f733b7e4a43c9ae6b30a8ea3df12b495 (diff) | |
| download | ChibiOS-28af17c090856082986e46a153fc58e7061a632f.tar.gz ChibiOS-28af17c090856082986e46a153fc58e7061a632f.tar.bz2 ChibiOS-28af17c090856082986e46a153fc58e7061a632f.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7517 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
| -rw-r--r-- | testhal/STM32/STM32F0xx/ADC/mcuconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/EXT/mcuconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/SPI/mcuconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/UART/mcuconf.h | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/testhal/STM32/STM32F0xx/ADC/mcuconf.h b/testhal/STM32/STM32F0xx/ADC/mcuconf.h index 4bf2368b8..ad866ae41 100644 --- a/testhal/STM32/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32/STM32F0xx/ADC/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
diff --git a/testhal/STM32/STM32F0xx/EXT/mcuconf.h b/testhal/STM32/STM32F0xx/EXT/mcuconf.h index 6a543a74c..84c08b25c 100644 --- a/testhal/STM32/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32/STM32F0xx/EXT/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
diff --git a/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h index 6b6aa6bd1..7bb2a9449 100644 --- a/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
diff --git a/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h index 3be851320..829f72e64 100644 --- a/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
diff --git a/testhal/STM32/STM32F0xx/SPI/mcuconf.h b/testhal/STM32/STM32F0xx/SPI/mcuconf.h index 26f86f8eb..32af71e98 100644 --- a/testhal/STM32/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32/STM32F0xx/SPI/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
diff --git a/testhal/STM32/STM32F0xx/UART/mcuconf.h b/testhal/STM32/STM32F0xx/UART/mcuconf.h index a0a19d3d3..779e82817 100644 --- a/testhal/STM32/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32/STM32F0xx/UART/mcuconf.h @@ -42,7 +42,7 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI
+#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
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