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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-12 10:16:56 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-12 10:16:56 +0000
commit1e80eff6a8167b3f0d8a960fec96d922107a8be7 (patch)
treed0bcb079150d109c4447ea7f03e5623f511d80f3 /testhal
parent30e29ea2155b522e962cd2778cb001089feb58c5 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3489 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
-rw-r--r--testhal/STM32F4xx/SPI/main.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c
index 2414cc559..4a2b1ad3f 100644
--- a/testhal/STM32F4xx/SPI/main.c
+++ b/testhal/STM32F4xx/SPI/main.c
@@ -22,7 +22,7 @@
#include "hal.h"
/*
- * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).
+ * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first).
*/
static const SPIConfig hs_spicfg = {
NULL,
@@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = {
};
/*
- * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first).
+ * Low speed SPI configuration (328.125KHz, CPHA=0, CPOL=0, MSb first).
*/
static const SPIConfig ls_spicfg = {
NULL,