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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-23 12:14:39 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-23 12:14:39 +0000 |
| commit | 590c03982fcf964a54948e33952701d4fe76023b (patch) | |
| tree | 94b6d7160c54f0c2755bea9cdb1d4baa8787bbab /testhal/STM32F4xx/CAN | |
| parent | 4377d247aedc476bc9a7784ecf534ac662ff7dbd (diff) | |
| download | ChibiOS-590c03982fcf964a54948e33952701d4fe76023b.tar.gz ChibiOS-590c03982fcf964a54948e33952701d4fe76023b.tar.bz2 ChibiOS-590c03982fcf964a54948e33952701d4fe76023b.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6213 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32F4xx/CAN')
| -rw-r--r-- | testhal/STM32F4xx/CAN/mcuconf.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index b1116bdeb..9e6b55a96 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -245,6 +245,8 @@ #define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USE_UART4 FALSE
+#define STM32_UART_USE_UART5 FALSE
#define STM32_UART_USE_USART6 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
@@ -252,15 +254,23 @@ #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_UART4_IRQ_PRIORITY 12
+#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_UART4_DMA_PRIORITY 0
+#define STM32_UART_UART5_DMA_PRIORITY 0
#define STM32_UART_USART6_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
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