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authorgdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-10-28 17:00:24 +0000
committergdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-10-28 17:00:24 +0000
commit18a8116ad45784a710a7129930e9d0b892ef1df3 (patch)
tree141fb997837a43b40fbd3c3ff6e3ce436bc08651 /testhal/STM32/multi
parentbeef652b8946a5fbf4245a0c3a07a411247614ad (diff)
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Updated PLLSAIx settings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12398 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'testhal/STM32/multi')
-rw-r--r--testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h b/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
index a54969cb4..99336e8ac 100644
--- a/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
+++ b/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
@@ -69,13 +69,13 @@
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
-#define STM32_PLLSAI1M_VALUE 1
+#define STM32_PLLSAI1M_VALUE 4
#define STM32_PLLSAI1N_VALUE 72
#define STM32_PLLSAI1PDIV_VALUE 6
#define STM32_PLLSAI1P_VALUE 7
#define STM32_PLLSAI1Q_VALUE 6
#define STM32_PLLSAI1R_VALUE 6
-#define STM32_PLLSAI2M_VALUE 1
+#define STM32_PLLSAI2M_VALUE 4
#define STM32_PLLSAI2N_VALUE 72
#define STM32_PLLSAI2PDIV_VALUE 6
#define STM32_PLLSAI2P_VALUE 7