diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-08 12:36:23 +0000 | 
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-08 12:36:23 +0000 | 
| commit | d4481fd211ea38aba3b32ace750834e5783f05e9 (patch) | |
| tree | 3dbe7fc29847b90bf9cf5d46aca6d8436a73fac6 /testhal/STM32/multi/USB_CDC | |
| parent | e1474c129264bf3c378544cf25c79fe8aaf8f5d5 (diff) | |
| download | ChibiOS-d4481fd211ea38aba3b32ace750834e5783f05e9.tar.gz ChibiOS-d4481fd211ea38aba3b32ace750834e5783f05e9.tar.bz2 ChibiOS-d4481fd211ea38aba3b32ace750834e5783f05e9.zip  | |
H7 OTG changes, not complete.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12015 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'testhal/STM32/multi/USB_CDC')
9 files changed, 1999 insertions, 7 deletions
diff --git a/testhal/STM32/multi/USB_CDC/.cproject b/testhal/STM32/multi/USB_CDC/.cproject index 7d7ddf83c..a4b2c720b 100644 --- a/testhal/STM32/multi/USB_CDC/.cproject +++ b/testhal/STM32/multi/USB_CDC/.cproject @@ -171,6 +171,40 @@  			</storageModule>
  			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
  		</cconfiguration>
 +		<cconfiguration id="0.1093754934.1600162136.1322052889">
 +			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1093754934.1600162136.1322052889" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32H743-Nucleo144">
 +				<externalSettings/>
 +				<extensions>
 +					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +				</extensions>
 +			</storageModule>
 +			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 +				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.1093754934.1600162136.1322052889" name="Build for STM32H743-Nucleo144" parent="org.eclipse.cdt.build.core.prefbase.cfg">
 +					<folderInfo id="0.1093754934.1600162136.1322052889." name="/" resourcePath="">
 +						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.496149596" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
 +							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.496149596.1313444779" name=""/>
 +							<builder arguments="-f ./make/stm32h743_nucleo144.make" command="make" id="org.eclipse.cdt.build.core.settings.default.builder.643852617" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="unlimited" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1049424636" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.739441017" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1186902416" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.192229287" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1243849997" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.1479940696" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.239057906" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +						</toolChain>
 +					</folderInfo>
 +				</configuration>
 +			</storageModule>
 +			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 +		</cconfiguration>
  	</storageModule>
  	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
  		<project id="STM32-USB_CDC.null.932840044" name="STM32-USB_CDC"/>
 @@ -181,6 +215,10 @@  		<configuration configurationName="Default">
  			<resource resourceType="PROJECT" workspacePath="/STM32-USB_CDC"/>
  		</configuration>
 +		<configuration configurationName="Build for STM32F746-Discovery"/>
 +		<configuration configurationName="Build for STM32H743-Nucleo144">
 +			<resource resourceType="PROJECT" workspacePath="/STM32-USB_CDC"/>
 +		</configuration>
  		<configuration configurationName="Build for STM32L476-Discovery">
  			<resource resourceType="PROJECT" workspacePath="/STM32-USB_CDC"/>
  		</configuration>
 @@ -188,19 +226,22 @@  	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
  	<storageModule moduleId="scannerConfiguration">
  		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 -		<scannerConfigBuildInfo instanceId="0.1093754934.793646412">
 +		<scannerConfigBuildInfo instanceId="0.1093754934.398423405">
  			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
  		</scannerConfigBuildInfo>
 -		<scannerConfigBuildInfo instanceId="0.1093754934">
 +		<scannerConfigBuildInfo instanceId="0.1093754934.1746620542">
  			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
  		</scannerConfigBuildInfo>
 -		<scannerConfigBuildInfo instanceId="0.1093754934.1600162136">
 +		<scannerConfigBuildInfo instanceId="0.1093754934.1600162136.1322052889">
  			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
  		</scannerConfigBuildInfo>
 -		<scannerConfigBuildInfo instanceId="0.1093754934.398423405">
 +		<scannerConfigBuildInfo instanceId="0.1093754934">
  			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
  		</scannerConfigBuildInfo>
 -		<scannerConfigBuildInfo instanceId="0.1093754934.1746620542">
 +		<scannerConfigBuildInfo instanceId="0.1093754934.1600162136">
 +			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
 +		</scannerConfigBuildInfo>
 +		<scannerConfigBuildInfo instanceId="0.1093754934.793646412">
  			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
  		</scannerConfigBuildInfo>
  	</storageModule>
 diff --git a/testhal/STM32/multi/USB_CDC/Makefile b/testhal/STM32/multi/USB_CDC/Makefile index c66f01e4d..700fab73d 100644 --- a/testhal/STM32/multi/USB_CDC/Makefile +++ b/testhal/STM32/multi/USB_CDC/Makefile @@ -20,6 +20,10 @@ all:  	@make --no-print-directory -f ./make/stm32f746_discovery.make all
  	@echo ====================================================================
  	@echo
 +	@echo === Building for STM32H743-Nucleo144 ===============================
 +	@make --no-print-directory -f ./make/stm32h743_nucleo144.make all
 +	@echo ====================================================================
 +	@echo
  clean:
  	@echo
 @@ -31,6 +35,8 @@ clean:  	@echo
  	-@make --no-print-directory -f ./make/stm32f746_discovery.make clean
  	@echo
 +	-@make --no-print-directory -f ./make/stm32h743_nucleo144.make clean
 +	@echo
  #
  ##############################################################################
 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/chconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/chconf.h new file mode 100644 index 000000000..184320861 --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/chconf.h @@ -0,0 +1,608 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    templates/chconf.h
 + * @brief   Configuration file template.
 + * @details A copy of this file must be placed in each project directory, it
 + *          contains the application specific kernel settings.
 + *
 + * @addtogroup config
 + * @details Kernel related settings and hooks.
 + * @{
 + */
 +
 +#ifndef CHCONF_H
 +#define CHCONF_H
 +
 +#define _CHIBIOS_RT_CONF_
 +#define _CHIBIOS_RT_CONF_VER_5_0_
 +
 +/*===========================================================================*/
 +/**
 + * @name System timers settings
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   System time counter resolution.
 + * @note    Allowed values are 16 or 32 bits.
 + */
 +#define CH_CFG_ST_RESOLUTION                32
 +
 +/**
 + * @brief   System tick frequency.
 + * @details Frequency of the system timer that drives the system ticks. This
 + *          setting also defines the system tick time unit.
 + */
 +#define CH_CFG_ST_FREQUENCY                 10000
 +
 +/**
 + * @brief   Time intervals data size.
 + * @note    Allowed values are 16, 32 or 64 bits.
 + */
 +#define CH_CFG_INTERVALS_SIZE               32
 +
 +/**
 + * @brief   Time types data size.
 + * @note    Allowed values are 16 or 32 bits.
 + */
 +#define CH_CFG_TIME_TYPES_SIZE              32
 +
 +/**
 + * @brief   Time delta constant for the tick-less mode.
 + * @note    If this value is zero then the system uses the classic
 + *          periodic tick. This value represents the minimum number
 + *          of ticks that is safe to specify in a timeout directive.
 + *          The value one is not valid, timeouts are rounded up to
 + *          this value.
 + */
 +#define CH_CFG_ST_TIMEDELTA                 2
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Kernel parameters and options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Round robin interval.
 + * @details This constant is the number of system ticks allowed for the
 + *          threads before preemption occurs. Setting this value to zero
 + *          disables the preemption for threads with equal priority and the
 + *          round robin becomes cooperative. Note that higher priority
 + *          threads can still preempt, the kernel is always preemptive.
 + * @note    Disabling the round robin preemption makes the kernel more compact
 + *          and generally faster.
 + * @note    The round robin preemption is not supported in tickless mode and
 + *          must be set to zero in that case.
 + */
 +#define CH_CFG_TIME_QUANTUM                 0
 +
 +/**
 + * @brief   Managed RAM size.
 + * @details Size of the RAM area to be managed by the OS. If set to zero
 + *          then the whole available RAM is used. The core memory is made
 + *          available to the heap allocator and/or can be used directly through
 + *          the simplified core memory allocator.
 + *
 + * @note    In order to let the OS manage the whole RAM the linker script must
 + *          provide the @p __heap_base__ and @p __heap_end__ symbols.
 + * @note    Requires @p CH_CFG_USE_MEMCORE.
 + */
 +#define CH_CFG_MEMCORE_SIZE                 0
 +
 +/**
 + * @brief   Idle thread automatic spawn suppression.
 + * @details When this option is activated the function @p chSysInit()
 + *          does not spawn the idle thread. The application @p main()
 + *          function becomes the idle thread and must implement an
 + *          infinite loop.
 + */
 +#define CH_CFG_NO_IDLE_THREAD               FALSE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Performance options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   OS optimization.
 + * @details If enabled then time efficient rather than space efficient code
 + *          is used when two possible implementations exist.
 + *
 + * @note    This is not related to the compiler optimization options.
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_OPTIMIZE_SPEED               TRUE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Subsystem options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Time Measurement APIs.
 + * @details If enabled then the time measurement APIs are included in
 + *          the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_TM                       TRUE
 +
 +/**
 + * @brief   Threads registry APIs.
 + * @details If enabled then the registry APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_REGISTRY                 TRUE
 +
 +/**
 + * @brief   Threads synchronization APIs.
 + * @details If enabled then the @p chThdWait() function is included in
 + *          the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_WAITEXIT                 TRUE
 +
 +/**
 + * @brief   Semaphores APIs.
 + * @details If enabled then the Semaphores APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_SEMAPHORES               TRUE
 +
 +/**
 + * @brief   Semaphores queuing mode.
 + * @details If enabled then the threads are enqueued on semaphores by
 + *          priority rather than in FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special
 + *          requirements.
 + * @note    Requires @p CH_CFG_USE_SEMAPHORES.
 + */
 +#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
 +
 +/**
 + * @brief   Mutexes APIs.
 + * @details If enabled then the mutexes APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MUTEXES                  TRUE
 +
 +/**
 + * @brief   Enables recursive behavior on mutexes.
 + * @note    Recursive mutexes are heavier and have an increased
 + *          memory footprint.
 + *
 + * @note    The default is @p FALSE.
 + * @note    Requires @p CH_CFG_USE_MUTEXES.
 + */
 +#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
 +
 +/**
 + * @brief   Conditional Variables APIs.
 + * @details If enabled then the conditional variables APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_MUTEXES.
 + */
 +#define CH_CFG_USE_CONDVARS                 TRUE
 +
 +/**
 + * @brief   Conditional Variables APIs with timeout.
 + * @details If enabled then the conditional variables APIs with timeout
 + *          specification are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_CONDVARS.
 + */
 +#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
 +
 +/**
 + * @brief   Events Flags APIs.
 + * @details If enabled then the event flags APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_EVENTS                   TRUE
 +
 +/**
 + * @brief   Events Flags APIs with timeout.
 + * @details If enabled then the events APIs with timeout specification
 + *          are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_EVENTS.
 + */
 +#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
 +
 +/**
 + * @brief   Synchronous Messages APIs.
 + * @details If enabled then the synchronous messages APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MESSAGES                 TRUE
 +
 +/**
 + * @brief   Synchronous Messages queuing mode.
 + * @details If enabled then messages are served by priority rather than in
 + *          FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special
 + *          requirements.
 + * @note    Requires @p CH_CFG_USE_MESSAGES.
 + */
 +#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
 +
 +/**
 + * @brief   Mailboxes APIs.
 + * @details If enabled then the asynchronous messages (mailboxes) APIs are
 + *          included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_SEMAPHORES.
 + */
 +#define CH_CFG_USE_MAILBOXES                TRUE
 +
 +/**
 + * @brief   Core Memory Manager APIs.
 + * @details If enabled then the core memory manager APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MEMCORE                  TRUE
 +
 +/**
 + * @brief   Heap Allocator APIs.
 + * @details If enabled then the memory heap allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
 + *          @p CH_CFG_USE_SEMAPHORES.
 + * @note    Mutexes are recommended.
 + */
 +#define CH_CFG_USE_HEAP                     TRUE
 +
 +/**
 + * @brief   Memory Pools Allocator APIs.
 + * @details If enabled then the memory pools allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MEMPOOLS                 TRUE
 +
 +/**
 + * @brief  Objects FIFOs APIs.
 + * @details If enabled then the objects FIFOs APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_OBJ_FIFOS                TRUE
 +
 +/**
 + * @brief   Dynamic Threads APIs.
 + * @details If enabled then the dynamic threads creation APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_WAITEXIT.
 + * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
 + */
 +#define CH_CFG_USE_DYNAMIC                  TRUE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Objects factory options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Objects Factory APIs.
 + * @details If enabled then the objects factory APIs are included in the
 + *          kernel.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_CFG_USE_FACTORY                  TRUE
 +
 +/**
 + * @brief   Maximum length for object names.
 + * @details If the specified length is zero then the name is stored by
 + *          pointer but this could have unintended side effects.
 + */
 +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8
 +
 +/**
 + * @brief   Enables the registry of generic objects.
 + */
 +#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE
 +
 +/**
 + * @brief   Enables factory for generic buffers.
 + */
 +#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE
 +
 +/**
 + * @brief   Enables factory for semaphores.
 + */
 +#define CH_CFG_FACTORY_SEMAPHORES           TRUE
 +
 +/**
 + * @brief   Enables factory for mailboxes.
 + */
 +#define CH_CFG_FACTORY_MAILBOXES            TRUE
 +
 +/**
 + * @brief   Enables factory for objects FIFOs.
 + */
 +#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Debug options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Debug option, kernel statistics.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_STATISTICS                   FALSE
 +
 +/**
 + * @brief   Debug option, system state check.
 + * @details If enabled the correct call protocol for system APIs is checked
 + *          at runtime.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
 +
 +/**
 + * @brief   Debug option, parameters checks.
 + * @details If enabled then the checks on the API functions input
 + *          parameters are activated.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_ENABLE_CHECKS                TRUE
 +
 +/**
 + * @brief   Debug option, consistency checks.
 + * @details If enabled then all the assertions in the kernel code are
 + *          activated. This includes consistency checks inside the kernel,
 + *          runtime anomalies and port-defined checks.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_ENABLE_ASSERTS               TRUE
 +
 +/**
 + * @brief   Debug option, trace buffer.
 + * @details If enabled then the trace buffer is activated.
 + *
 + * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
 + */
 +#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_ALL
 +
 +/**
 + * @brief   Trace buffer entries.
 + * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
 + *          different from @p CH_DBG_TRACE_MASK_DISABLED.
 + */
 +#define CH_DBG_TRACE_BUFFER_SIZE            128
 +
 +/**
 + * @brief   Debug option, stack checks.
 + * @details If enabled then a runtime stack check is performed.
 + *
 + * @note    The default is @p FALSE.
 + * @note    The stack check is performed in a architecture/port dependent way.
 + *          It may not be implemented or some ports.
 + * @note    The default failure mode is to halt the system with the global
 + *          @p panic_msg variable set to @p NULL.
 + */
 +#define CH_DBG_ENABLE_STACK_CHECK           TRUE
 +
 +/**
 + * @brief   Debug option, stacks initialization.
 + * @details If enabled then the threads working area is filled with a byte
 + *          value when a thread is created. This can be useful for the
 + *          runtime measurement of the used stack.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_FILL_THREADS                 TRUE
 +
 +/**
 + * @brief   Debug option, threads profiling.
 + * @details If enabled then a field is added to the @p thread_t structure that
 + *          counts the system ticks occurred while executing the thread.
 + *
 + * @note    The default is @p FALSE.
 + * @note    This debug option is not currently compatible with the
 + *          tickless mode.
 + */
 +#define CH_DBG_THREADS_PROFILING            FALSE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Kernel hooks
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   System structure extension.
 + * @details User fields added to the end of the @p ch_system_t structure.
 + */
 +#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \
 +  /* Add threads custom fields here.*/
 +
 +/**
 + * @brief   System initialization hook.
 + * @details User initialization code added to the @p chSysInit() function
 + *          just before interrupts are enabled globally.
 + */
 +#define CH_CFG_SYSTEM_INIT_HOOK(tp) {                                       \
 +  /* Add threads initialization code here.*/                                \
 +}
 +
 +/**
 + * @brief   Threads descriptor structure extension.
 + * @details User fields added to the end of the @p thread_t structure.
 + */
 +#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
 +  /* Add threads custom fields here.*/
 +
 +/**
 + * @brief   Threads initialization hook.
 + * @details User initialization code added to the @p _thread_init() function.
 + *
 + * @note    It is invoked from within @p _thread_init() and implicitly from all
 + *          the threads creation APIs.
 + */
 +#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
 +  /* Add threads initialization code here.*/                                \
 +}
 +
 +/**
 + * @brief   Threads finalization hook.
 + * @details User finalization code added to the @p chThdExit() API.
 + */
 +#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
 +  /* Add threads finalization code here.*/                                  \
 +}
 +
 +/**
 + * @brief   Context switch hook.
 + * @details This hook is invoked just before switching between threads.
 + */
 +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
 +  /* Context switch code here.*/                                            \
 +}
 +
 +/**
 + * @brief   ISR enter hook.
 + */
 +#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
 +  /* IRQ prologue code here.*/                                              \
 +}
 +
 +/**
 + * @brief   ISR exit hook.
 + */
 +#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
 +  /* IRQ epilogue code here.*/                                              \
 +}
 +
 +/**
 + * @brief   Idle thread enter hook.
 + * @note    This hook is invoked within a critical zone, no OS functions
 + *          should be invoked from here.
 + * @note    This macro can be used to activate a power saving mode.
 + */
 +#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
 +  /* Idle-enter code here.*/                                                \
 +}
 +
 +/**
 + * @brief   Idle thread leave hook.
 + * @note    This hook is invoked within a critical zone, no OS functions
 + *          should be invoked from here.
 + * @note    This macro can be used to deactivate a power saving mode.
 + */
 +#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
 +  /* Idle-leave code here.*/                                                \
 +}
 +
 +/**
 + * @brief   Idle Loop hook.
 + * @details This hook is continuously invoked by the idle thread loop.
 + */
 +#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
 +  /* Idle loop code here.*/                                                 \
 +}
 +
 +/**
 + * @brief   System tick event hook.
 + * @details This hook is invoked in the system tick handler immediately
 + *          after processing the virtual timers queue.
 + */
 +#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
 +  /* System tick event code here.*/                                         \
 +}
 +
 +/**
 + * @brief   System halt hook.
 + * @details This hook is invoked in case to a system halting error before
 + *          the system is halted.
 + */
 +#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
 +  /* System halt code here.*/                                               \
 +}
 +
 +/**
 + * @brief   Trace hook.
 + * @details This hook is invoked each time a new record is written in the
 + *          trace buffer.
 + */
 +#define CH_CFG_TRACE_HOOK(tep) {                                            \
 +  /* Trace code here.*/                                                     \
 +}
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/* Port-specific settings (override port settings defaulted in chcore.h).    */
 +/*===========================================================================*/
 +
 +#endif  /* CHCONF_H */
 +
 +/** @} */
 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/halconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/halconf.h new file mode 100644 index 000000000..8cfc4cf4e --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/halconf.h @@ -0,0 +1,518 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    templates/halconf.h
 + * @brief   HAL configuration header.
 + * @details HAL configuration file, this file allows to enable or disable the
 + *          various device drivers from your application. You may also use
 + *          this file in order to override the device drivers default settings.
 + *
 + * @addtogroup HAL_CONF
 + * @{
 + */
 +
 +#ifndef HALCONF_H
 +#define HALCONF_H
 +
 +#define _CHIBIOS_HAL_CONF_
 +#define _CHIBIOS_HAL_CONF_VER_6_0_
 +
 +#include "mcuconf.h"
 +
 +/**
 + * @brief   Enables the PAL subsystem.
 + */
 +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
 +#define HAL_USE_PAL                         TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the ADC subsystem.
 + */
 +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
 +#define HAL_USE_ADC                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the CAN subsystem.
 + */
 +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
 +#define HAL_USE_CAN                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the cryptographic subsystem.
 + */
 +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
 +#define HAL_USE_CRY                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the DAC subsystem.
 + */
 +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
 +#define HAL_USE_DAC                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the EXT subsystem.
 + */
 +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
 +#define HAL_USE_EXT                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the GPT subsystem.
 + */
 +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
 +#define HAL_USE_GPT                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the I2C subsystem.
 + */
 +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
 +#define HAL_USE_I2C                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the I2S subsystem.
 + */
 +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
 +#define HAL_USE_I2S                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the ICU subsystem.
 + */
 +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
 +#define HAL_USE_ICU                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the MAC subsystem.
 + */
 +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
 +#define HAL_USE_MAC                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the MMC_SPI subsystem.
 + */
 +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
 +#define HAL_USE_MMC_SPI                     FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the PWM subsystem.
 + */
 +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
 +#define HAL_USE_PWM                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the QSPI subsystem.
 + */
 +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
 +#define HAL_USE_QSPI                        FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the RTC subsystem.
 + */
 +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
 +#define HAL_USE_RTC                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SDC subsystem.
 + */
 +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
 +#define HAL_USE_SDC                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SERIAL subsystem.
 + */
 +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
 +#define HAL_USE_SERIAL                      FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SERIAL over USB subsystem.
 + */
 +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
 +#define HAL_USE_SERIAL_USB                  TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the SPI subsystem.
 + */
 +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
 +#define HAL_USE_SPI                         FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the UART subsystem.
 + */
 +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
 +#define HAL_USE_UART                        FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the USB subsystem.
 + */
 +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
 +#define HAL_USE_USB                         TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the WDG subsystem.
 + */
 +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
 +#define HAL_USE_WDG                         FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* PAL driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
 +#define PAL_USE_CALLBACKS                   FALSE
 +#endif
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
 +#define PAL_USE_WAIT                        FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* ADC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
 +#define ADC_USE_WAIT                        TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define ADC_USE_MUTUAL_EXCLUSION            TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* CAN driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Sleep mode related APIs inclusion switch.
 + */
 +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
 +#define CAN_USE_SLEEP_MODE                  TRUE
 +#endif
 +
 +/**
 + * @brief   Enforces the driver to use direct callbacks rather than OSAL events.
 + */
 +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
 +#define CAN_ENFORCE_USE_CALLBACKS           FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* CRY driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables the SW fall-back of the cryptographic driver.
 + * @details When enabled, this option, activates a fall-back software
 + *          implementation for algorithms not supported by the underlying
 + *          hardware.
 + * @note    Fall-back implementations may not be present for all algorithms.
 + */
 +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
 +#define HAL_CRY_USE_FALLBACK                FALSE
 +#endif
 +
 +/**
 + * @brief   Makes the driver forcibly use the fall-back implementations.
 + */
 +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
 +#define HAL_CRY_ENFORCE_FALLBACK            FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* DAC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
 +#define DAC_USE_WAIT                        TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define DAC_USE_MUTUAL_EXCLUSION            TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* I2C driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables the mutual exclusion APIs on the I2C bus.
 + */
 +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define I2C_USE_MUTUAL_EXCLUSION            TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* MAC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables the zero-copy API.
 + */
 +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
 +#define MAC_USE_ZERO_COPY                   FALSE
 +#endif
 +
 +/**
 + * @brief   Enables an event sources for incoming packets.
 + */
 +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
 +#define MAC_USE_EVENTS                      TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* MMC_SPI driver related settings.                                          */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Delays insertions.
 + * @details If enabled this options inserts delays into the MMC waiting
 + *          routines releasing some extra CPU time for the threads with
 + *          lower priority, this may slow down the driver a bit however.
 + *          This option is recommended also if the SPI driver does not
 + *          use a DMA channel and heavily loads the CPU.
 + */
 +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
 +#define MMC_NICE_WAITING                    TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* QSPI driver related settings.                                             */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(QSPI_USE_WAIT) || defined(__DOXYGEN__)
 +#define QSPI_USE_WAIT                       TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the @p qspiAcquireBus() and @p qspiReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(QSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define QSPI_USE_MUTUAL_EXCLUSION           TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* SDC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Number of initialization attempts before rejecting the card.
 + * @note    Attempts are performed at 10mS intervals.
 + */
 +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
 +#define SDC_INIT_RETRY                      100
 +#endif
 +
 +/**
 + * @brief   Include support for MMC cards.
 + * @note    MMC support is not yet implemented so this option must be kept
 + *          at @p FALSE.
 + */
 +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
 +#define SDC_MMC_SUPPORT                     FALSE
 +#endif
 +
 +/**
 + * @brief   Delays insertions.
 + * @details If enabled this options inserts delays into the MMC waiting
 + *          routines releasing some extra CPU time for the threads with
 + *          lower priority, this may slow down the driver a bit however.
 + */
 +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
 +#define SDC_NICE_WAITING                    TRUE
 +#endif
 +
 +/**
 + * @brief   OCR initialization constant for V20 cards.
 + */
 +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
 +#define SDC_INIT_OCR_V20                    0x50FF8000U
 +#endif
 +
 +/**
 + * @brief   OCR initialization constant for non-V20 cards.
 + */
 +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
 +#define SDC_INIT_OCR                        0x80100000U
 +#endif
 +
 +/*===========================================================================*/
 +/* SERIAL driver related settings.                                           */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Default bit rate.
 + * @details Configuration parameter, this is the baud rate selected for the
 + *          default configuration.
 + */
 +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
 +#define SERIAL_DEFAULT_BITRATE              38400
 +#endif
 +
 +/**
 + * @brief   Serial buffers size.
 + * @details Configuration parameter, you can change the depth of the queue
 + *          buffers depending on the requirements of your application.
 + * @note    The default is 16 bytes for both the transmission and receive
 + *          buffers.
 + */
 +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
 +#define SERIAL_BUFFERS_SIZE                 16
 +#endif
 +
 +/*===========================================================================*/
 +/* SERIAL_USB driver related setting.                                        */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Serial over USB buffers size.
 + * @details Configuration parameter, the buffer size must be a multiple of
 + *          the USB data endpoint maximum packet size.
 + * @note    The default is 256 bytes for both the transmission and receive
 + *          buffers.
 + */
 +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
 +#define SERIAL_USB_BUFFERS_SIZE             256
 +#endif
 +
 +/**
 + * @brief   Serial over USB number of buffers.
 + * @note    The default is 2 buffers.
 + */
 +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
 +#define SERIAL_USB_BUFFERS_NUMBER           2
 +#endif
 +
 +/*===========================================================================*/
 +/* SPI driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
 +#define SPI_USE_WAIT                        TRUE
 +#endif
 +
 +/**
 + * @brief   Enables circular transfers APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
 +#define SPI_USE_CIRCULAR                    FALSE
 +#endif
 +
 +
 +/**
 + * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define SPI_USE_MUTUAL_EXCLUSION            TRUE
 +#endif
 +
 +/**
 + * @brief   Handling method for SPI CS line.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
 +#define SPI_SELECT_MODE                     SPI_SELECT_MODE_PAD
 +#endif
 +
 +/*===========================================================================*/
 +/* UART driver related settings.                                             */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
 +#define UART_USE_WAIT                       FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define UART_USE_MUTUAL_EXCLUSION           FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* USB driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
 +#define USB_USE_WAIT                        FALSE
 +#endif
 +
 +#endif /* HALCONF_H */
 +
 +/** @} */
 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h new file mode 100644 index 000000000..f8367413f --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h @@ -0,0 +1,458 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +#ifndef MCUCONF_H
 +#define MCUCONF_H
 +
 +/*
 + * STM32H7xx drivers configuration.
 + * The following settings override the default settings present in
 + * the various device driver implementation headers.
 + * Note that the settings for each driver only have effect if the whole
 + * driver is enabled in halconf.h.
 + *
 + * IRQ priorities:
 + * 15...0       Lowest...Highest.
 + *
 + * DMA priorities:
 + * 0...3        Lowest...Highest.
 + */
 +
 +#define STM32H7xx_MCUCONF
 +
 +/*
 + * General settings.
 + */
 +#define STM32_NO_INIT                       FALSE
 +#define STM32_SYS_CK_ENFORCED_VALUE         STM32_HSICLK
 +
 +/*
 + * Memory attributes settings.
 + */
 +#define STM32_NOCACHE_SRAM1_SRAM2           FALSE
 +#define STM32_NOCACHE_SRAM3                 TRUE
 +
 +/*
 + * PWR system settings.
 + * Reading STM32 Reference Manual is required.
 + * Register constants are taken from the ST header.
 + */
 +#define STM32_VOS                           STM32_VOS_SCALE1
 +#define STM32_PWR_CR1                       (PWR_CR1_SVOS_1 |               \
 +                                             PWR_CR1_SVOS_0)
 +#define STM32_PWR_CR2                       (PWR_CR2_BREN)
 +#define STM32_PWR_CR3                       (PWR_CR3_LDOEN |                \
 +                                             PWR_CR3_USBREGEN |             \
 +                                             PWR_CR3_USB33DEN)
 +#define STM32_PWR_CPUCR                     0
 +
 +/*
 + * Clock tree static settings.
 + * Reading STM32 Reference Manual is required.
 + */
 +#define STM32_HSI_ENABLED                   TRUE
 +#define STM32_LSI_ENABLED                   TRUE
 +#define STM32_CSI_ENABLED                   TRUE
 +#define STM32_HSI48_ENABLED                 TRUE
 +#define STM32_HSE_ENABLED                   TRUE
 +#define STM32_LSE_ENABLED                   TRUE
 +#define STM32_HSIDIV                        STM32_HSIDIV_DIV1
 +
 +/*
 + * PLLs static settings.
 + * Reading STM32 Reference Manual is required.
 + */
 +#define STM32_PLLSRC                        STM32_PLLSRC_HSE_CK
 +#define STM32_PLLCFGR_MASK                  ~0
 +#define STM32_PLL1_ENABLED                  TRUE
 +#define STM32_PLL1_P_ENABLED                TRUE
 +#define STM32_PLL1_Q_ENABLED                TRUE
 +#define STM32_PLL1_R_ENABLED                TRUE
 +#define STM32_PLL1_DIVM_VALUE               4
 +#define STM32_PLL1_DIVN_VALUE               400
 +#define STM32_PLL1_FRACN_VALUE              0
 +#define STM32_PLL1_DIVP_VALUE               2
 +#define STM32_PLL1_DIVQ_VALUE               8
 +#define STM32_PLL1_DIVR_VALUE               8
 +#define STM32_PLL2_ENABLED                  TRUE
 +#define STM32_PLL2_P_ENABLED                TRUE
 +#define STM32_PLL2_Q_ENABLED                TRUE
 +#define STM32_PLL2_R_ENABLED                TRUE
 +#define STM32_PLL2_DIVM_VALUE               4
 +#define STM32_PLL2_DIVN_VALUE               400
 +#define STM32_PLL2_FRACN_VALUE              0
 +#define STM32_PLL2_DIVP_VALUE               8
 +#define STM32_PLL2_DIVQ_VALUE               8
 +#define STM32_PLL2_DIVR_VALUE               8
 +#define STM32_PLL3_ENABLED                  TRUE
 +#define STM32_PLL3_P_ENABLED                TRUE
 +#define STM32_PLL3_Q_ENABLED                TRUE
 +#define STM32_PLL3_R_ENABLED                TRUE
 +#define STM32_PLL3_DIVM_VALUE               4
 +#define STM32_PLL3_DIVN_VALUE               240
 +#define STM32_PLL3_FRACN_VALUE              0
 +#define STM32_PLL3_DIVP_VALUE               10
 +#define STM32_PLL3_DIVQ_VALUE               10
 +#define STM32_PLL3_DIVR_VALUE               10
 +
 +/*
 + * Core clocks dynamic settings (can be changed at runtime).
 + * Reading STM32 Reference Manual is required.
 + */
 +#define STM32_SW                            STM32_SW_PLL1_P_CK
 +#define STM32_RTCSEL                        STM32_RTCSEL_LSE_CK
 +#define STM32_D1CPRE                        STM32_D1CPRE_DIV1
 +#define STM32_D1HPRE                        STM32_D1HPRE_DIV4
 +#define STM32_D1PPRE3                       STM32_D1PPRE3_DIV1
 +#define STM32_D2PPRE1                       STM32_D2PPRE1_DIV1
 +#define STM32_D2PPRE2                       STM32_D2PPRE2_DIV1
 +#define STM32_D3PPRE4                       STM32_D3PPRE4_DIV1
 +
 +/*
 + * Peripherals clocks static settings.
 + * Reading STM32 Reference Manual is required.
 + */
 +#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI_CK
 +#define STM32_MCO1PRE_VALUE                 4
 +#define STM32_MCO2SEL                       STM32_MCO2SEL_SYS_CK
 +#define STM32_MCO2PRE_VALUE                 4
 +#define STM32_TIMPRE_ENABLE                 TRUE
 +#define STM32_HRTIMSEL                      0
 +#define STM32_STOPKERWUCK                   0
 +#define STM32_STOPWUCK                      0
 +#define STM32_RTCPRE_VALUE                  8
 +#define STM32_CKPERSEL                      STM32_CKPERSEL_HSE_CK
 +#define STM32_SDMMCSEL                      STM32_SDMMCSEL_PLL1_Q_CK
 +#define STM32_QSPISEL                       STM32_QSPISEL_HCLK
 +#define STM32_FMCSEL                        STM32_QSPISEL_HCLK
 +#define STM32_SWPSEL                        STM32_SWPSEL_PCLK1
 +#define STM32_FDCANSEL                      STM32_FDCANSEL_HSE_CK
 +#define STM32_DFSDM1SEL                     STM32_DFSDM1SEL_PCLK2
 +#define STM32_SPDIFSEL                      STM32_SPDIFSEL_PLL1_Q_CK
 +#define STM32_SPI45SEL                      STM32_SPI45SEL_PCLK2
 +#define STM32_SPI123SEL                     STM32_SPI123SEL_PLL1_Q_CK
 +#define STM32_SAI23SEL                      STM32_SAI23SEL_PLL1_Q_CK
 +#define STM32_SAI1SEL                       STM32_SAI1SEL_PLL1_Q_CK
 +#define STM32_LPTIM1SEL                     STM32_LPTIM1SEL_PCLK1
 +#define STM32_CECSEL                        STM32_CECSEL_LSE_CK
 +#define STM32_USBSEL                        STM32_USBSEL_PLL3_Q_CK
 +#define STM32_I2C123SEL                     STM32_I2C123SEL_PCLK1
 +#define STM32_RNGSEL                        STM32_RNGSEL_HSI48_CK
 +#define STM32_USART16SEL                    STM32_USART16SEL_PCLK2
 +#define STM32_USART234578SEL                STM32_USART234578SEL_PCLK1
 +#define STM32_SPI6SEL                       STM32_SPI6SEL_PCLK4
 +#define STM32_SAI4BSEL                      STM32_SAI4BSEL_PLL1_Q_CK
 +#define STM32_SAI4ASEL                      STM32_SAI4ASEL_PLL1_Q_CK
 +#define STM32_ADCSEL                        STM32_ADCSEL_PLL2_P_CK
 +#define STM32_LPTIM345SEL                   STM32_LPTIM345SEL_PCLK4
 +#define STM32_LPTIM2SEL                     STM32_LPTIM2SEL_PCLK4
 +#define STM32_I2C4SEL                       STM32_I2C4SEL_PCLK4
 +#define STM32_LPUART1SEL                    STM32_LPUART1SEL_PCLK4
 +
 +/*
 + * IRQ system settings.
 + */
 +#define STM32_IRQ_EXTI0_PRIORITY            6
 +#define STM32_IRQ_EXTI1_PRIORITY            6
 +#define STM32_IRQ_EXTI2_PRIORITY            6
 +#define STM32_IRQ_EXTI3_PRIORITY            6
 +#define STM32_IRQ_EXTI4_PRIORITY            6
 +#define STM32_IRQ_EXTI5_9_PRIORITY          6
 +#define STM32_IRQ_EXTI10_15_PRIORITY        6
 +#define STM32_IRQ_EXTI16_PRIORITY           6
 +#define STM32_IRQ_EXTI17_PRIORITY           15
 +#define STM32_IRQ_EXTI18_PRIORITY           6
 +#define STM32_IRQ_EXTI19_PRIORITY           6
 +#define STM32_IRQ_EXTI20_PRIORITY           6
 +#define STM32_IRQ_EXTI21_PRIORITY           15
 +#define STM32_IRQ_EXTI22_PRIORITY           15
 +
 +/*
 + * ADC driver system settings.
 + */
 +#define STM32_ADC_DUAL_MODE                 FALSE
 +#define STM32_ADC_COMPACT_SAMPLES           FALSE
 +#define STM32_ADC_USE_ADC12                 TRUE
 +#define STM32_ADC_USE_ADC3                  FALSE
 +#define STM32_ADC_ADC12_DMA_CHANNEL         0
 +#define STM32_ADC_ADC3_DMA_CHANNEL          1
 +#define STM32_ADC_ADC12_DMA_PRIORITY        2
 +#define STM32_ADC_ADC3_DMA_PRIORITY         2
 +#define STM32_ADC_ADC12_IRQ_PRIORITY        5
 +#define STM32_ADC_ADC3_IRQ_PRIORITY         5
 +#define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV4
 +#define STM32_ADC_ADC3_CLOCK_MODE           ADC_CCR_CKMODE_AHB_DIV4
 +
 +/*
 + * CAN driver system settings.
 + */
 +#define STM32_CAN_USE_CAN1                  FALSE
 +#define STM32_CAN_USE_CAN2                  FALSE
 +#define STM32_CAN_USE_CAN3                  FALSE
 +#define STM32_CAN_CAN1_IRQ_PRIORITY         11
 +#define STM32_CAN_CAN2_IRQ_PRIORITY         11
 +#define STM32_CAN_CAN3_IRQ_PRIORITY         11
 +
 +/*
 + * DAC driver system settings.
 + */
 +#define STM32_DAC_DUAL_MODE                 FALSE
 +#define STM32_DAC_USE_DAC1_CH1              FALSE
 +#define STM32_DAC_USE_DAC1_CH2              FALSE
 +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
 +#define STM32_DAC_DAC1_CH1_DMA_CHANNEL      3
 +#define STM32_DAC_DAC1_CH2_DMA_CHANNEL      4
 +
 +/*
 + * GPT driver system settings.
 + */
 +#define STM32_GPT_USE_TIM1                  FALSE
 +#define STM32_GPT_USE_TIM2                  FALSE
 +#define STM32_GPT_USE_TIM3                  FALSE
 +#define STM32_GPT_USE_TIM4                  FALSE
 +#define STM32_GPT_USE_TIM5                  FALSE
 +#define STM32_GPT_USE_TIM6                  FALSE
 +#define STM32_GPT_USE_TIM7                  FALSE
 +#define STM32_GPT_USE_TIM8                  FALSE
 +#define STM32_GPT_USE_TIM9                  FALSE
 +#define STM32_GPT_USE_TIM11                 FALSE
 +#define STM32_GPT_USE_TIM12                 FALSE
 +#define STM32_GPT_USE_TIM14                 FALSE
 +#define STM32_GPT_TIM1_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM2_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM3_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM4_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM5_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM6_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM7_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM8_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM9_IRQ_PRIORITY         7
 +#define STM32_GPT_TIM11_IRQ_PRIORITY        7
 +#define STM32_GPT_TIM12_IRQ_PRIORITY        7
 +#define STM32_GPT_TIM14_IRQ_PRIORITY        7
 +
 +/*
 + * I2C driver system settings.
 + */
 +#define STM32_I2C_USE_I2C1                  FALSE
 +#define STM32_I2C_USE_I2C2                  FALSE
 +#define STM32_I2C_USE_I2C3                  FALSE
 +#define STM32_I2C_USE_I2C4                  FALSE
 +#define STM32_I2C_BUSY_TIMEOUT              50
 +#define STM32_I2C_I2C1_RX_DMA_CHANNEL       6
 +#define STM32_I2C_I2C1_TX_DMA_CHANNEL       7
 +#define STM32_I2C_I2C2_RX_DMA_CHANNEL       8
 +#define STM32_I2C_I2C2_TX_DMA_CHANNEL       9
 +#define STM32_I2C_I2C3_RX_DMA_CHANNEL       8
 +#define STM32_I2C_I2C3_TX_DMA_CHANNEL       9
 +#define STM32_I2C_I2C4_RX_BDMA_CHANNEL      0
 +#define STM32_I2C_I2C4_TX_BDMA_CHANNEL      1
 +#define STM32_I2C_I2C1_IRQ_PRIORITY         5
 +#define STM32_I2C_I2C2_IRQ_PRIORITY         5
 +#define STM32_I2C_I2C3_IRQ_PRIORITY         5
 +#define STM32_I2C_I2C4_IRQ_PRIORITY         5
 +#define STM32_I2C_I2C1_DMA_PRIORITY         3
 +#define STM32_I2C_I2C2_DMA_PRIORITY         3
 +#define STM32_I2C_I2C3_DMA_PRIORITY         3
 +#define STM32_I2C_I2C4_DMA_PRIORITY         3
 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 +
 +/*
 + * ICU driver system settings.
 + */
 +#define STM32_ICU_USE_TIM1                  FALSE
 +#define STM32_ICU_USE_TIM2                  FALSE
 +#define STM32_ICU_USE_TIM3                  FALSE
 +#define STM32_ICU_USE_TIM4                  FALSE
 +#define STM32_ICU_USE_TIM5                  FALSE
 +#define STM32_ICU_USE_TIM8                  FALSE
 +#define STM32_ICU_USE_TIM9                  FALSE
 +#define STM32_ICU_TIM1_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM2_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM3_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM4_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM5_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM8_IRQ_PRIORITY         7
 +#define STM32_ICU_TIM9_IRQ_PRIORITY         7
 +
 +/*
 + * MAC driver system settings.
 + */
 +#define STM32_MAC_TRANSMIT_BUFFERS          2
 +#define STM32_MAC_RECEIVE_BUFFERS           4
 +#define STM32_MAC_BUFFERS_SIZE              1522
 +#define STM32_MAC_PHY_TIMEOUT               100
 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
 +#define STM32_MAC_ETH1_IRQ_PRIORITY         13
 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
 +
 +/*
 + * PWM driver system settings.
 + */
 +#define STM32_PWM_USE_ADVANCED              FALSE
 +#define STM32_PWM_USE_TIM1                  FALSE
 +#define STM32_PWM_USE_TIM2                  FALSE
 +#define STM32_PWM_USE_TIM3                  FALSE
 +#define STM32_PWM_USE_TIM4                  FALSE
 +#define STM32_PWM_USE_TIM5                  FALSE
 +#define STM32_PWM_USE_TIM8                  FALSE
 +#define STM32_PWM_USE_TIM9                  FALSE
 +#define STM32_PWM_TIM1_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM2_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM3_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM4_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM5_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM8_IRQ_PRIORITY         7
 +#define STM32_PWM_TIM9_IRQ_PRIORITY         7
 +
 +/*
 + * SDC driver system settings.
 + */
 +#define STM32_SDC_USE_SDMMC1                FALSE
 +#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
 +#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000
 +#define STM32_SDC_SDMMC_READ_TIMEOUT        1000
 +#define STM32_SDC_SDMMC_CLOCK_DELAY         10
 +#define STM32_SDC_SDMMC1_DMA_CHANNEL        5
 +#define STM32_SDC_SDMMC1_DMA_PRIORITY       3
 +#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 +
 +/*
 + * SERIAL driver system settings.
 + */
 +#define STM32_SERIAL_USE_USART1             FALSE
 +#define STM32_SERIAL_USE_USART2             FALSE
 +#define STM32_SERIAL_USE_USART3             TRUE
 +#define STM32_SERIAL_USE_UART4              FALSE
 +#define STM32_SERIAL_USE_UART5              FALSE
 +#define STM32_SERIAL_USE_USART6             FALSE
 +#define STM32_SERIAL_USE_UART7              FALSE
 +#define STM32_SERIAL_USE_UART8              FALSE
 +#define STM32_SERIAL_USART1_PRIORITY        12
 +#define STM32_SERIAL_USART2_PRIORITY        12
 +#define STM32_SERIAL_USART3_PRIORITY        12
 +#define STM32_SERIAL_UART4_PRIORITY         12
 +#define STM32_SERIAL_UART5_PRIORITY         12
 +#define STM32_SERIAL_USART6_PRIORITY        12
 +#define STM32_SERIAL_UART7_PRIORITY         12
 +#define STM32_SERIAL_UART8_PRIORITY         12
 +
 +/*
 + * SPI driver system settings.
 + */
 +#define STM32_SPI_USE_SPI1                  TRUE
 +#define STM32_SPI_USE_SPI2                  FALSE
 +#define STM32_SPI_USE_SPI3                  FALSE
 +#define STM32_SPI_USE_SPI4                  FALSE
 +#define STM32_SPI_USE_SPI5                  FALSE
 +#define STM32_SPI_USE_SPI6                  FALSE
 +#define STM32_SPI_SPI1_RX_DMA_CHANNEL       10
 +#define STM32_SPI_SPI1_TX_DMA_CHANNEL       11
 +#define STM32_SPI_SPI2_RX_DMA_CHANNEL       12
 +#define STM32_SPI_SPI2_TX_DMA_CHANNEL       13
 +#define STM32_SPI_SPI3_RX_DMA_CHANNEL       10
 +#define STM32_SPI_SPI3_TX_DMA_CHANNEL       11
 +#define STM32_SPI_SPI4_RX_DMA_CHANNEL       12
 +#define STM32_SPI_SPI4_TX_DMA_CHANNEL       13
 +#define STM32_SPI_SPI5_RX_DMA_CHANNEL       12
 +#define STM32_SPI_SPI5_TX_DMA_CHANNEL       13
 +#define STM32_SPI_SPI6_RX_BDMA_CHANNEL      2
 +#define STM32_SPI_SPI6_TX_BDMA_CHANNEL      3
 +#define STM32_SPI_SPI1_DMA_PRIORITY         1
 +#define STM32_SPI_SPI2_DMA_PRIORITY         1
 +#define STM32_SPI_SPI3_DMA_PRIORITY         1
 +#define STM32_SPI_SPI4_DMA_PRIORITY         1
 +#define STM32_SPI_SPI5_DMA_PRIORITY         1
 +#define STM32_SPI_SPI6_DMA_PRIORITY         1
 +#define STM32_SPI_SPI1_IRQ_PRIORITY         10
 +#define STM32_SPI_SPI2_IRQ_PRIORITY         10
 +#define STM32_SPI_SPI3_IRQ_PRIORITY         10
 +#define STM32_SPI_SPI4_IRQ_PRIORITY         10
 +#define STM32_SPI_SPI5_IRQ_PRIORITY         10
 +#define STM32_SPI_SPI6_IRQ_PRIORITY         10
 +#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
 +
 +/*
 + * ST driver system settings.
 + */
 +#define STM32_ST_IRQ_PRIORITY               8
 +#define STM32_ST_USE_TIMER                  2
 +
 +/*
 + * UART driver system settings.
 + */
 +#define STM32_UART_USE_USART1               FALSE
 +#define STM32_UART_USE_USART2               FALSE
 +#define STM32_UART_USE_USART3               FALSE
 +#define STM32_UART_USE_UART4                FALSE
 +#define STM32_UART_USE_UART5                FALSE
 +#define STM32_UART_USE_USART6               FALSE
 +#define STM32_UART_USE_UART7                FALSE
 +#define STM32_UART_USE_UART8                FALSE
 +#define STM32_UART_USART1_RX_DMA_CHANNEL    14
 +#define STM32_UART_USART1_TX_DMA_CHANNEL    15
 +#define STM32_UART_USART2_RX_DMA_CHANNEL    8
 +#define STM32_UART_USART2_TX_DMA_CHANNEL    9
 +#define STM32_UART_USART3_RX_DMA_CHANNEL    12
 +#define STM32_UART_USART3_TX_DMA_CHANNEL    13
 +#define STM32_UART_UART4_RX_DMA_CHANNEL     14
 +#define STM32_UART_UART4_TX_DMA_CHANNEL     15
 +#define STM32_UART_UART5_RX_DMA_CHANNEL     8
 +#define STM32_UART_UART5_TX_DMA_CHANNEL     9
 +#define STM32_UART_USART6_RX_DMA_CHANNEL    12
 +#define STM32_UART_USART6_TX_DMA_CHANNEL    13
 +#define STM32_UART_UART7_RX_DMA_CHANNEL     8
 +#define STM32_UART_UART7_TX_DMA_CHANNEL     9
 +#define STM32_UART_UART8_RX_DMA_CHANNEL     12
 +#define STM32_UART_UART8_TX_DMA_CHANNEL     13
 +#define STM32_UART_USART1_IRQ_PRIORITY      12
 +#define STM32_UART_USART2_IRQ_PRIORITY      12
 +#define STM32_UART_USART3_IRQ_PRIORITY      12
 +#define STM32_UART_UART4_IRQ_PRIORITY       12
 +#define STM32_UART_UART5_IRQ_PRIORITY       12
 +#define STM32_UART_USART6_IRQ_PRIORITY      12
 +#define STM32_UART_USART1_DMA_PRIORITY      0
 +#define STM32_UART_USART2_DMA_PRIORITY      0
 +#define STM32_UART_USART3_DMA_PRIORITY      0
 +#define STM32_UART_UART4_DMA_PRIORITY       0
 +#define STM32_UART_UART5_DMA_PRIORITY       0
 +#define STM32_UART_USART6_DMA_PRIORITY      0
 +#define STM32_UART_UART7_DMA_PRIORITY       0
 +#define STM32_UART_UART8_DMA_PRIORITY       0
 +#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
 +
 +/*
 + * USB driver system settings.
 + */
 +#define STM32_USB_USE_OTG1                  TRUE
 +#define STM32_USB_USE_OTG2                  TRUE
 +#define STM32_USB_OTG1_IRQ_PRIORITY         14
 +#define STM32_USB_OTG2_IRQ_PRIORITY         14
 +#define STM32_USB_OTG1_RX_FIFO_SIZE         512
 +#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
 +#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
 +#define STM32_USB_OTG_THREAD_STACK_SIZE     128
 +#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
 +
 +/*
 + * WDG driver system settings.
 + */
 +#define STM32_WDG_USE_IWDG                  FALSE
 +
 +#endif /* MCUCONF_H */
 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c new file mode 100644 index 000000000..a44ed3079 --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c @@ -0,0 +1,62 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    portab.c
 + * @brief   Application portability module code.
 + *
 + * @addtogroup application_portability
 + * @{
 + */
 +
 +#include "hal.h"
 +#include "portab.h"
 +
 +/*===========================================================================*/
 +/* Module local definitions.                                                 */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module exported variables.                                                */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module local types.                                                       */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module local variables.                                                   */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module local functions.                                                   */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module exported functions.                                                */
 +/*===========================================================================*/
 +
 +void portab_setup(void) {
 +
 +  /*
 +   * ARD_D13 is programmed as output (board LED).
 +   */
 +  palClearLine(LINE_ARD_D13);
 +  palSetLineMode(LINE_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
 +
 +}
 +
 +/** @} */
 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h new file mode 100644 index 000000000..ed9d06c58 --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h @@ -0,0 +1,72 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    portab.h
 + * @brief   Application portability macros and structures.
 + *
 + * @addtogroup application_portability
 + * @{
 + */
 +
 +#ifndef PORTAB_H
 +#define PORTAB_H
 +
 +/*===========================================================================*/
 +/* Module constants.                                                         */
 +/*===========================================================================*/
 +
 +#define PORTAB_USB1                 USBD1
 +
 +#define PORTAB_SDU1                 SDU1
 +
 +#define PORTAB_BLINK_LED1           LINE_ARD_D13
 +
 +/*===========================================================================*/
 +/* Module pre-compile time settings.                                         */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Derived constants and error checks.                                       */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module data structures and types.                                         */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* Module macros.                                                            */
 +/*===========================================================================*/
 +
 +/*===========================================================================*/
 +/* External declarations.                                                    */
 +/*===========================================================================*/
 +
 +#ifdef __cplusplus
 +extern "C" {
 +#endif
 +  void portab_setup(void);
 +#ifdef __cplusplus
 +}
 +#endif
 +
 +/*===========================================================================*/
 +/* Module inline functions.                                                  */
 +/*===========================================================================*/
 +
 +#endif /* PORTAB_H */
 +
 +/** @} */
 diff --git a/testhal/STM32/multi/USB_CDC/debug/STM32-USB_CDC (Select ELF file)(OpenOCD, Flash and Run).launch b/testhal/STM32/multi/USB_CDC/debug/STM32-USB_CDC (Select ELF file)(OpenOCD, Flash and Run).launch index 8f5ca97b8..b2ff87d9a 100644 --- a/testhal/STM32/multi/USB_CDC/debug/STM32-USB_CDC (Select ELF file)(OpenOCD, Flash and Run).launch +++ b/testhal/STM32/multi/USB_CDC/debug/STM32-USB_CDC (Select ELF file)(OpenOCD, Flash and Run).launch @@ -33,9 +33,9 @@  <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
  <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
  <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 -<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="xPSR-(format)" val="4"/></contentList>"/>
 +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="r2-(format)" val="4"/><content id="r3-(format)" val="4"/><content id="r6-(format)" val="4"/><content id="xPSR-(format)" val="4"/></contentList>"/>
  <stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<globalVariableList/>
"/>
 -<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<memoryBlockExpressionList>
<memoryBlockExpressionItem>
<expression text="0x40021004"/>
</memoryBlockExpressionItem>
</memoryBlockExpressionList>
"/>
 +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<memoryBlockExpressionList>
<memoryBlockExpressionItem>
<expression text="0x58024400"/>
</memoryBlockExpressionItem>
</memoryBlockExpressionList>
"/>
  <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${selected_resource_loc}"/>
  <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32-USB_CDC"/>
  <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
 diff --git a/testhal/STM32/multi/USB_CDC/make/stm32h743_nucleo144.make b/testhal/STM32/multi/USB_CDC/make/stm32h743_nucleo144.make new file mode 100644 index 000000000..a969e9333 --- /dev/null +++ b/testhal/STM32/multi/USB_CDC/make/stm32h743_nucleo144.make @@ -0,0 +1,227 @@ +##############################################################################
 +# Build global options
 +# NOTE: Can be overridden externally.
 +#
 +
 +# Compiler options here.
 +ifeq ($(USE_OPT),)
 +  USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
 +endif
 +
 +# C specific options here (added to USE_OPT).
 +ifeq ($(USE_COPT),)
 +  USE_COPT = 
 +endif
 +
 +# C++ specific options here (added to USE_OPT).
 +ifeq ($(USE_CPPOPT),)
 +  USE_CPPOPT = -fno-rtti
 +endif
 +
 +# Enable this if you want the linker to remove unused code and data
 +ifeq ($(USE_LINK_GC),)
 +  USE_LINK_GC = yes
 +endif
 +
 +# Linker extra options here.
 +ifeq ($(USE_LDOPT),)
 +  USE_LDOPT = 
 +endif
 +
 +# Enable this if you want link time optimizations (LTO)
 +ifeq ($(USE_LTO),)
 +  USE_LTO = yes
 +endif
 +
 +# If enabled, this option allows to compile the application in THUMB mode.
 +ifeq ($(USE_THUMB),)
 +  USE_THUMB = yes
 +endif
 +
 +# Enable this if you want to see the full log while compiling.
 +ifeq ($(USE_VERBOSE_COMPILE),)
 +  USE_VERBOSE_COMPILE = no
 +endif
 +
 +# If enabled, this option makes the build process faster by not compiling
 +# modules not used in the current configuration.
 +ifeq ($(USE_SMART_BUILD),)
 +  USE_SMART_BUILD = yes
 +endif
 +
 +#
 +# Build global options
 +##############################################################################
 +
 +##############################################################################
 +# Architecture or project specific options
 +#
 +
 +# Stack size to be allocated to the Cortex-M process stack. This stack is
 +# the stack used by the main() thread.
 +ifeq ($(USE_PROCESS_STACKSIZE),)
 +  USE_PROCESS_STACKSIZE = 0x400
 +endif
 +
 +# Stack size to the allocated to the Cortex-M main/exceptions stack. This
 +# stack is used for processing interrupts and exceptions.
 +ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
 +  USE_EXCEPTIONS_STACKSIZE = 0x400
 +endif
 +
 +# Enables the use of FPU (no, softfp, hard).
 +ifeq ($(USE_FPU),)
 +  USE_FPU = no
 +endif
 +
 +# FPU-related options.
 +ifeq ($(USE_FPU_OPT),)
 +  USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv5-sp-d16
 +endif
 +
 +#
 +# Architecture or project specific options
 +##############################################################################
 +
 +##############################################################################
 +# Project, sources and paths
 +#
 +
 +# Define project name here
 +PROJECT = ch
 +
 +# Imported source files and paths
 +CHIBIOS  := ../../../..
 +CONFDIR  := ./cfg/stm32h743_nucleo144
 +BUILDDIR := ./build/stm32h743_nucleo144
 +DEPDIR   := ./.dep/stm32h743_nucleo144
 +
 +# Licensing files.
 +include $(CHIBIOS)/os/license/license.mk
 +# Startup files.
 +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk
 +# HAL-OSAL files (optional).
 +include $(CHIBIOS)/os/hal/hal.mk
 +include $(CHIBIOS)/os/hal/ports/STM32/STM32H7xx/platform.mk
 +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H743ZI/board.mk
 +include $(CHIBIOS)/os/hal/osal/rt/osal.mk
 +# RTOS files (optional).
 +include $(CHIBIOS)/os/rt/rt.mk
 +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
 +# Auto-build files in ./source recursively.
 +include $(CHIBIOS)/tools/mk/autobuild.mk
 +# Other files (optional).
 +include $(CHIBIOS)/test/lib/test.mk
 +include $(CHIBIOS)/test/rt/rt_test.mk
 +include $(CHIBIOS)/test/oslib/oslib_test.mk
 +include $(CHIBIOS)/os/hal/lib/streams/streams.mk
 +include $(CHIBIOS)/os/various/shell/shell.mk
 +
 +# Define linker script file here
 +LDSCRIPT= $(STARTUPLD)/STM32H743xI.ld
 +
 +# C sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CSRC = $(ALLCSRC) \
 +       $(TESTSRC) \
 +       $(CONFDIR)/portab.c \
 +       main.c
 +
 +# C++ sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CPPSRC = $(ALLCPPSRC)
 +
 +# C sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACSRC =
 +
 +# C++ sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACPPSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCPPSRC =
 +
 +# List ASM source files here
 +ASMSRC = $(ALLASMSRC)
 +ASMXSRC = $(ALLXASMSRC)
 +
 +INCDIR = $(ALLINC) $(TESTINC) $(CONFDIR)
 +
 +#
 +# Project, sources and paths
 +##############################################################################
 +
 +##############################################################################
 +# Start of user section
 +#
 +
 +# List all user C define here, like -D_DEBUG=1
 +UDEFS =
 +
 +# Define ASM defines here
 +UADEFS =
 +
 +# List all user directories here
 +UINCDIR =
 +
 +# List the user directory to look for the libraries here
 +ULIBDIR =
 +
 +# List all user libraries here
 +ULIBS =
 +
 +#
 +# End of user section
 +##############################################################################
 +
 +##############################################################################
 +# Compiler settings
 +#
 +
 +MCU  = cortex-m7
 +
 +#TRGT = arm-elf-
 +TRGT = arm-none-eabi-
 +CC   = $(TRGT)gcc
 +CPPC = $(TRGT)g++
 +# Enable loading with g++ only if you need C++ runtime support.
 +# NOTE: You can use C++ even without C++ support if you are careful. C++
 +#       runtime support makes code size explode.
 +LD   = $(TRGT)gcc
 +#LD   = $(TRGT)g++
 +CP   = $(TRGT)objcopy
 +AS   = $(TRGT)gcc -x assembler-with-cpp
 +AR   = $(TRGT)ar
 +OD   = $(TRGT)objdump
 +SZ   = $(TRGT)size
 +HEX  = $(CP) -O ihex
 +BIN  = $(CP) -O binary
 +
 +# ARM-specific options here
 +AOPT =
 +
 +# THUMB-specific options here
 +TOPT = -mthumb -DTHUMB
 +
 +# Define C warning options here
 +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
 +
 +# Define C++ warning options here
 +CPPWARN = -Wall -Wextra -Wundef
 +
 +#
 +# Compiler settings
 +##############################################################################
 +
 +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
 +include $(RULESPATH)/rules.mk
  | 
