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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-12-02 08:41:28 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-12-02 08:41:28 +0000 |
| commit | 9ff0ca5826c624542a767045c149b5b9bd2e42e7 (patch) | |
| tree | c913c3202cc5dad408f8479ab5209c761a710af0 /testhal/STM32/multi/TRNG/cfg | |
| parent | d4a83ebccef017c840dea11ac0082b794ba678a8 (diff) | |
| download | ChibiOS-9ff0ca5826c624542a767045c149b5b9bd2e42e7.tar.gz ChibiOS-9ff0ca5826c624542a767045c149b5b9bd2e42e7.tar.bz2 ChibiOS-9ff0ca5826c624542a767045c149b5b9bd2e42e7.zip | |
mcuconf.h files mass update.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12454 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'testhal/STM32/multi/TRNG/cfg')
| -rw-r--r-- | testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h | 8 | ||||
| -rw-r--r-- | testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h | 8 |
2 files changed, 16 insertions, 0 deletions
diff --git a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h index cd98f46c5..ab664ac31 100644 --- a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h +++ b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h @@ -224,6 +224,14 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7
/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE 32
+#define STM32_RTC_PRESS_VALUE 1024
+#define STM32_RTC_CR_INIT 0
+#define STM32_RTC_TAMPCR_INIT 0
+
+/*
* SDC driver system settings.
*/
#define STM32_SDC_USE_SDMMC1 FALSE
diff --git a/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h b/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h index 19d359b1a..2b9b8043a 100644 --- a/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h @@ -228,6 +228,14 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7
/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE 32
+#define STM32_RTC_PRESS_VALUE 1024
+#define STM32_RTC_CR_INIT 0
+#define STM32_RTC_TAMPCR_INIT 0
+
+/*
* SDC driver system settings.
*/
|