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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-23 11:24:02 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-23 11:24:02 +0000 |
| commit | 9e5337241d7be9c50d97e2562ecd50e09d4c2325 (patch) | |
| tree | 7d6577c4713d6a084394625a5b4f61184b82be75 /testhal/STM32/STM32F7xx/SPI/main.c | |
| parent | 37d632cd0fb3075110f63e7179ae6f03650d7fd0 (diff) | |
| download | ChibiOS-9e5337241d7be9c50d97e2562ecd50e09d4c2325.tar.gz ChibiOS-9e5337241d7be9c50d97e2562ecd50e09d4c2325.tar.bz2 ChibiOS-9e5337241d7be9c50d97e2562ecd50e09d4c2325.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8239 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32F7xx/SPI/main.c')
| -rw-r--r-- | testhal/STM32/STM32F7xx/SPI/main.c | 153 |
1 files changed, 153 insertions, 0 deletions
diff --git a/testhal/STM32/STM32F7xx/SPI/main.c b/testhal/STM32/STM32F7xx/SPI/main.c new file mode 100644 index 000000000..4e14474e4 --- /dev/null +++ b/testhal/STM32/STM32F7xx/SPI/main.c @@ -0,0 +1,153 @@ +/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*===========================================================================*/
+/* SPI driver related. */
+/*===========================================================================*/
+
+/*
+ * Maximum speed SPI configuration (27MHz, CPHA=0, CPOL=0, MSb first).
+ */
+static const SPIConfig hs_spicfg = {
+ NULL,
+ GPIOI,
+ GPIOI_ARD_D13,
+ 0,
+ SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
+};
+
+/*
+ * Low speed SPI configuration (421.875kHz, CPHA=0, CPOL=0, MSb first).
+ */
+static const SPIConfig ls_spicfg = {
+ NULL,
+ GPIOI,
+ GPIOI_ARD_D13,
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
+};
+
+/*
+ * SPI TX and RX buffers.
+ */
+static uint8_t txbuf[512];
+static uint8_t rxbuf[512];
+
+/*===========================================================================*/
+/* Application code. */
+/*===========================================================================*/
+
+/*
+ * SPI bus contender 1.
+ */
+static THD_WORKING_AREA(spi_thread_1_wa, 256);
+static THD_FUNCTION(spi_thread_1, p) {
+
+ (void)p;
+ chRegSetThreadName("SPI thread 1");
+ while (true) {
+ spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
+ palSetPad(GPIOI, GPIOI_ARD_D13); /* LED ON. */
+ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */
+ spiSelect(&SPID2); /* Slave Select assertion. */
+ spiExchange(&SPID2, 512,
+ txbuf, rxbuf); /* Atomic transfer operations. */
+ spiUnselect(&SPID2); /* Slave Select de-assertion. */
+ spiReleaseBus(&SPID2); /* Ownership release. */
+ }
+}
+
+/*
+ * SPI bus contender 2.
+ */
+static THD_WORKING_AREA(spi_thread_2_wa, 256);
+static THD_FUNCTION(spi_thread_2, p) {
+
+ (void)p;
+ chRegSetThreadName("SPI thread 2");
+ while (true) {
+ spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
+ palClearPad(GPIOI, GPIOI_ARD_D13); /* LED OFF. */
+ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */
+ spiSelect(&SPID2); /* Slave Select assertion. */
+ spiExchange(&SPID2, 512,
+ txbuf, rxbuf); /* Atomic transfer operations. */
+ spiUnselect(&SPID2); /* Slave Select de-assertion. */
+ spiReleaseBus(&SPID2); /* Ownership release. */
+ }
+}
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+ unsigned i;
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * SPI2 I/O pins setup.
+ */
+ palSetPadMode(GPIOI,
+ GPIOI_ARD_D13,
+ PAL_MODE_OUTPUT_PUSHPULL |
+ PAL_STM32_OSPEED_HIGHEST); /* LED over SPI SCK. */
+ palSetPadMode(GPIOB,
+ GPIOB_ARD_D12,
+ PAL_MODE_ALTERNATE(5) |
+ PAL_STM32_OSPEED_HIGHEST); /* MISO. */
+ palSetPadMode(GPIOB,
+ GPIOB_ARD_D11,
+ PAL_MODE_ALTERNATE(5) |
+ PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
+ palSetPadMode(GPIOI,
+ GPIOI_ARD_D10,
+ PAL_MODE_OUTPUT_PUSHPULL |
+ PAL_STM32_OSPEED_HIGHEST); /* CS. */
+ palSetPad(GPIOI, GPIOI_ARD_D10);
+
+ /*
+ * Prepare transmit pattern.
+ */
+ for (i = 0; i < sizeof(txbuf); i++)
+ txbuf[i] = (uint8_t)i;
+
+ /*
+ * Starting the transmitter and receiver threads.
+ */
+ chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
+ NORMALPRIO + 1, spi_thread_1, NULL);
+ chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa),
+ NORMALPRIO + 1, spi_thread_2, NULL);
+
+ /*
+ * Normal main() thread activity, in this demo it does nothing.
+ */
+ while (true) {
+ chThdSleepMilliseconds(500);
+ }
+}
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