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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-02-20 20:14:42 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-02-20 20:14:42 +0000 |
commit | daabc2b079b17a41ca2f1a2a6423373f811402ba (patch) | |
tree | 9a1b5552939d5ee04de29b10e0de0eb4defedea9 /ports | |
parent | 83762f45fdeaa0702186ce7773242859350c90ab (diff) | |
download | ChibiOS-daabc2b079b17a41ca2f1a2a6423373f811402ba.tar.gz ChibiOS-daabc2b079b17a41ca2f1a2a6423373f811402ba.tar.bz2 ChibiOS-daabc2b079b17a41ca2f1a2a6423373f811402ba.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@791 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'ports')
-rw-r--r-- | ports/ARM7/chcore.h | 18 | ||||
-rw-r--r-- | ports/ARMCM3/chcore.h | 14 |
2 files changed, 22 insertions, 10 deletions
diff --git a/ports/ARM7/chcore.h b/ports/ARM7/chcore.h index 9f75df2cb..a92ed5512 100644 --- a/ports/ARM7/chcore.h +++ b/ports/ARM7/chcore.h @@ -162,7 +162,7 @@ struct context { "bx r0 \n\t" \
".code 16"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define PORT_IRQ_PROLOGUE() { \
asm volatile ("stmfd sp!, {r0-r3, r12, lr}"); \
}
@@ -179,7 +179,7 @@ struct context { asm volatile ("ldr r0, =_port_irq_common \n\t" \
"bx r0"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define PORT_IRQ_EPILOGUE() { \
asm volatile ("b _port_irq_common"); \
}
@@ -203,7 +203,7 @@ struct context { #define port_lock() { \
asm volatile ("bl _port_lock_thumb" : : : "r3", "lr"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define port_lock() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */
@@ -215,7 +215,7 @@ struct context { #define port_unlock() { \
asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define port_unlock() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */
@@ -239,7 +239,7 @@ struct context { #define port_disable() { \
asm volatile ("bl _port_disable_thumb" : : : "r3", "lr"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define port_disable() { \
asm volatile ("mrs r3, CPSR \n\t" \
"orr r3, #0x80 \n\t" \
@@ -256,7 +256,7 @@ struct context { #define port_suspend() { \
asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define port_suspend() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */
@@ -267,7 +267,7 @@ struct context { #define port_enable() { \
asm volatile ("bl _port_enable_thumb" : : : "r3", "lr"); \
}
-#else /* THUMB */
+#else /* !THUMB */
#define port_enable() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */
@@ -278,7 +278,7 @@ struct context { */
#ifdef THUMB
#define port_switch(otp, ntp) _port_switch_thumb(otp, ntp)
-#else /* THUMB */
+#else /* !THUMB */
#define port_switch(otp, ntp) _port_switch_arm(otp, ntp)
#endif /* !THUMB */
@@ -289,7 +289,7 @@ extern "C" { void port_halt(void);
#ifdef THUMB
void _port_switch_thumb(Thread *otp, Thread *ntp);
-#else /* THUMB */
+#else /* !THUMB */
void _port_switch_arm(Thread *otp, Thread *ntp);
#endif /* !THUMB */
void _port_thread_start(void);
diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h index 46a2a533c..4c3843e56 100644 --- a/ports/ARMCM3/chcore.h +++ b/ports/ARMCM3/chcore.h @@ -178,7 +178,7 @@ struct context { /**
* Enforces a correct alignment for a stack area size value.
*/
-#define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1)
+#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* Computes the thread working area global size.
@@ -281,11 +281,23 @@ struct context { /**
* This port function is implemented as inlined code for performance reasons.
*/
+#if CH_DBG_ENABLE_STACK_CHECK
#define port_switch(otp, ntp) { \
register Thread *_otp asm ("r0") = (otp); \
register Thread *_ntp asm ("r1") = (ntp); \
+ register char *sp asm ("sp"); \
+ if (sp - sizeof(struct intctx) - sizeof(Thread) < (char *)_otp) \
+ asm volatile ("movs r0, #0 \n\t" \
+ "b chDbgPanic"); \
asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp)); \
}
+#else /* !CH_DBG_ENABLE_STACK_CHECK */
+#define port_switch(otp, ntp) { \
+ register Thread *_otp asm ("r0") = (otp); \
+ register Thread *_ntp asm ("r1") = (ntp); \
+ asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp)); \
+}
+#endif /* !CH_DBG_ENABLE_STACK_CHECK */
#ifdef __cplusplus
extern "C" {
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