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| author | isiora <none@example.com> | 2018-02-27 00:22:09 +0000 |
|---|---|---|
| committer | isiora <none@example.com> | 2018-02-27 00:22:09 +0000 |
| commit | dd1e643f707d176d73549a9f7d060029b8838109 (patch) | |
| tree | 512d2332a2efd4ad8f0a62d2d846d242e11600a3 /os | |
| parent | 1e6c8c47272aa519b57dfb040c4d54ed2938d4f7 (diff) | |
| download | ChibiOS-dd1e643f707d176d73549a9f7d060029b8838109.tar.gz ChibiOS-dd1e643f707d176d73549a9f7d060029b8838109.tar.bz2 ChibiOS-dd1e643f707d176d73549a9f7d060029b8838109.zip | |
Added option to enable L2.
git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11579 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os')
| -rw-r--r-- | os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c index 0e1bfce8d..e99233094 100644 --- a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c +++ b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c @@ -362,6 +362,19 @@ void __core_init(void) { if ((pm & SCTLR_C_Msk) == 0) {
__set_SCTLR(pm | SCTLR_C_Msk);
}
+
+#if defined(ARM_ENABLE_L2CC)
+#if ARM_ENABLE_L2CC
+ /* High SRAM to L2CC.*/
+ SFR->SFR_L2CC_HRAMC = 0x1;
+
+ /* Invalidate and enable L2 cache.*/
+ L2C_InvAllByWay();
+ L2C_Enable();
+ __DSB();
+ __ISB();
+#endif
+#endif
}
/** @} */
|