git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5157 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 58 insertions, 14 deletions

diff --git a/os/hal/platforms/SPC56ELxx/hal_lld.c b/os/hal/platforms/SPC56ELxx/hal_lld.c
index 5b3f6a521..e8e3c8a17 100644
--- a/os/hal/platforms/SPC56ELxx/hal_lld.c
+++ b/os/hal/platforms/SPC56ELxx/hal_lld.c
@@ -54,8 +54,9 @@ void hal_lld_init(void) {
 

   /* The system is switched to the RUN0 mode, the default for normal

      operations.*/

-  if (halSPCSetRunMode(SPC5_RUNMODE_RUN0) == CH_FAILED)

-    chSysHalt();    /* TODO: Add handling.*/

+  if (halSPCSetRunMode(SPC5_RUNMODE_RUN0) == CH_FAILED) {

+    SPC5_CLOCK_FAILURE_HOOK();

+  }

 

   /* Down-counter timer initialized for system tick use, TB enabled for debug

      and measurements.*/

@@ -76,6 +77,23 @@ void hal_lld_init(void) {
 }

 

 /**

+ * @brief   Returns the current value of the system free running counter.

+ * @note    This service is implemented by returning the content of the

+ *          DWT_CYCCNT register.

+ *

+ * @return              The value of the system free running counter of

+ *                      type halrtcnt_t.

+ *

+ * @notapi

+ */

+halrtcnt_t hal_lld_get_counter_value(void) {

+  halrtcnt_t cnt;

+

+  asm volatile ("mfspr %0, 284" : "=r" (cnt));

+  return cnt;

+}

+

+/**

  * @brief   SPC56ELxx early initialization.

  * @note    All the involved constants come from the file @p board.h and

  *          @p hal_lld.h

@@ -120,8 +138,9 @@ void spc_early_init(void) {
   AIPS.OPACR88_95.R = 0;

 

   /* Check on a safe condition.*/

-  if (ME.GS.B.S_CURRENT_MODE != SPC5_RUNMODE_DRUN)

-    chSysHalt();    /* TODO: Add handling.*/

+  if (ME.GS.B.S_CURRENT_MODE != SPC5_RUNMODE_DRUN) {

+    SPC5_CLOCK_FAILURE_HOOK();

+  }

 

 #if defined(SPC5_OSC_BYPASS)

   /* If the board is equipped with an oscillator instead of a crystal then the

@@ -143,8 +162,9 @@ void spc_early_init(void) {
   /* Switches to XOSC in order to check its functionality.*/

   ME.DRUN.R = SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON |           \

               SPC5_ME_MC_FLAON_NORMAL | SPC5_ME_MC_MVRON;

-  if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED)

-    chSysHalt();    /* TODO: Add handling.*/

+  if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED) {

+    SPC5_CLOCK_FAILURE_HOOK();

+  }

 

   /* Initialization of the FMPLLs settings.*/

   CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF |

@@ -192,8 +212,9 @@ void spc_early_init(void) {
 

   /* Switches again to DRUN mode (current mode) in order to update the

      settings.*/

-  if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED)

-    chSysHalt();    /* TODO: Add handling.*/

+  if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED) {

+    SPC5_CLOCK_FAILURE_HOOK();

+  }

 

 #endif /* !SPC5_NO_INIT */

 }

diff --git a/os/hal/platforms/SPC56ELxx/hal_lld.h b/os/hal/platforms/SPC56ELxx/hal_lld.h
index 593196227..7e0fb8aae 100644
--- a/os/hal/platforms/SPC56ELxx/hal_lld.h
+++ b/os/hal/platforms/SPC56ELxx/hal_lld.h
@@ -38,7 +38,7 @@
 /**

  * @brief   Defines the support for realtime counters in the HAL.

  */

-#define HAL_IMPLEMENTS_COUNTERS FALSE

+#define HAL_IMPLEMENTS_COUNTERS     TRUE

 

 /**

  * @name    Platform identification

@@ -642,12 +642,12 @@
 #endif

 

 /**

- * @brief   PIT channel 0 IRQ priority.

- * @note    This PIT channel is allocated permanently for system tick

- *          generation.

+ * @brief   Clock initialization failure hook.

+ * @note    The default is to stop the system and let the RTC restart it.

+ * @note    The hook code must not return.

  */

-#if !defined(SPC5_PIT0_IRQ_PRIORITY) || defined(__DOXYGEN__)

-#define SPC5_PIT0_IRQ_PRIORITY              4

+#if !defined(SPC5_CLOCK_FAILURE_HOOK) || defined(__DOXYGEN__)

+#define SPC5_CLOCK_FAILURE_HOOK()           chSysHalt()

 #endif

 

 /*===========================================================================*/

@@ -913,6 +913,19 @@ _
 /* Driver data structures and types.                                         */

 /*===========================================================================*/

 

+/**

+ * @brief   Type representing a system clock frequency.

+ */

+typedef uint32_t halclock_t;

+

+/**

+ * @brief   Type of the realtime free counter value.

+ */

+typedef uint32_t halrtcnt_t;

+

+/**

+ * @brief   Run modes.

+ */

 typedef enum {

   SPC5_RUNMODE_SAFE  = 2,

   SPC5_RUNMODE_DRUN  = 3,

@@ -928,6 +941,15 @@ typedef enum {
 /* Driver macros.                                                            */

 /*===========================================================================*/

 

+/**

+ * @brief   Realtime counter frequency.

+ *

+ * @return              The realtime counter frequency of type halclock_t.

+ *

+ * @notapi

+ */

+#define hal_lld_get_counter_frequency() (halclock_t)halSPCGetSystemClock()

+

 /*===========================================================================*/

 /* External declarations.                                                    */

 /*===========================================================================*/

@@ -936,6 +958,7 @@ typedef enum {
 extern "C" {

 #endif

   void hal_lld_init(void);

+  halrtcnt_t hal_lld_get_counter_value(void);

   void spc_early_init(void);

   bool_t halSPCSetRunMode(spc5_runmode_t mode);

   void halSPCSetPeripheralClockMode(uint32_t n, uint32_t pctl);