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author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-08-07 08:53:41 +0000 |
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committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-08-07 08:53:41 +0000 |
commit | 683c4ac7af0bf05d31eaded26078b69d383d5cce (patch) | |
tree | 612cf84e7315d535ddd395f34307b191f4c7196c /os | |
parent | 07339aeb0e0cb5f6a6f66933df2fd8f21051da92 (diff) | |
download | ChibiOS-683c4ac7af0bf05d31eaded26078b69d383d5cce.tar.gz ChibiOS-683c4ac7af0bf05d31eaded26078b69d383d5cce.tar.bz2 ChibiOS-683c4ac7af0bf05d31eaded26078b69d383d5cce.zip |
STM32 FSMC NAND. Polishing driver after hardware tests.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7152 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/fsmc.c | 8 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/fsmc.h | 6 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c | 8 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h | 12 | ||||
-rw-r--r-- | os/hal/src/hal.c | 7 | ||||
-rw-r--r-- | os/hal/src/nand.c | 2 |
6 files changed, 16 insertions, 27 deletions
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c index a19919582..8d821dca6 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c @@ -70,7 +70,7 @@ FSMCDriver FSMCD1; * * @notapi */ -void fsmc_lld_init(void) { +void fsmc_init(void) { FSMCD1.state = FSMC_STOP; @@ -94,7 +94,7 @@ void fsmc_lld_init(void) { * * @notapi */ -void fsmc_lld_start(FSMCDriver *fsmcp) { +void fsmc_start(FSMCDriver *fsmcp) { osalDbgAssert((fsmcp->state == FSMC_STOP) || (fsmcp->state == FSMC_READY), @@ -123,7 +123,7 @@ void fsmc_lld_start(FSMCDriver *fsmcp) { * * @notapi */ -void fsmc_lld_stop(FSMCDriver *fsmcp) { +void fsmc_stop(FSMCDriver *fsmcp) { if (fsmcp->state == FSMC_READY) { /* Resets the peripheral.*/ @@ -149,7 +149,7 @@ void fsmc_lld_stop(FSMCDriver *fsmcp) { * * @notapi */ -void fsmc_lld_serve_interrupt(void) { +void fsmc_serve_interrupt(void) { osalSysHalt("Unrealized"); } diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h index 32245e9e4..0ab887b65 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h @@ -232,9 +232,9 @@ extern FSMCDriver FSMCD1; #ifdef __cplusplus extern "C" { #endif - void fsmc_lld_init(void); - void fsmc_lld_start(FSMCDriver *fsmcp); - void fsmc_lld_stop(FSMCDriver *fsmcp); + void fsmc_init(void); + void fsmc_start(FSMCDriver *fsmcp); + void fsmc_stop(FSMCDriver *fsmcp); #ifdef __cplusplus } #endif diff --git a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c index aa324343d..b37ff2697 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c @@ -273,13 +273,15 @@ static void nand_lld_serve_transfer_end_irq(NANDDriver *nandp, */ void nand_lld_init(void) { + fsmc_init(); + #if STM32_NAND_USE_FSMC_NAND1 /* Driver initialization.*/ nandObjectInit(&NANDD1); NANDD1.rxdata = NULL; NANDD1.datalen = 0; NANDD1.thread = NULL; - NANDD1.dma = STM32_DMA_STREAM(STM32_NAND_NAND1_DMA_STREAM); + NANDD1.dma = STM32_DMA_STREAM(STM32_NAND_DMA_STREAM); NANDD1.nand = (FSMC_NAND_TypeDef *)FSMC_Bank2_R_BASE; NANDD1.map_data = (uint8_t*)FSMC_Bank2_MAP_COMMON_DATA; NANDD1.map_cmd = (uint8_t*)FSMC_Bank2_MAP_COMMON_CMD; @@ -292,7 +294,7 @@ void nand_lld_init(void) { NANDD2.rxdata = NULL; NANDD2.datalen = 0; NANDD2.thread = NULL; - NANDD2.dma = STM32_DMA_STREAM(STM32_NAND_NAND2_DMA_STREAM); + NANDD2.dma = STM32_DMA_STREAM(STM32_NAND_DMA_STREAM); NANDD2.nand = (FSMC_NAND_TypeDef *)FSMC_Bank3_R_BASE; NANDD2.map_data = (uint8_t*)FSMC_Bank3_MAP_COMMON_DATA; NANDD2.map_cmd = (uint8_t*)FSMC_Bank3_MAP_COMMON_CMD; @@ -312,7 +314,7 @@ void nand_lld_start(NANDDriver *nandp) { bool b; if (FSMCD1.state == FSMC_STOP) - fsmc_lld_start(&FSMCD1); + fsmc_start(&FSMCD1); if (nandp->state == NAND_STOP) { b = dmaStreamAllocate(nandp->dma, diff --git a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h index 5e7ba90c5..0954a782f 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h @@ -106,16 +106,8 @@ * @brief DMA stream used for NAND1 operations. * @note This option is only available on platforms with enhanced DMA. */ -#if !defined(STM32_NAND_NAND1_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_NAND_NAND1_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) -#endif - -/** - * @brief DMA stream used for NAND2 operations. - * @note This option is only available on platforms with enhanced DMA. - */ -#if !defined(STM32_NAND_NAND2_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_NAND_NAND2_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#if !defined(STM32_NAND_DMA_STREAM) || defined(__DOXYGEN__) +#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #endif /** @} */ diff --git a/os/hal/src/hal.c b/os/hal/src/hal.c index 698e1b29b..7cd9e6fb5 100644 --- a/os/hal/src/hal.c +++ b/os/hal/src/hal.c @@ -119,11 +119,8 @@ void halInit(void) { #if HAL_USE_RTC || defined(__DOXYGEN__)
rtcInit();
#endif
-#if HAL_USE_EMC || defined(__DOXYGEN__)
- emcInit();
-#endif
-#if HAL_USE_EMCNAND || defined(__DOXYGEN__)
- emcnandInit();
+#if HAL_USE_NAND || defined(__DOXYGEN__)
+ nandInit();
#endif
/* Board specific initialization.*/
boardInit();
diff --git a/os/hal/src/nand.c b/os/hal/src/nand.c index c5536f4be..ee2bd3b2d 100644 --- a/os/hal/src/nand.c +++ b/os/hal/src/nand.c @@ -242,8 +242,6 @@ void nandObjectInit(NANDDriver *nandp) { void nandStart(NANDDriver *nandp, const NANDConfig *config) { osalDbgCheck((nandp != NULL) && (config != NULL)); - osalDbgAssert(config->fsmcp->state == FSMC_READY, - "lower level driver not ready"); osalDbgAssert((nandp->state == NAND_STOP) || (nandp->state == NAND_READY), "invalid state"); |