Improved IAR startup file.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9644 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 106 insertions, 16 deletions

diff --git a/os/common/startup/ARMCMx/compilers/IAR/cstartup.s b/os/common/startup/ARMCMx/compilers/IAR/cstartup.s
index fab03d4fc..2af3dc1d8 100644
--- a/os/common/startup/ARMCMx/compilers/IAR/cstartup.s
+++ b/os/common/startup/ARMCMx/compilers/IAR/cstartup.s
@@ -15,14 +15,56 @@
 */

 

 /**

- * @file    ARMCMx/IAR/cstartup.s

+ * @file    ARMCMx/compilers/IAR/cstartup.s

  * @brief   Generic IAR Cortex-Mx startup file.

  *

  * @addtogroup ARMCMx_IAR_STARTUP

  * @{

  */

 

-#if !defined(__DOXYGEN__)

+#if !defined(__DOXYGEN__) 

+

+#define SCB_VTOR                            0xE000ED08

+

+ /**  

+  * @brief   VTOR special register initialization.  

+  * @details VTOR is initialized to point to the vectors table.     

+  * @note    IAR assembler #if directive conditions do not work like C/C++ conditions.

+  * @details Set to 0 to disable the function, 1 to enable

+  */  

+#ifndef CRT0_VTOR_INIT 

+#define CRT0_VTOR_INIT                      1

+#endif 

+/**

+ * @brief   Stack segments initialization value.

+ */

+#ifndef CRT0_STACKS_FILL_PATTERN 

+#define CRT0_STACKS_FILL_PATTERN            0x55555555

+#endif

+

+/**

+ * @brief   Stack segments initialization switch.

+  * @details Set to 0 to disable the function, 1 to enable

+ */

+#ifndef CRT0_INIT_STACKS

+#define CRT0_INIT_STACKS                    1

+#endif

+

+/**

+ * @brief   Heap segment initialization value.

+ */

+#ifndef CRT0_HEAP_FILL_PATTERN 

+#define CRT0_HEAP_FILL_PATTERN              0xCCCCCCCC

+#endif

+

+/**

+ * @brief   Heap segment initialization switch.

+ * @details Set to 0 to disable the function, 1 to enable

+ */

+#ifndef CRT0_INIT_HEAP

+#define CRT0_INIT_HEAP                      1

+#endif

+

 

         MODULE  ?cstartup

 

@@ -33,35 +75,83 @@ CONTROL_USE_PSP SET 2
 

         AAPCS INTERWORK, VFP_COMPATIBLE, ROPI

         PRESERVE8

-

-        SECTION .intvec:CODE:NOROOT(3)

-

-        SECTION CSTACK:DATA:NOROOT(3)

-        PUBLIC  __main_thread_stack_base__

-__main_thread_stack_base__:

-        PUBLIC  __heap_end__

-__heap_end__:

+        

+        SECTION HEAP:DATA:NOROOT(3)

+        PUBLIC  __heap_base__

+__heap_base__:             /* Note: heap section defines sysheap base */

 

         SECTION SYSHEAP:DATA:NOROOT(3)

-        PUBLIC  __heap_base__

-__heap_base__:

+        PUBLIC  __heap_end__

+__heap_end__:              /* Note: sysheap section defines sysheap end */

 

         PUBLIC  __iar_program_start

-        EXTERN  __vector_table

         EXTWEAK __iar_init_core

         EXTWEAK __iar_init_vfp

         EXTERN  __cmain

+        EXTERN  __vector_table

+        EXTERN  __main_stack_base__

+        EXTERN  __main_stack_end__

+        EXTERN  __process_stack_base__

+        EXTERN  __process_stack_end__        

 

+        SECTION IRQSTACK:DATA:NOROOT(3)

+        SECTION CSTACK:DATA:NOROOT(3)

         SECTION .text:CODE:REORDER(2)

-        REQUIRE __vector_table

         THUMB

+        

 __iar_program_start:

         cpsid   i

+        ldr     r0, =SFE(IRQSTACK)

+        msr     MSP, r0

         ldr     r0, =SFE(CSTACK)

         msr     PSP, r0

         movs    r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP

         msr     CONTROL, r0

         isb

+        

+#if (CRT0_VTOR_INIT)

+        ldr     r0, =__vector_table  

+        movw    r1, #SCB_VTOR & 0xFFFF  

+        movt    r1, #SCB_VTOR >> 16  

+        str     r0, [r1]  

+#endif

+

+#if (CRT0_INIT_STACKS)

+        ldr     r0, =CRT0_STACKS_FILL_PATTERN

+        /* Main Stack initialization. Note, it assumes that the stack size

+           is a multiple of 4 so the linker file must ensure this.*/

+        ldr     r1, =__main_stack_base__

+        ldr     r2, =__main_stack_end__

+msloop:

+        cmp     r1, r2

+        itt     lo

+        strlo   r0, [r1], #4

+        blo     msloop

+

+        /* Process Stack initialization. Note, it assumes that the stack size

+           is a multiple of 4 so the linker file must ensure this.*/

+        ldr     r1, =__process_stack_base__

+        ldr     r2, =__process_stack_end__

+psloop:

+        cmp     r1, r2

+        itt     lo

+        strlo   r0, [r1], #4

+        blo     psloop

+#endif

+

+#if (CRT0_INIT_HEAP)

+        ldr     r0, =CRT0_HEAP_FILL_PATTERN

+        /* Sys Heap initialization. Note, it assumes that the heap size

+           is a multiple of 4 so the linker file must ensure this.*/

+        ldr     r1, =__heap_base__

+        ldr     r2, =__heap_end__

+hloop:

+        cmp     r1, r2

+        itt     lo

+        strlo   r0, [r1], #4

+        blo     hloop

+#endif

+

         bl      __early_init

         bl      __iar_init_core

         bl      __iar_init_vfp

diff --git a/os/common/startup/ARMCMx/compilers/IAR/vectors.s b/os/common/startup/ARMCMx/compilers/IAR/vectors.s
index 8b48a1aea..f4db42050 100644
--- a/os/common/startup/ARMCMx/compilers/IAR/vectors.s
+++ b/os/common/startup/ARMCMx/compilers/IAR/vectors.s
@@ -15,7 +15,7 @@
 */

 

 /**

- * @file    ARMCMx/IAR/vectors.c

+ * @file    ARMCMx/compilers/IAR/vectors.c

  * @brief   Interrupt vectors for Cortex-Mx devices.

  *

  * @defgroup ARMCMx_IAR_VECTORS Cortex-Mx Interrupt Vectors

@@ -50,7 +50,7 @@
 

 __vector_table:

         DCD     SFE(IRQSTACK)

-        DCD     __iar_program_start

+        DCD     __iar_program_start 

         DCD     NMI_Handler

         DCD     HardFault_Handler

         DCD     MemManage_Handler