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author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-05-28 12:31:47 +0000 |
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committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-05-28 12:31:47 +0000 |
commit | 152f34a80c6ffe5fd17809732272823091b854e8 (patch) | |
tree | 3fcd38b8c4e1cfb7bf45898b926558db492ff3a9 /os | |
parent | 07556a2d033a33d1d4e5a1d75b93681851e485c7 (diff) | |
download | ChibiOS-152f34a80c6ffe5fd17809732272823091b854e8.tar.gz ChibiOS-152f34a80c6ffe5fd17809732272823091b854e8.tar.bz2 ChibiOS-152f34a80c6ffe5fd17809732272823091b854e8.zip |
I2C. Some refactorings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3000 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r-- | os/hal/include/i2c.h | 4 | ||||
-rw-r--r-- | os/hal/platforms/STM32/i2c_lld.c | 30 | ||||
-rw-r--r-- | os/hal/src/i2c.c | 4 |
3 files changed, 19 insertions, 19 deletions
diff --git a/os/hal/include/i2c.h b/os/hal/include/i2c.h index c3e5c0538..1c9238859 100644 --- a/os/hal/include/i2c.h +++ b/os/hal/include/i2c.h @@ -150,8 +150,8 @@ struct I2CSlaveConfig{ /**
* @brief Receive and transmit buffers.
*/
- size_t tx_bytes;
- size_t rx_bytes;
+ size_t txbytes;
+ size_t rxbytes;
i2cblock_t *rxbuf; /*!< Pointer to receive buffer. */
i2cblock_t *txbuf; /*!< Pointer to transmit buffer.*/
uint16_t slave_addr;
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index 388409774..2c535b930 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -73,20 +73,20 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { txBuffp = (uint8_t*)i2cp->id_slave_config->txbuf; datap = txBuffp; txBuffp++; - i2cp->id_slave_config->tx_bytes--; + i2cp->id_slave_config->txbytes--; /* If no further data to be sent, disable the I2C ITBUF in order to not have a TxE interrupt */ - if(i2cp->id_slave_config->tx_bytes == 0) { + if(i2cp->id_slave_config->txbytes == 0) { dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN; } //EV8_1 write the first data dp->DR = *datap; break; case I2C_EV8_MASTER_BYTE_TRANSMITTING: - if(i2cp->id_slave_config->tx_bytes > 0) { + if(i2cp->id_slave_config->txbytes > 0) { datap = txBuffp; txBuffp++; - i2cp->id_slave_config->tx_bytes--; - if(i2cp->id_slave_config->tx_bytes == 0) { + i2cp->id_slave_config->txbytes--; + if(i2cp->id_slave_config->txbytes == 0) { /* If no further data to be sent, disable the ITBUF in order to not have a TxE interrupt */ dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN; } @@ -95,7 +95,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { break; case I2C_EV8_2_MASTER_BYTE_TRANSMITTED: /* if nothing to read then generate stop */ - if (i2cp->id_slave_config->rx_bytes == 0){ + if (i2cp->id_slave_config->rxbytes == 0){ dp->CR1 |= I2C_CR1_STOP; // stop generation /* Disable ITEVT In order to not have again a BTF IT */ dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN; @@ -135,12 +135,12 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { rxBuffp = i2cp->id_slave_config->rxbuf; break; case I2C_EV7_MASTER_REC_BYTE_RECEIVED: - if(i2cp->id_slave_config->rx_bytes != 3) { + if(i2cp->id_slave_config->rxbytes != 3) { /* Read the data register */ *rxBuffp = dp->DR; rxBuffp++; - i2cp->id_slave_config->rx_bytes--; - switch(i2cp->id_slave_config->rx_bytes){ + i2cp->id_slave_config->rxbytes--; + switch(i2cp->id_slave_config->rxbytes){ case 3: /* Disable the ITBUF in order to have only the BTF interrupt */ dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN; @@ -172,7 +172,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { chSysUnlockFromIsr(); rxBuffp++; /* Decrement the number of readed bytes */ - i2cp->id_slave_config->rx_bytes -= 2; + i2cp->id_slave_config->rxbytes -= 2; i2cp->id_slave_config->flags = 0; // ready for read DataN on the next EV7 break; @@ -187,7 +187,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { rxBuffp++; /* Read the DataN*/ *rxBuffp = dp->DR; - i2cp->id_slave_config->rx_bytes = 0; + i2cp->id_slave_config->rxbytes = 0; i2cp->id_slave_config->flags = 0; /* Portable I2C ISR code defined in the high level driver, note, it is a macro.*/ _i2c_isr_code(i2cp, i2cp->id_slave_config); @@ -574,11 +574,11 @@ void i2c_lld_master_receive(I2CDriver *i2cp){ i2cp->id_slave_config->errors = 0; // Only one byte to be received - if(i2cp->id_slave_config->rx_bytes == 1) { + if(i2cp->id_slave_config->rxbytes == 1) { i2cp->id_slave_config->flags |= I2C_FLG_1BTR; } // Only two bytes to be received - else if(i2cp->id_slave_config->rx_bytes == 2) { + else if(i2cp->id_slave_config->rxbytes == 2) { i2cp->id_slave_config->flags |= I2C_FLG_2BTR; i2cp->id_i2c->CR1 |= I2C_CR1_POS; // Acknowledge Position } @@ -622,11 +622,11 @@ void i2c_lld_master_transceive(I2CDriver *i2cp){ i2cp->id_slave_config->errors = 0; // Only one byte to be received - if(i2cp->id_slave_config->rx_bytes == 1) { + if(i2cp->id_slave_config->rxbytes == 1) { i2cp->id_slave_config->flags |= I2C_FLG_1BTR; } // Only two bytes to be received - else if(i2cp->id_slave_config->rx_bytes == 2) { + else if(i2cp->id_slave_config->rxbytes == 2) { i2cp->id_slave_config->flags |= I2C_FLG_2BTR; i2cp->id_i2c->CR1 |= I2C_CR1_POS; // Acknowledge Position } diff --git a/os/hal/src/i2c.c b/os/hal/src/i2c.c index 18d1d78c0..84dfcf958 100644 --- a/os/hal/src/i2c.c +++ b/os/hal/src/i2c.c @@ -144,7 +144,7 @@ void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) { txbuf = i2cscfg->txbuf;
nbit_addr = i2cscfg->nbit_address;
- n = i2cscfg->tx_bytes;
+ n = i2cscfg->txbytes;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
((nbit_addr == 7) || (nbit_addr == 10)) && (n > 0) && (txbuf != NULL),
@@ -192,7 +192,7 @@ void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ uint8_t nbit_addr;
rxbuf = i2cscfg->rxbuf;
- n = i2cscfg->rx_bytes;
+ n = i2cscfg->rxbytes;
nbit_addr = i2cscfg->nbit_address;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \
|